diff --git a/tests/ArianeElab/ArianeElab.log b/tests/ArianeElab/ArianeElab.log index 007ca92e62..fc1d7ed7fa 100644 --- a/tests/ArianeElab/ArianeElab.log +++ b/tests/ArianeElab/ArianeElab.log @@ -175808,9 +175808,9 @@ design: (work@top) |vpiParent: \_operation: , line:1974:9, endln:1974:52 |vpiDecompile:1 - |vpiSize:64 - |UINT:1 - |vpiConstType:9 + |vpiSize:1 + |BIN:1 + |vpiConstType:3 \_logic_typespec: (xlen_t), line:30:13, endln:30:29 |vpiParent: \_ref_typespec: (work@top.i_ariane.ARIANE_MARCHID) diff --git a/tests/BlackConst/BlackConst.log b/tests/BlackConst/BlackConst.log index 30f85f3a0d..759336fa4c 100644 --- a/tests/BlackConst/BlackConst.log +++ b/tests/BlackConst/BlackConst.log @@ -3605,9 +3605,9 @@ design: (work@top) |vpiOperand: \_constant: , line:123:14, endln:123:27 |vpiDecompile:0 - |vpiSize:64 - |UINT:0 - |vpiConstType:9 + |vpiSize:1 + |BIN:0 + |vpiConstType:3 |vpiOperand: \_constant: , line:123:32, endln:123:33 |vpiParent: diff --git a/tests/ParamEquivOp/ParamEquivOp.log b/tests/ParamEquivOp/ParamEquivOp.log new file mode 100644 index 0000000000..08c5d08d2c --- /dev/null +++ b/tests/ParamEquivOp/ParamEquivOp.log @@ -0,0 +1,1556 @@ +[INF:CM0023] Creating log file "${SURELOG_DIR}/build/regression/ParamEquivOp/slpp_all/surelog.log". +AST_DEBUG_BEGIN +LIB: work +FILE: ${SURELOG_DIR}/tests/ParamEquivOp/dut.sv +n<> u<0> t<_INVALID_> f<0> l<0:0> +n<> u<1> t p<369> s<368> l<2:1> el<1:2> +n u<2> t p<6> s<3> l<2:1> el<2:7> +n u<3> t p<6> s<5> l<2:8> el<2:12> +n<> u<4> t p<5> l<2:13> el<2:13> +n<> u<5> t p<6> c<4> l<2:12> el<2:14> +n<> u<6> t p<8> c<2> s<7> l<2:1> el<2:15> +n<> u<7> t p<8> l<3:1> el<3:10> +n<> u<8> t p<9> c<6> l<2:1> el<3:10> +n<> u<9> t p<368> c<8> s<367> l<2:1> el<3:10> +n u<10> t p<14> s<11> l<6:1> el<6:7> +n u<11> t p<14> s<13> l<6:8> el<6:11> +n<> u<12> t p<13> l<6:12> el<6:12> +n<> u<13> t p<14> c<12> l<6:11> el<6:13> +n<> u<14> t p<366> c<10> s<31> l<6:1> el<6:14> +n<> u<15> t p<25> s<24> l<8:11> el<8:11> +n u<16> t p<23> s<22> l<8:11> el<8:32> +n<> u<17> t p<18> l<8:39> el<8:43> +n<> u<18> t p<19> c<17> l<8:39> el<8:43> +n<> u<19> t p<20> c<18> l<8:39> el<8:43> +n<> u<20> t p<21> c<19> l<8:39> el<8:43> +n<> u<21> t p<22> c<20> l<8:39> el<8:43> +n<> u<22> t p<23> c<21> l<8:39> el<8:43> +n<> u<23> t p<24> c<16> l<8:11> el<8:43> +n<> u<24> t p<25> c<23> l<8:11> el<8:43> +n<> u<25> t p<26> c<15> l<8:1> el<8:43> +n<> u<26> t p<27> c<25> l<8:1> el<8:44> +n<> u<27> t p<28> c<26> l<8:1> el<8:44> +n<> u<28> t p<29> c<27> l<8:1> el<8:44> +n<> u<29> t p<30> c<28> l<8:1> el<8:44> +n<> u<30> t p<31> c<29> l<8:1> el<8:44> +n<> u<31> t p<366> c<30> s<48> l<8:1> el<8:44> +n<> u<32> t p<42> s<41> l<9:11> el<9:11> +n u<33> t p<40> s<39> l<9:11> el<9:31> +n<> u<34> t p<35> l<9:39> el<9:43> +n<> u<35> t p<36> c<34> l<9:39> el<9:43> +n<> u<36> t p<37> c<35> l<9:39> el<9:43> +n<> u<37> t p<38> c<36> l<9:39> el<9:43> +n<> u<38> t p<39> c<37> l<9:39> el<9:43> +n<> u<39> t p<40> c<38> l<9:39> el<9:43> +n<> u<40> t p<41> c<33> l<9:11> el<9:43> +n<> u<41> t p<42> c<40> l<9:11> el<9:43> +n<> u<42> t p<43> c<32> l<9:1> el<9:43> +n<> u<43> t p<44> c<42> l<9:1> el<9:44> +n<> u<44> t p<45> c<43> l<9:1> el<9:44> +n<> u<45> t p<46> c<44> l<9:1> el<9:44> +n<> u<46> t p<47> c<45> l<9:1> el<9:44> +n<> u<47> t p<48> c<46> l<9:1> el<9:44> +n<> u<48> t p<366> c<47> s<65> l<9:1> el<9:44> +n<> u<49> t p<59> s<58> l<10:11> el<10:11> +n u<50> t p<57> s<56> l<10:11> el<10:31> +n<> u<51> t p<52> l<10:39> el<10:43> +n<> u<52> t p<53> c<51> l<10:39> el<10:43> +n<> u<53> t p<54> c<52> l<10:39> el<10:43> +n<> u<54> t p<55> c<53> l<10:39> el<10:43> +n<> u<55> t p<56> c<54> l<10:39> el<10:43> +n<> u<56> t p<57> c<55> l<10:39> el<10:43> +n<> u<57> t p<58> c<50> l<10:11> el<10:43> +n<> u<58> t p<59> c<57> l<10:11> el<10:43> +n<> u<59> t p<60> c<49> l<10:1> el<10:43> +n<> u<60> t p<61> c<59> l<10:1> el<10:44> +n<> u<61> t p<62> c<60> l<10:1> el<10:44> +n<> u<62> t p<63> c<61> l<10:1> el<10:44> +n<> u<63> t p<64> c<62> l<10:1> el<10:44> +n<> u<64> t p<65> c<63> l<10:1> el<10:44> +n<> u<65> t p<366> c<64> s<82> l<10:1> el<10:44> +n<> u<66> t p<76> s<75> l<11:11> el<11:11> +n u<67> t p<74> s<73> l<11:11> el<11:24> +n<32'd1> u<68> t p<69> l<11:39> el<11:44> +n<> u<69> t p<70> c<68> l<11:39> el<11:44> +n<> u<70> t p<71> c<69> l<11:39> el<11:44> +n<> u<71> t p<72> c<70> l<11:39> el<11:44> +n<> u<72> t p<73> c<71> l<11:39> el<11:44> +n<> u<73> t p<74> c<72> l<11:39> el<11:44> +n<> u<74> t p<75> c<67> l<11:11> el<11:44> +n<> u<75> t p<76> c<74> l<11:11> el<11:44> +n<> u<76> t p<77> c<66> l<11:1> el<11:44> +n<> u<77> t p<78> c<76> l<11:1> el<11:45> +n<> u<78> t p<79> c<77> l<11:1> el<11:45> +n<> u<79> t p<80> c<78> l<11:1> el<11:45> +n<> u<80> t p<81> c<79> l<11:1> el<11:45> +n<> u<81> t p<82> c<80> l<11:1> el<11:45> +n<> u<82> t p<366> c<81> s<99> l<11:1> el<11:45> +n<> u<83> t p<93> s<92> l<12:11> el<12:11> +n u<84> t p<91> s<90> l<12:11> el<12:21> +n<> u<85> t p<86> l<12:39> el<12:43> +n<> u<86> t p<87> c<85> l<12:39> el<12:43> +n<> u<87> t p<88> c<86> l<12:39> el<12:43> +n<> u<88> t p<89> c<87> l<12:39> el<12:43> +n<> u<89> t p<90> c<88> l<12:39> el<12:43> +n<> u<90> t p<91> c<89> l<12:39> el<12:43> +n<> u<91> t p<92> c<84> l<12:11> el<12:43> +n<> u<92> t p<93> c<91> l<12:11> el<12:43> +n<> u<93> t p<94> c<83> l<12:1> el<12:43> +n<> u<94> t p<95> c<93> l<12:1> el<12:44> +n<> u<95> t p<96> c<94> l<12:1> el<12:44> +n<> u<96> t p<97> c<95> l<12:1> el<12:44> +n<> u<97> t p<98> c<96> l<12:1> el<12:44> +n<> u<98> t p<99> c<97> l<12:1> el<12:44> +n<> u<99> t p<366> c<98> s<116> l<12:1> el<12:44> +n<> u<100> t p<110> s<109> l<13:11> el<13:11> +n u<101> t p<108> s<107> l<13:11> el<13:21> +n<> u<102> t p<103> l<13:39> el<13:43> +n<> u<103> t p<104> c<102> l<13:39> el<13:43> +n<> u<104> t p<105> c<103> l<13:39> el<13:43> +n<> u<105> t p<106> c<104> l<13:39> el<13:43> +n<> u<106> t p<107> c<105> l<13:39> el<13:43> +n<> u<107> t p<108> c<106> l<13:39> el<13:43> +n<> u<108> t p<109> c<101> l<13:11> el<13:43> +n<> u<109> t p<110> c<108> l<13:11> el<13:43> +n<> u<110> t p<111> c<100> l<13:1> el<13:43> +n<> u<111> t p<112> c<110> l<13:1> el<13:44> +n<> u<112> t p<113> c<111> l<13:1> el<13:44> +n<> u<113> t p<114> c<112> l<13:1> el<13:44> +n<> u<114> t p<115> c<113> l<13:1> el<13:44> +n<> u<115> t p<116> c<114> l<13:1> el<13:44> +n<> u<116> t p<366> c<115> s<133> l<13:1> el<13:44> +n<> u<117> t p<127> s<126> l<14:11> el<14:11> +n u<118> t p<125> s<124> l<14:11> el<14:25> +n<> u<119> t p<120> l<14:39> el<14:43> +n<> u<120> t p<121> c<119> l<14:39> el<14:43> +n<> u<121> t p<122> c<120> l<14:39> el<14:43> +n<> u<122> t p<123> c<121> l<14:39> el<14:43> +n<> u<123> t p<124> c<122> l<14:39> el<14:43> +n<> u<124> t p<125> c<123> l<14:39> el<14:43> +n<> u<125> t p<126> c<118> l<14:11> el<14:43> +n<> u<126> t p<127> c<125> l<14:11> el<14:43> +n<> u<127> t p<128> c<117> l<14:1> el<14:43> +n<> u<128> t p<129> c<127> l<14:1> el<14:44> +n<> u<129> t p<130> c<128> l<14:1> el<14:44> +n<> u<130> t p<131> c<129> l<14:1> el<14:44> +n<> u<131> t p<132> c<130> l<14:1> el<14:44> +n<> u<132> t p<133> c<131> l<14:1> el<14:44> +n<> u<133> t p<366> c<132> s<150> l<14:1> el<14:44> +n<> u<134> t p<144> s<143> l<15:11> el<15:11> +n u<135> t p<142> s<141> l<15:11> el<15:36> +n<> u<136> t p<137> l<15:39> el<15:43> +n<> u<137> t p<138> c<136> l<15:39> el<15:43> +n<> u<138> t p<139> c<137> l<15:39> el<15:43> +n<> u<139> t p<140> c<138> l<15:39> el<15:43> +n<> u<140> t p<141> c<139> l<15:39> el<15:43> +n<> u<141> t p<142> c<140> l<15:39> el<15:43> +n<> u<142> t p<143> c<135> l<15:11> el<15:43> +n<> u<143> t p<144> c<142> l<15:11> el<15:43> +n<> u<144> t p<145> c<134> l<15:1> el<15:43> +n<> u<145> t p<146> c<144> l<15:1> el<15:44> +n<> u<146> t p<147> c<145> l<15:1> el<15:44> +n<> u<147> t p<148> c<146> l<15:1> el<15:44> +n<> u<148> t p<149> c<147> l<15:1> el<15:44> +n<> u<149> t p<150> c<148> l<15:1> el<15:44> +n<> u<150> t p<366> c<149> s<175> l<15:1> el<15:44> +n<> u<151> t p<169> s<168> l<16:11> el<16:11> +n u<152> t p<167> s<166> l<16:11> el<16:20> +n u<153> t p<154> l<16:40> el<16:65> +n<> u<154> t p<155> c<153> l<16:40> el<16:65> +n<> u<155> t p<156> c<154> l<16:40> el<16:65> +n<> u<156> t p<162> c<155> s<161> l<16:40> el<16:65> +n<> u<157> t p<158> l<16:69> el<16:73> +n<> u<158> t p<159> c<157> l<16:69> el<16:73> +n<> u<159> t p<160> c<158> l<16:69> el<16:73> +n<> u<160> t p<162> c<159> l<16:69> el<16:73> +n<> u<161> t p<162> s<160> l<16:66> el<16:68> +n<> u<162> t p<163> c<156> l<16:40> el<16:73> +n<> u<163> t p<164> c<162> l<16:39> el<16:74> +n<> u<164> t p<165> c<163> l<16:39> el<16:74> +n<> u<165> t p<166> c<164> l<16:39> el<16:74> +n<> u<166> t p<167> c<165> l<16:39> el<16:74> +n<> u<167> t p<168> c<152> l<16:11> el<16:74> +n<> u<168> t p<169> c<167> l<16:11> el<16:74> +n<> u<169> t p<170> c<151> l<16:1> el<16:74> +n<> u<170> t p<171> c<169> l<16:1> el<16:75> +n<> u<171> t p<172> c<170> l<16:1> el<16:75> +n<> u<172> t p<173> c<171> l<16:1> el<16:75> +n<> u<173> t p<174> c<172> l<16:1> el<16:75> +n<> u<174> t p<175> c<173> l<16:1> el<16:75> +n<> u<175> t p<366> c<174> s<335> l<16:1> el<16:75> +n<> u<176> t p<329> s<328> l<19:11> el<19:11> +n u<177> t p<327> s<326> l<19:11> el<19:23> +n<2'b11> u<178> t p<179> l<20:29> el<20:34> +n<> u<179> t p<180> c<178> l<20:29> el<20:34> +n<> u<180> t p<181> c<179> l<20:29> el<20:34> +n<> u<181> t p<322> c<180> s<193> l<20:29> el<20:34> +n u<182> t p<183> l<21:30> el<21:40> +n<> u<183> t p<184> c<182> l<21:30> el<21:40> +n<> u<184> t p<185> c<183> l<21:30> el<21:40> +n<> u<185> t p<191> c<184> s<190> l<21:30> el<21:40> +n<1> u<186> t p<187> l<21:44> el<21:45> +n<> u<187> t p<188> c<186> l<21:44> el<21:45> +n<> u<188> t p<189> c<187> l<21:44> el<21:45> +n<> u<189> t p<191> c<188> l<21:44> el<21:45> +n<> u<190> t p<191> s<189> l<21:41> el<21:43> +n<> u<191> t p<192> c<185> l<21:30> el<21:45> +n<> u<192> t p<193> c<191> l<21:29> el<21:46> +n<> u<193> t p<322> c<192> s<197> l<21:29> el<21:46> +n<2'b11> u<194> t p<195> l<22:29> el<22:34> +n<> u<195> t p<196> c<194> l<22:29> el<22:34> +n<> u<196> t p<197> c<195> l<22:29> el<22:34> +n<> u<197> t p<322> c<196> s<209> l<22:29> el<22:34> +n u<198> t p<199> l<23:30> el<23:40> +n<> u<199> t p<200> c<198> l<23:30> el<23:40> +n<> u<200> t p<201> c<199> l<23:30> el<23:40> +n<> u<201> t p<207> c<200> s<206> l<23:30> el<23:40> +n<1> u<202> t p<203> l<23:44> el<23:45> +n<> u<203> t p<204> c<202> l<23:44> el<23:45> +n<> u<204> t p<205> c<203> l<23:44> el<23:45> +n<> u<205> t p<207> c<204> l<23:44> el<23:45> +n<> u<206> t p<207> s<205> l<23:41> el<23:43> +n<> u<207> t p<208> c<201> l<23:30> el<23:45> +n<> u<208> t p<209> c<207> l<23:29> el<23:46> +n<> u<209> t p<322> c<208> s<213> l<23:29> el<23:46> +n<8'b11111111> u<210> t p<211> l<24:29> el<24:40> +n<> u<211> t p<212> c<210> l<24:29> el<24:40> +n<> u<212> t p<213> c<211> l<24:29> el<24:40> +n<> u<213> t p<322> c<212> s<225> l<24:29> el<24:40> +n u<214> t p<215> l<25:30> el<25:44> +n<> u<215> t p<216> c<214> l<25:30> el<25:44> +n<> u<216> t p<217> c<215> l<25:30> el<25:44> +n<> u<217> t p<223> c<216> s<222> l<25:30> el<25:44> +n<1> u<218> t p<219> l<25:48> el<25:49> +n<> u<219> t p<220> c<218> l<25:48> el<25:49> +n<> u<220> t p<221> c<219> l<25:48> el<25:49> +n<> u<221> t p<223> c<220> l<25:48> el<25:49> +n<> u<222> t p<223> s<221> l<25:45> el<25:47> +n<> u<223> t p<224> c<217> l<25:30> el<25:49> +n<> u<224> t p<225> c<223> l<25:29> el<25:50> +n<> u<225> t p<322> c<224> s<237> l<25:29> el<25:50> +n u<226> t p<227> l<26:30> el<26:44> +n<> u<227> t p<228> c<226> l<26:30> el<26:44> +n<> u<228> t p<229> c<227> l<26:30> el<26:44> +n<> u<229> t p<235> c<228> s<234> l<26:30> el<26:44> +n<1> u<230> t p<231> l<26:48> el<26:49> +n<> u<231> t p<232> c<230> l<26:48> el<26:49> +n<> u<232> t p<233> c<231> l<26:48> el<26:49> +n<> u<233> t p<235> c<232> l<26:48> el<26:49> +n<> u<234> t p<235> s<233> l<26:45> el<26:47> +n<> u<235> t p<236> c<229> l<26:30> el<26:49> +n<> u<236> t p<237> c<235> l<26:29> el<26:50> +n<> u<237> t p<322> c<236> s<241> l<26:29> el<26:50> +n<4'b1111> u<238> t p<239> l<27:29> el<27:36> +n<> u<239> t p<240> c<238> l<27:29> el<27:36> +n<> u<240> t p<241> c<239> l<27:29> el<27:36> +n<> u<241> t p<322> c<240> s<253> l<27:29> el<27:36> +n u<242> t p<243> l<28:30> el<28:39> +n<> u<243> t p<244> c<242> l<28:30> el<28:39> +n<> u<244> t p<245> c<243> l<28:30> el<28:39> +n<> u<245> t p<251> c<244> s<250> l<28:30> el<28:39> +n<1> u<246> t p<247> l<28:43> el<28:44> +n<> u<247> t p<248> c<246> l<28:43> el<28:44> +n<> u<248> t p<249> c<247> l<28:43> el<28:44> +n<> u<249> t p<251> c<248> l<28:43> el<28:44> +n<> u<250> t p<251> s<249> l<28:40> el<28:42> +n<> u<251> t p<252> c<245> l<28:30> el<28:44> +n<> u<252> t p<253> c<251> l<28:29> el<28:45> +n<> u<253> t p<322> c<252> s<257> l<28:29> el<28:45> +n<> u<254> t p<255> l<29:29> el<29:33> +n<> u<255> t p<256> c<254> l<29:29> el<29:33> +n<> u<256> t p<257> c<255> l<29:29> el<29:33> +n<> u<257> t p<322> c<256> s<269> l<29:29> el<29:33> +n u<258> t p<259> l<30:30> el<30:44> +n<> u<259> t p<260> c<258> l<30:30> el<30:44> +n<> u<260> t p<261> c<259> l<30:30> el<30:44> +n<> u<261> t p<267> c<260> s<266> l<30:30> el<30:44> +n<0> u<262> t p<263> l<30:48> el<30:49> +n<> u<263> t p<264> c<262> l<30:48> el<30:49> +n<> u<264> t p<265> c<263> l<30:48> el<30:49> +n<> u<265> t p<267> c<264> l<30:48> el<30:49> +n<> u<266> t p<267> s<265> l<30:45> el<30:47> +n<> u<267> t p<268> c<261> l<30:30> el<30:49> +n<> u<268> t p<269> c<267> l<30:29> el<30:50> +n<> u<269> t p<322> c<268> s<273> l<30:29> el<30:50> +n<> u<270> t p<271> l<31:29> el<31:33> +n<> u<271> t p<272> c<270> l<31:29> el<31:33> +n<> u<272> t p<273> c<271> l<31:29> el<31:33> +n<> u<273> t p<322> c<272> s<277> l<31:29> el<31:33> +n<> u<274> t p<275> l<32:29> el<32:33> +n<> u<275> t p<276> c<274> l<32:29> el<32:33> +n<> u<276> t p<277> c<275> l<32:29> el<32:33> +n<> u<277> t p<322> c<276> s<289> l<32:29> el<32:33> +n u<278> t p<279> l<33:30> el<33:39> +n<> u<279> t p<280> c<278> l<33:30> el<33:39> +n<> u<280> t p<281> c<279> l<33:30> el<33:39> +n<> u<281> t p<287> c<280> s<286> l<33:30> el<33:39> +n<1> u<282> t p<283> l<33:43> el<33:44> +n<> u<283> t p<284> c<282> l<33:43> el<33:44> +n<> u<284> t p<285> c<283> l<33:43> el<33:44> +n<> u<285> t p<287> c<284> l<33:43> el<33:44> +n<> u<286> t p<287> s<285> l<33:40> el<33:42> +n<> u<287> t p<288> c<281> l<33:30> el<33:44> +n<> u<288> t p<289> c<287> l<33:29> el<33:45> +n<> u<289> t p<322> c<288> s<293> l<33:29> el<33:45> +n<2'b11> u<290> t p<291> l<34:29> el<34:34> +n<> u<291> t p<292> c<290> l<34:29> el<34:34> +n<> u<292> t p<293> c<291> l<34:29> el<34:34> +n<> u<293> t p<322> c<292> s<305> l<34:29> el<34:34> +n u<294> t p<295> l<35:30> el<35:39> +n<> u<295> t p<296> c<294> l<35:30> el<35:39> +n<> u<296> t p<297> c<295> l<35:30> el<35:39> +n<> u<297> t p<303> c<296> s<302> l<35:30> el<35:39> +n<1> u<298> t p<299> l<35:43> el<35:44> +n<> u<299> t p<300> c<298> l<35:43> el<35:44> +n<> u<300> t p<301> c<299> l<35:43> el<35:44> +n<> u<301> t p<303> c<300> l<35:43> el<35:44> +n<> u<302> t p<303> s<301> l<35:40> el<35:42> +n<> u<303> t p<304> c<297> l<35:30> el<35:44> +n<> u<304> t p<305> c<303> l<35:29> el<35:45> +n<> u<305> t p<322> c<304> s<317> l<35:29> el<35:45> +n u<306> t p<307> l<36:30> el<36:39> +n<> u<307> t p<308> c<306> l<36:30> el<36:39> +n<> u<308> t p<309> c<307> l<36:30> el<36:39> +n<> u<309> t p<315> c<308> s<314> l<36:30> el<36:39> +n<1> u<310> t p<311> l<36:43> el<36:44> +n<> u<311> t p<312> c<310> l<36:43> el<36:44> +n<> u<312> t p<313> c<311> l<36:43> el<36:44> +n<> u<313> t p<315> c<312> l<36:43> el<36:44> +n<> u<314> t p<315> s<313> l<36:40> el<36:42> +n<> u<315> t p<316> c<309> l<36:30> el<36:44> +n<> u<316> t p<317> c<315> l<36:29> el<36:45> +n<> u<317> t p<322> c<316> s<321> l<36:29> el<36:45> +n<2'b11> u<318> t p<319> l<37:29> el<37:34> +n<> u<319> t p<320> c<318> l<37:29> el<37:34> +n<> u<320> t p<321> c<319> l<37:29> el<37:34> +n<> u<321> t p<322> c<320> l<37:29> el<37:34> +n<> u<322> t p<323> c<181> l<19:27> el<38:28> +n<> u<323> t p<324> c<322> l<19:27> el<38:28> +n<> u<324> t p<325> c<323> l<19:27> el<38:28> +n<> u<325> t p<326> c<324> l<19:27> el<38:28> +n<> u<326> t p<327> c<325> l<19:27> el<38:28> +n<> u<327> t p<328> c<177> l<19:11> el<38:28> +n<> u<328> t p<329> c<327> l<19:11> el<38:28> +n<> u<329> t p<330> c<176> l<19:1> el<38:28> +n<> u<330> t p<331> c<329> l<19:1> el<38:29> +n<> u<331> t p<332> c<330> l<19:1> el<38:29> +n<> u<332> t p<333> c<331> l<19:1> el<38:29> +n<> u<333> t p<334> c<332> l<19:1> el<38:29> +n<> u<334> t p<335> c<333> l<19:1> el<38:29> +n<> u<335> t p<366> c<334> s<364> l<19:1> el<38:29> +n u<336> t p<337> l<40:5> el<40:17> +n<> u<337> t p<338> c<336> l<40:5> el<40:17> +n<> u<338> t p<339> c<337> l<40:5> el<40:17> +n<> u<339> t p<345> c<338> s<344> l<40:5> el<40:17> +n<32'b11111111111111111111110011111111> u<340> t p<341> l<40:21> el<40:57> +n<> u<341> t p<342> c<340> l<40:21> el<40:57> +n<> u<342> t p<343> c<341> l<40:21> el<40:57> +n<> u<343> t p<345> c<342> l<40:21> el<40:57> +n<> u<344> t p<345> s<343> l<40:18> el<40:20> +n<> u<345> t p<359> c<339> s<357> l<40:5> el<40:57> +n u<346> t p<352> s<351> l<41:3> el<41:7> +n u<347> t p<348> l<41:8> el<41:12> +n<> u<348> t p<351> c<347> s<350> l<41:8> el<41:12> +n<> u<349> t p<350> l<41:13> el<41:13> +n<> u<350> t p<351> c<349> l<41:13> el<41:13> +n<> u<351> t p<352> c<348> l<41:8> el<41:14> +n<> u<352> t p<353> c<346> l<41:3> el<41:15> +n<> u<353> t p<354> c<352> l<41:3> el<41:15> +n<> u<354> t p<356> c<353> s<355> l<41:3> el<41:15> +n<> u<355> t p<356> l<42:1> el<42:4> +n<> u<356> t p<357> c<354> l<40:59> el<42:4> +n<> u<357> t p<359> c<356> l<40:59> el<42:4> +n<> u<358> t p<359> s<345> l<40:1> el<40:3> +n<> u<359> t p<360> c<358> l<40:1> el<42:4> +n<> u<360> t p<361> c<359> l<40:1> el<42:4> +n<> u<361> t p<362> c<360> l<40:1> el<42:4> +n<> u<362> t p<363> c<361> l<40:1> el<42:4> +n<> u<363> t p<364> c<362> l<40:1> el<42:4> +n<> u<364> t p<366> c<363> s<365> l<40:1> el<42:4> +n<> u<365> t p<366> l<44:1> el<44:10> +n<> u<366> t p<367> c<14> l<6:1> el<44:10> +n<> u<367> t p<368> c<366> l<6:1> el<44:10> +n<> u<368> t p<369> c<9> l<2:1> el<44:10> +n<> u<369> t c<1> l<2:1> el<44:10> +AST_DEBUG_END +[WRN:PA0205] ${SURELOG_DIR}/tests/ParamEquivOp/dut.sv:2:1: No timescale set for "GOOD". +[WRN:PA0205] ${SURELOG_DIR}/tests/ParamEquivOp/dut.sv:6:1: No timescale set for "top". +[INF:CP0300] Compilation... +[INF:CP0303] ${SURELOG_DIR}/tests/ParamEquivOp/dut.sv:2:1: Compile module "work@GOOD". +[INF:CP0303] ${SURELOG_DIR}/tests/ParamEquivOp/dut.sv:6:1: Compile module "work@top". +[INF:EL0526] Design Elaboration... +[INF:CP0335] ${SURELOG_DIR}/tests/ParamEquivOp/dut.sv:41:3: Compile generate block "work@top.genblk1". +[NTE:EL0503] ${SURELOG_DIR}/tests/ParamEquivOp/dut.sv:6:1: Top level module "work@top". +[NTE:EL0508] Nb Top level modules: 1. +[NTE:EL0509] Max instance depth: 3. +[NTE:EL0510] Nb instances: 2. +[NTE:EL0511] Nb leaf instances: 1. +[INF:UH0706] Creating UHDM Model... +=== UHDM Object Stats Begin (Non-Elaborated Model) === +begin 1 +constant 117 +design 1 +gen_if 1 +gen_scope 2 +gen_scope_array 2 +int_typespec 14 +module_inst 6 +operation 24 +param_assign 20 +parameter 20 +range 14 +ref_module 2 +ref_obj 11 +ref_typespec 36 +=== UHDM Object Stats End === +[INF:UH0707] Elaborating UHDM... +=== UHDM Object Stats Begin (Elaborated Model) === +begin 1 +constant 117 +design 1 +gen_if 1 +gen_scope 3 +gen_scope_array 3 +int_typespec 14 +module_inst 7 +operation 24 +param_assign 20 +parameter 20 +range 14 +ref_module 2 +ref_obj 11 +ref_typespec 36 +=== UHDM Object Stats End === +[INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/ParamEquivOp/slpp_all/surelog.uhdm ... +[INF:UH0709] Writing UHDM Html Coverage: ${SURELOG_DIR}/build/regression/ParamEquivOp/slpp_all/checker/surelog.chk.html ... +[INF:UH0710] Loading UHDM DB: ${SURELOG_DIR}/build/regression/ParamEquivOp/slpp_all/surelog.uhdm ... +[INF:UH0711] Decompiling UHDM... +====== UHDM ======= +design: (work@top) +|vpiElaborated:1 +|vpiName:work@top +|uhdmallModules: +\_module_inst: work@GOOD (work@GOOD), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:2:1, endln:3:10 + |vpiParent: + \_design: (work@top) + |vpiFullName:work@GOOD + |vpiDefName:work@GOOD +|uhdmallModules: +\_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiParent: + \_design: (work@top) + |vpiFullName:work@top + |vpiParameter: + \_parameter: (work@top.p_edma_irq_read_clear), line:8:11, endln:8:32 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |BIN:0 + |vpiTypespec: + \_ref_typespec: (work@top.p_edma_irq_read_clear) + |vpiParent: + \_parameter: (work@top.p_edma_irq_read_clear), line:8:11, endln:8:32 + |vpiFullName:work@top.p_edma_irq_read_clear + |vpiActual: + \_int_typespec: , line:8:1, endln:8:43 + |vpiName:p_edma_irq_read_clear + |vpiFullName:work@top.p_edma_irq_read_clear + |vpiParameter: + \_parameter: (work@top.p_edma_tx_pkt_buffer), line:9:11, endln:9:31 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |BIN:1 + |vpiTypespec: + \_ref_typespec: (work@top.p_edma_tx_pkt_buffer) + |vpiParent: + \_parameter: (work@top.p_edma_tx_pkt_buffer), line:9:11, endln:9:31 + |vpiFullName:work@top.p_edma_tx_pkt_buffer + |vpiActual: + \_int_typespec: , line:9:1, endln:9:43 + |vpiName:p_edma_tx_pkt_buffer + |vpiFullName:work@top.p_edma_tx_pkt_buffer + |vpiParameter: + \_parameter: (work@top.p_edma_rx_pkt_buffer), line:10:11, endln:10:31 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |BIN:1 + |vpiTypespec: + \_ref_typespec: (work@top.p_edma_rx_pkt_buffer) + |vpiParent: + \_parameter: (work@top.p_edma_rx_pkt_buffer), line:10:11, endln:10:31 + |vpiFullName:work@top.p_edma_rx_pkt_buffer + |vpiActual: + \_int_typespec: , line:10:1, endln:10:43 + |vpiName:p_edma_rx_pkt_buffer + |vpiFullName:work@top.p_edma_rx_pkt_buffer + |vpiParameter: + \_parameter: (work@top.p_edma_queues), line:11:11, endln:11:24 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |DEC:1 + |vpiName:p_edma_queues + |vpiFullName:work@top.p_edma_queues + |vpiParameter: + \_parameter: (work@top.p_edma_tsu), line:12:11, endln:12:21 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |BIN:1 + |vpiTypespec: + \_ref_typespec: (work@top.p_edma_tsu) + |vpiParent: + \_parameter: (work@top.p_edma_tsu), line:12:11, endln:12:21 + |vpiFullName:work@top.p_edma_tsu + |vpiActual: + \_int_typespec: , line:12:1, endln:12:43 + |vpiName:p_edma_tsu + |vpiFullName:work@top.p_edma_tsu + |vpiParameter: + \_parameter: (work@top.p_edma_axi), line:13:11, endln:13:21 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |BIN:1 + |vpiTypespec: + \_ref_typespec: (work@top.p_edma_axi) + |vpiParent: + \_parameter: (work@top.p_edma_axi), line:13:11, endln:13:21 + |vpiFullName:work@top.p_edma_axi + |vpiActual: + \_int_typespec: , line:13:1, endln:13:43 + |vpiName:p_edma_axi + |vpiFullName:work@top.p_edma_axi + |vpiParameter: + \_parameter: (work@top.p_edma_has_pcs), line:14:11, endln:14:25 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |BIN:1 + |vpiTypespec: + \_ref_typespec: (work@top.p_edma_has_pcs) + |vpiParent: + \_parameter: (work@top.p_edma_has_pcs), line:14:11, endln:14:25 + |vpiFullName:work@top.p_edma_has_pcs + |vpiActual: + \_int_typespec: , line:14:1, endln:14:43 + |vpiName:p_edma_has_pcs + |vpiFullName:work@top.p_edma_has_pcs + |vpiParameter: + \_parameter: (work@top.p_edma_ext_fifo_interface), line:15:11, endln:15:36 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |BIN:0 + |vpiTypespec: + \_ref_typespec: (work@top.p_edma_ext_fifo_interface) + |vpiParent: + \_parameter: (work@top.p_edma_ext_fifo_interface), line:15:11, endln:15:36 + |vpiFullName:work@top.p_edma_ext_fifo_interface + |vpiActual: + \_int_typespec: , line:15:1, endln:15:43 + |vpiName:p_edma_ext_fifo_interface + |vpiFullName:work@top.p_edma_ext_fifo_interface + |vpiParameter: + \_parameter: (work@top.p_has_dma), line:16:11, endln:16:20 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiName:p_has_dma + |vpiFullName:work@top.p_has_dma + |vpiParameter: + \_parameter: (work@top.p_int_exists), line:19:11, endln:19:23 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiName:p_int_exists + |vpiFullName:work@top.p_int_exists + |vpiParamAssign: + \_param_assign: , line:8:11, endln:8:43 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiRhs: + \_constant: , line:8:39, endln:8:43 + |vpiParent: + \_param_assign: , line:8:11, endln:8:43 + |vpiDecompile:1'b0 + |vpiSize:1 + |BIN:0 + |vpiTypespec: + \_ref_typespec: (work@top) + |vpiParent: + \_constant: , line:8:39, endln:8:43 + |vpiFullName:work@top + |vpiActual: + \_int_typespec: , line:8:1, endln:8:43 + |vpiConstType:3 + |vpiLhs: + \_parameter: (work@top.p_edma_irq_read_clear), line:8:11, endln:8:32 + |vpiParamAssign: + \_param_assign: , line:9:11, endln:9:43 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiRhs: + \_constant: , line:9:39, endln:9:43 + |vpiParent: + \_param_assign: , line:9:11, endln:9:43 + |vpiDecompile:1'b1 + |vpiSize:1 + |BIN:1 + |vpiTypespec: + \_ref_typespec: (work@top) + |vpiParent: + \_constant: , line:9:39, endln:9:43 + |vpiFullName:work@top + |vpiActual: + \_int_typespec: , line:9:1, endln:9:43 + |vpiConstType:3 + |vpiLhs: + \_parameter: (work@top.p_edma_tx_pkt_buffer), line:9:11, endln:9:31 + |vpiParamAssign: + \_param_assign: , line:10:11, endln:10:43 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiRhs: + \_constant: , line:10:39, endln:10:43 + |vpiParent: + \_param_assign: , line:10:11, endln:10:43 + |vpiDecompile:1'b1 + |vpiSize:1 + |BIN:1 + |vpiTypespec: + \_ref_typespec: (work@top) + |vpiParent: + \_constant: , line:10:39, endln:10:43 + |vpiFullName:work@top + |vpiActual: + \_int_typespec: , line:10:1, endln:10:43 + |vpiConstType:3 + |vpiLhs: + \_parameter: (work@top.p_edma_rx_pkt_buffer), line:10:11, endln:10:31 + |vpiParamAssign: + \_param_assign: , line:11:11, endln:11:44 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiRhs: + \_constant: , line:11:39, endln:11:44 + |vpiParent: + \_param_assign: , line:11:11, endln:11:44 + |vpiDecompile:32'd1 + |vpiSize:32 + |DEC:1 + |vpiTypespec: + \_ref_typespec: (work@top) + |vpiParent: + \_constant: , line:11:39, endln:11:44 + |vpiFullName:work@top + |vpiConstType:1 + |vpiLhs: + \_parameter: (work@top.p_edma_queues), line:11:11, endln:11:24 + |vpiParamAssign: + \_param_assign: , line:12:11, endln:12:43 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiRhs: + \_constant: , line:12:39, endln:12:43 + |vpiParent: + \_param_assign: , line:12:11, endln:12:43 + |vpiDecompile:1'b1 + |vpiSize:1 + |BIN:1 + |vpiTypespec: + \_ref_typespec: (work@top) + |vpiParent: + \_constant: , line:12:39, endln:12:43 + |vpiFullName:work@top + |vpiActual: + \_int_typespec: , line:12:1, endln:12:43 + |vpiConstType:3 + |vpiLhs: + \_parameter: (work@top.p_edma_tsu), line:12:11, endln:12:21 + |vpiParamAssign: + \_param_assign: , line:13:11, endln:13:43 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiRhs: + \_constant: , line:13:39, endln:13:43 + |vpiParent: + \_param_assign: , line:13:11, endln:13:43 + |vpiDecompile:1'b1 + |vpiSize:1 + |BIN:1 + |vpiTypespec: + \_ref_typespec: (work@top) + |vpiParent: + \_constant: , line:13:39, endln:13:43 + |vpiFullName:work@top + |vpiActual: + \_int_typespec: , line:13:1, endln:13:43 + |vpiConstType:3 + |vpiLhs: + \_parameter: (work@top.p_edma_axi), line:13:11, endln:13:21 + |vpiParamAssign: + \_param_assign: , line:14:11, endln:14:43 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiRhs: + \_constant: , line:14:39, endln:14:43 + |vpiParent: + \_param_assign: , line:14:11, endln:14:43 + |vpiDecompile:1'b1 + |vpiSize:1 + |BIN:1 + |vpiTypespec: + \_ref_typespec: (work@top) + |vpiParent: + \_constant: , line:14:39, endln:14:43 + |vpiFullName:work@top + |vpiActual: + \_int_typespec: , line:14:1, endln:14:43 + |vpiConstType:3 + |vpiLhs: + \_parameter: (work@top.p_edma_has_pcs), line:14:11, endln:14:25 + |vpiParamAssign: + \_param_assign: , line:15:11, endln:15:43 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiRhs: + \_constant: , line:15:39, endln:15:43 + |vpiParent: + \_param_assign: , line:15:11, endln:15:43 + |vpiDecompile:1'b0 + |vpiSize:1 + |BIN:0 + |vpiTypespec: + \_ref_typespec: (work@top) + |vpiParent: + \_constant: , line:15:39, endln:15:43 + |vpiFullName:work@top + |vpiActual: + \_int_typespec: , line:15:1, endln:15:43 + |vpiConstType:3 + |vpiLhs: + \_parameter: (work@top.p_edma_ext_fifo_interface), line:15:11, endln:15:36 + |vpiParamAssign: + \_param_assign: , line:16:11, endln:16:74 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiRhs: + \_operation: , line:16:40, endln:16:73 + |vpiParent: + \_param_assign: , line:16:11, endln:16:74 + |vpiOpType:14 + |vpiOperand: + \_ref_obj: (work@top.p_edma_ext_fifo_interface), line:16:40, endln:16:65 + |vpiParent: + \_operation: , line:16:40, endln:16:73 + |vpiName:p_edma_ext_fifo_interface + |vpiFullName:work@top.p_edma_ext_fifo_interface + |vpiOperand: + \_constant: , line:16:69, endln:16:73 + |vpiParent: + \_operation: , line:16:40, endln:16:73 + |vpiDecompile:1'b0 + |vpiSize:1 + |BIN:0 + |vpiConstType:3 + |vpiLhs: + \_parameter: (work@top.p_has_dma), line:16:11, endln:16:20 + |vpiParamAssign: + \_param_assign: , line:19:11, endln:38:28 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiRhs: + \_operation: , line:19:27, endln:38:28 + |vpiParent: + \_param_assign: , line:19:11, endln:38:28 + |vpiOpType:33 + |vpiOperand: + \_constant: , line:20:29, endln:20:34 + |vpiDecompile:2'b11 + |vpiSize:2 + |BIN:11 + |vpiConstType:3 + |vpiOperand: + \_operation: , line:21:30, endln:21:45 + |vpiParent: + \_operation: , line:19:27, endln:38:28 + |vpiOpType:14 + |vpiOperand: + \_ref_obj: (work@top.p_edma_tsu), line:21:30, endln:21:40 + |vpiParent: + \_operation: , line:21:30, endln:21:45 + |vpiName:p_edma_tsu + |vpiFullName:work@top.p_edma_tsu + |vpiOperand: + \_constant: , line:21:44, endln:21:45 + |vpiParent: + \_operation: , line:21:30, endln:21:45 + |vpiDecompile:1 + |vpiSize:64 + |UINT:1 + |vpiConstType:9 + |vpiOperand: + \_constant: , line:22:29, endln:22:34 + |vpiDecompile:2'b11 + |vpiSize:2 + |BIN:11 + |vpiConstType:3 + |vpiOperand: + \_operation: , line:23:30, endln:23:45 + |vpiParent: + \_operation: , line:19:27, endln:38:28 + |vpiOpType:14 + |vpiOperand: + \_ref_obj: (work@top.p_edma_tsu), line:23:30, endln:23:40 + |vpiParent: + \_operation: , line:23:30, endln:23:45 + |vpiName:p_edma_tsu + |vpiFullName:work@top.p_edma_tsu + |vpiOperand: + \_constant: , line:23:44, endln:23:45 + |vpiParent: + \_operation: , line:23:30, endln:23:45 + |vpiDecompile:1 + |vpiSize:64 + |UINT:1 + |vpiConstType:9 + |vpiOperand: + \_constant: , line:24:29, endln:24:40 + |vpiDecompile:8'b11111111 + |vpiSize:8 + |BIN:11111111 + |vpiConstType:3 + |vpiOperand: + \_operation: , line:25:30, endln:25:49 + |vpiParent: + \_operation: , line:19:27, endln:38:28 + |vpiOpType:14 + |vpiOperand: + \_ref_obj: (work@top.p_edma_has_pcs), line:25:30, endln:25:44 + |vpiParent: + \_operation: , line:25:30, endln:25:49 + |vpiName:p_edma_has_pcs + |vpiFullName:work@top.p_edma_has_pcs + |vpiOperand: + \_constant: , line:25:48, endln:25:49 + |vpiParent: + \_operation: , line:25:30, endln:25:49 + |vpiDecompile:1 + |vpiSize:64 + |UINT:1 + |vpiConstType:9 + |vpiOperand: + \_operation: , line:26:30, endln:26:49 + |vpiParent: + \_operation: , line:19:27, endln:38:28 + |vpiOpType:14 + |vpiOperand: + \_ref_obj: (work@top.p_edma_has_pcs), line:26:30, endln:26:44 + |vpiParent: + \_operation: , line:26:30, endln:26:49 + |vpiName:p_edma_has_pcs + |vpiFullName:work@top.p_edma_has_pcs + |vpiOperand: + \_constant: , line:26:48, endln:26:49 + |vpiParent: + \_operation: , line:26:30, endln:26:49 + |vpiDecompile:1 + |vpiSize:64 + |UINT:1 + |vpiConstType:9 + |vpiOperand: + \_constant: , line:27:29, endln:27:36 + |vpiDecompile:4'b1111 + |vpiSize:4 + |BIN:1111 + |vpiConstType:3 + |vpiOperand: + \_operation: , line:28:30, endln:28:44 + |vpiParent: + \_operation: , line:19:27, endln:38:28 + |vpiOpType:14 + |vpiOperand: + \_ref_obj: (work@top.p_has_dma), line:28:30, endln:28:39 + |vpiParent: + \_operation: , line:28:30, endln:28:44 + |vpiName:p_has_dma + |vpiFullName:work@top.p_has_dma + |vpiOperand: + \_constant: , line:28:43, endln:28:44 + |vpiParent: + \_operation: , line:28:30, endln:28:44 + |vpiDecompile:1 + |vpiSize:64 + |UINT:1 + |vpiConstType:9 + |vpiOperand: + \_constant: , line:29:29, endln:29:33 + |vpiDecompile:1'b1 + |vpiSize:1 + |BIN:1 + |vpiConstType:3 + |vpiOperand: + \_operation: , line:30:30, endln:30:49 + |vpiParent: + \_operation: , line:19:27, endln:38:28 + |vpiOpType:14 + |vpiOperand: + \_ref_obj: (work@top.p_edma_has_pcs), line:30:30, endln:30:44 + |vpiParent: + \_operation: , line:30:30, endln:30:49 + |vpiName:p_edma_has_pcs + |vpiFullName:work@top.p_edma_has_pcs + |vpiOperand: + \_constant: , line:30:48, endln:30:49 + |vpiParent: + \_operation: , line:30:30, endln:30:49 + |vpiDecompile:0 + |vpiSize:64 + |UINT:0 + |vpiConstType:9 + |vpiOperand: + \_constant: , line:31:29, endln:31:33 + |vpiDecompile:1'b0 + |vpiSize:1 + |BIN:0 + |vpiConstType:3 + |vpiOperand: + \_constant: , line:32:29, endln:32:33 + |vpiDecompile:1'b1 + |vpiSize:1 + |BIN:1 + |vpiConstType:3 + |vpiOperand: + \_operation: , line:33:30, endln:33:44 + |vpiParent: + \_operation: , line:19:27, endln:38:28 + |vpiOpType:14 + |vpiOperand: + \_ref_obj: (work@top.p_has_dma), line:33:30, endln:33:39 + |vpiParent: + \_operation: , line:33:30, endln:33:44 + |vpiName:p_has_dma + |vpiFullName:work@top.p_has_dma + |vpiOperand: + \_constant: , line:33:43, endln:33:44 + |vpiParent: + \_operation: , line:33:30, endln:33:44 + |vpiDecompile:1 + |vpiSize:64 + |UINT:1 + |vpiConstType:9 + |vpiOperand: + \_constant: , line:34:29, endln:34:34 + |vpiDecompile:2'b11 + |vpiSize:2 + |BIN:11 + |vpiConstType:3 + |vpiOperand: + \_operation: , line:35:30, endln:35:44 + |vpiParent: + \_operation: , line:19:27, endln:38:28 + |vpiOpType:14 + |vpiOperand: + \_ref_obj: (work@top.p_has_dma), line:35:30, endln:35:39 + |vpiParent: + \_operation: , line:35:30, endln:35:44 + |vpiName:p_has_dma + |vpiFullName:work@top.p_has_dma + |vpiOperand: + \_constant: , line:35:43, endln:35:44 + |vpiParent: + \_operation: , line:35:30, endln:35:44 + |vpiDecompile:1 + |vpiSize:64 + |UINT:1 + |vpiConstType:9 + |vpiOperand: + \_operation: , line:36:30, endln:36:44 + |vpiParent: + \_operation: , line:19:27, endln:38:28 + |vpiOpType:14 + |vpiOperand: + \_ref_obj: (work@top.p_has_dma), line:36:30, endln:36:39 + |vpiParent: + \_operation: , line:36:30, endln:36:44 + |vpiName:p_has_dma + |vpiFullName:work@top.p_has_dma + |vpiOperand: + \_constant: , line:36:43, endln:36:44 + |vpiParent: + \_operation: , line:36:30, endln:36:44 + |vpiDecompile:1 + |vpiSize:64 + |UINT:1 + |vpiConstType:9 + |vpiOperand: + \_constant: , line:37:29, endln:37:34 + |vpiDecompile:2'b11 + |vpiSize:2 + |BIN:11 + |vpiConstType:3 + |vpiLhs: + \_parameter: (work@top.p_int_exists), line:19:11, endln:19:23 + |vpiDefName:work@top + |vpiGenStmt: + \_gen_if: , line:40:1, endln:40:3 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiCondition: + \_operation: , line:40:5, endln:40:57 + |vpiParent: + \_gen_if: , line:40:1, endln:40:3 + |vpiOpType:14 + |vpiOperand: + \_ref_obj: (work@top.p_int_exists), line:40:5, endln:40:17 + |vpiParent: + \_operation: , line:40:5, endln:40:57 + |vpiName:p_int_exists + |vpiFullName:work@top.p_int_exists + |vpiOperand: + \_constant: , line:40:21, endln:40:57 + |vpiParent: + \_operation: , line:40:5, endln:40:57 + |vpiDecompile:32'b11111111111111111111110011111111 + |vpiSize:32 + |BIN:11111111111111111111110011111111 + |vpiConstType:3 + |vpiStmt: + \_begin: (work@top) + |vpiParent: + \_gen_if: , line:40:1, endln:40:3 + |vpiFullName:work@top + |vpiStmt: + \_ref_module: work@GOOD (good), line:41:8, endln:41:12 + |vpiParent: + \_begin: (work@top) + |vpiName:good + |vpiDefName:work@GOOD +|uhdmtopModules: +\_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiName:work@top + |vpiParameter: + \_parameter: (work@top.p_edma_irq_read_clear), line:8:11, endln:8:32 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |BIN:0 + |vpiTypespec: + \_ref_typespec: (work@top.p_edma_irq_read_clear) + |vpiParent: + \_parameter: (work@top.p_edma_irq_read_clear), line:8:11, endln:8:32 + |vpiFullName:work@top.p_edma_irq_read_clear + |vpiActual: + \_int_typespec: , line:8:1, endln:8:43 + |vpiName:p_edma_irq_read_clear + |vpiFullName:work@top.p_edma_irq_read_clear + |vpiParameter: + \_parameter: (work@top.p_edma_tx_pkt_buffer), line:9:11, endln:9:31 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |BIN:1 + |vpiTypespec: + \_ref_typespec: (work@top.p_edma_tx_pkt_buffer) + |vpiParent: + \_parameter: (work@top.p_edma_tx_pkt_buffer), line:9:11, endln:9:31 + |vpiFullName:work@top.p_edma_tx_pkt_buffer + |vpiActual: + \_int_typespec: , line:9:1, endln:9:43 + |vpiName:p_edma_tx_pkt_buffer + |vpiFullName:work@top.p_edma_tx_pkt_buffer + |vpiParameter: + \_parameter: (work@top.p_edma_rx_pkt_buffer), line:10:11, endln:10:31 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |BIN:1 + |vpiTypespec: + \_ref_typespec: (work@top.p_edma_rx_pkt_buffer) + |vpiParent: + \_parameter: (work@top.p_edma_rx_pkt_buffer), line:10:11, endln:10:31 + |vpiFullName:work@top.p_edma_rx_pkt_buffer + |vpiActual: + \_int_typespec: , line:10:1, endln:10:43 + |vpiName:p_edma_rx_pkt_buffer + |vpiFullName:work@top.p_edma_rx_pkt_buffer + |vpiParameter: + \_parameter: (work@top.p_edma_queues), line:11:11, endln:11:24 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |DEC:1 + |vpiName:p_edma_queues + |vpiFullName:work@top.p_edma_queues + |vpiParameter: + \_parameter: (work@top.p_edma_tsu), line:12:11, endln:12:21 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |BIN:1 + |vpiTypespec: + \_ref_typespec: (work@top.p_edma_tsu) + |vpiParent: + \_parameter: (work@top.p_edma_tsu), line:12:11, endln:12:21 + |vpiFullName:work@top.p_edma_tsu + |vpiActual: + \_int_typespec: , line:12:1, endln:12:43 + |vpiName:p_edma_tsu + |vpiFullName:work@top.p_edma_tsu + |vpiParameter: + \_parameter: (work@top.p_edma_axi), line:13:11, endln:13:21 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |BIN:1 + |vpiTypespec: + \_ref_typespec: (work@top.p_edma_axi) + |vpiParent: + \_parameter: (work@top.p_edma_axi), line:13:11, endln:13:21 + |vpiFullName:work@top.p_edma_axi + |vpiActual: + \_int_typespec: , line:13:1, endln:13:43 + |vpiName:p_edma_axi + |vpiFullName:work@top.p_edma_axi + |vpiParameter: + \_parameter: (work@top.p_edma_has_pcs), line:14:11, endln:14:25 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |BIN:1 + |vpiTypespec: + \_ref_typespec: (work@top.p_edma_has_pcs) + |vpiParent: + \_parameter: (work@top.p_edma_has_pcs), line:14:11, endln:14:25 + |vpiFullName:work@top.p_edma_has_pcs + |vpiActual: + \_int_typespec: , line:14:1, endln:14:43 + |vpiName:p_edma_has_pcs + |vpiFullName:work@top.p_edma_has_pcs + |vpiParameter: + \_parameter: (work@top.p_edma_ext_fifo_interface), line:15:11, endln:15:36 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |BIN:0 + |vpiTypespec: + \_ref_typespec: (work@top.p_edma_ext_fifo_interface) + |vpiParent: + \_parameter: (work@top.p_edma_ext_fifo_interface), line:15:11, endln:15:36 + |vpiFullName:work@top.p_edma_ext_fifo_interface + |vpiActual: + \_int_typespec: , line:15:1, endln:15:43 + |vpiName:p_edma_ext_fifo_interface + |vpiFullName:work@top.p_edma_ext_fifo_interface + |vpiParameter: + \_parameter: (work@top.p_has_dma), line:16:11, endln:16:20 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiName:p_has_dma + |vpiFullName:work@top.p_has_dma + |vpiParameter: + \_parameter: (work@top.p_int_exists), line:19:11, endln:19:23 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiName:p_int_exists + |vpiFullName:work@top.p_int_exists + |vpiParamAssign: + \_param_assign: , line:8:11, endln:8:43 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiRhs: + \_constant: , line:8:39, endln:8:43 + |vpiParent: + \_param_assign: , line:8:11, endln:8:43 + |vpiDecompile:1'b0 + |vpiSize:1 + |BIN:0 + |vpiTypespec: + \_ref_typespec: (work@top) + |vpiParent: + \_constant: , line:8:39, endln:8:43 + |vpiFullName:work@top + |vpiActual: + \_int_typespec: , line:8:1, endln:8:43 + |vpiConstType:3 + |vpiLhs: + \_parameter: (work@top.p_edma_irq_read_clear), line:8:11, endln:8:32 + |vpiParamAssign: + \_param_assign: , line:9:11, endln:9:43 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiRhs: + \_constant: , line:9:39, endln:9:43 + |vpiParent: + \_param_assign: , line:9:11, endln:9:43 + |vpiDecompile:1'b1 + |vpiSize:1 + |BIN:1 + |vpiTypespec: + \_ref_typespec: (work@top) + |vpiParent: + \_constant: , line:9:39, endln:9:43 + |vpiFullName:work@top + |vpiActual: + \_int_typespec: , line:9:1, endln:9:43 + |vpiConstType:3 + |vpiLhs: + \_parameter: (work@top.p_edma_tx_pkt_buffer), line:9:11, endln:9:31 + |vpiParamAssign: + \_param_assign: , line:10:11, endln:10:43 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiRhs: + \_constant: , line:10:39, endln:10:43 + |vpiParent: + \_param_assign: , line:10:11, endln:10:43 + |vpiDecompile:1'b1 + |vpiSize:1 + |BIN:1 + |vpiTypespec: + \_ref_typespec: (work@top) + |vpiParent: + \_constant: , line:10:39, endln:10:43 + |vpiFullName:work@top + |vpiActual: + \_int_typespec: , line:10:1, endln:10:43 + |vpiConstType:3 + |vpiLhs: + \_parameter: (work@top.p_edma_rx_pkt_buffer), line:10:11, endln:10:31 + |vpiParamAssign: + \_param_assign: , line:11:11, endln:11:44 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiRhs: + \_constant: , line:11:39, endln:11:44 + |vpiParent: + \_param_assign: , line:11:11, endln:11:44 + |vpiDecompile:1 + |vpiSize:32 + |INT:1 + |vpiConstType:7 + |vpiLhs: + \_parameter: (work@top.p_edma_queues), line:11:11, endln:11:24 + |vpiParamAssign: + \_param_assign: , line:12:11, endln:12:43 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiRhs: + \_constant: , line:12:39, endln:12:43 + |vpiParent: + \_param_assign: , line:12:11, endln:12:43 + |vpiDecompile:1'b1 + |vpiSize:1 + |BIN:1 + |vpiTypespec: + \_ref_typespec: (work@top) + |vpiParent: + \_constant: , line:12:39, endln:12:43 + |vpiFullName:work@top + |vpiActual: + \_int_typespec: , line:12:1, endln:12:43 + |vpiConstType:3 + |vpiLhs: + \_parameter: (work@top.p_edma_tsu), line:12:11, endln:12:21 + |vpiParamAssign: + \_param_assign: , line:13:11, endln:13:43 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiRhs: + \_constant: , line:13:39, endln:13:43 + |vpiParent: + \_param_assign: , line:13:11, endln:13:43 + |vpiDecompile:1'b1 + |vpiSize:1 + |BIN:1 + |vpiTypespec: + \_ref_typespec: (work@top) + |vpiParent: + \_constant: , line:13:39, endln:13:43 + |vpiFullName:work@top + |vpiActual: + \_int_typespec: , line:13:1, endln:13:43 + |vpiConstType:3 + |vpiLhs: + \_parameter: (work@top.p_edma_axi), line:13:11, endln:13:21 + |vpiParamAssign: + \_param_assign: , line:14:11, endln:14:43 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiRhs: + \_constant: , line:14:39, endln:14:43 + |vpiParent: + \_param_assign: , line:14:11, endln:14:43 + |vpiDecompile:1'b1 + |vpiSize:1 + |BIN:1 + |vpiTypespec: + \_ref_typespec: (work@top) + |vpiParent: + \_constant: , line:14:39, endln:14:43 + |vpiFullName:work@top + |vpiActual: + \_int_typespec: , line:14:1, endln:14:43 + |vpiConstType:3 + |vpiLhs: + \_parameter: (work@top.p_edma_has_pcs), line:14:11, endln:14:25 + |vpiParamAssign: + \_param_assign: , line:15:11, endln:15:43 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiRhs: + \_constant: , line:15:39, endln:15:43 + |vpiParent: + \_param_assign: , line:15:11, endln:15:43 + |vpiDecompile:1'b0 + |vpiSize:1 + |BIN:0 + |vpiTypespec: + \_ref_typespec: (work@top) + |vpiParent: + \_constant: , line:15:39, endln:15:43 + |vpiFullName:work@top + |vpiActual: + \_int_typespec: , line:15:1, endln:15:43 + |vpiConstType:3 + |vpiLhs: + \_parameter: (work@top.p_edma_ext_fifo_interface), line:15:11, endln:15:36 + |vpiParamAssign: + \_param_assign: , line:16:11, endln:16:74 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiRhs: + \_constant: , line:16:39, endln:16:74 + |vpiParent: + \_param_assign: , line:16:11, endln:16:74 + |vpiDecompile:1'b1 + |vpiSize:1 + |BIN:1 + |vpiConstType:3 + |vpiLhs: + \_parameter: (work@top.p_has_dma), line:16:11, endln:16:20 + |vpiParamAssign: + \_param_assign: , line:19:11, endln:38:28 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiRhs: + \_constant: , line:19:27, endln:38:28 + |vpiParent: + \_param_assign: , line:19:11, endln:38:28 + |vpiDecompile:32'b11111111111111111111110011111111 + |vpiSize:32 + |BIN:11111111111111111111110011111111 + |vpiConstType:3 + |vpiLhs: + \_parameter: (work@top.p_int_exists), line:19:11, endln:19:23 + |vpiDefName:work@top + |vpiTop:1 + |vpiTopModule:1 + |vpiGenScopeArray: + \_gen_scope_array: (work@top.genblk1), line:41:3, endln:41:15 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:6:1, endln:44:10 + |vpiName:genblk1 + |vpiFullName:work@top.genblk1 + |vpiGenScope: + \_gen_scope: (work@top.genblk1), line:41:3, endln:41:15 + |vpiParent: + \_gen_scope_array: (work@top.genblk1), line:41:3, endln:41:15 + |vpiFullName:work@top.genblk1 + |vpiModule: + \_module_inst: work@GOOD (work@top.genblk1.good), file:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv, line:41:3, endln:41:15 + |vpiParent: + \_gen_scope: (work@top.genblk1), line:41:3, endln:41:15 + |vpiName:good + |vpiFullName:work@top.genblk1.good + |vpiDefName:work@GOOD + |vpiDefFile:${SURELOG_DIR}/tests/ParamEquivOp/dut.sv + |vpiDefLineNo:2 +\_weaklyReferenced: +\_int_typespec: , line:8:1, endln:8:43 + |vpiRange: + \_range: + |vpiParent: + \_int_typespec: , line:8:1, endln:8:43 + |vpiLeftRange: + \_constant: + |INT:0 + |vpiRightRange: + \_constant: + |INT:0 +\_int_typespec: , line:9:1, endln:9:43 + |vpiRange: + \_range: + |vpiParent: + \_int_typespec: , line:9:1, endln:9:43 + |vpiLeftRange: + \_constant: + |INT:0 + |vpiRightRange: + \_constant: + |INT:0 +\_int_typespec: , line:10:1, endln:10:43 + |vpiRange: + \_range: + |vpiParent: + \_int_typespec: , line:10:1, endln:10:43 + |vpiLeftRange: + \_constant: + |INT:0 + |vpiRightRange: + \_constant: + |INT:0 +\_int_typespec: , line:12:1, endln:12:43 + |vpiRange: + \_range: + |vpiParent: + \_int_typespec: , line:12:1, endln:12:43 + |vpiLeftRange: + \_constant: + |INT:0 + |vpiRightRange: + \_constant: + |INT:0 +\_int_typespec: , line:13:1, endln:13:43 + |vpiRange: + \_range: + |vpiParent: + \_int_typespec: , line:13:1, endln:13:43 + |vpiLeftRange: + \_constant: + |INT:0 + |vpiRightRange: + \_constant: + |INT:0 +\_int_typespec: , line:14:1, endln:14:43 + |vpiRange: + \_range: + |vpiParent: + \_int_typespec: , line:14:1, endln:14:43 + |vpiLeftRange: + \_constant: + |INT:0 + |vpiRightRange: + \_constant: + |INT:0 +\_int_typespec: , line:15:1, endln:15:43 + |vpiRange: + \_range: + |vpiParent: + \_int_typespec: , line:15:1, endln:15:43 + |vpiLeftRange: + \_constant: + |INT:0 + |vpiRightRange: + \_constant: + |INT:0 +\_int_typespec: , line:8:1, endln:8:43 + |vpiParent: + \_ref_typespec: (work@top.p_edma_irq_read_clear) + |vpiRange: + \_range: + |vpiParent: + \_int_typespec: , line:8:1, endln:8:43 + |vpiLeftRange: + \_constant: + |vpiParent: + \_range: + |INT:0 + |vpiRightRange: + \_constant: + |vpiParent: + \_range: + |INT:0 +\_int_typespec: , line:9:1, endln:9:43 + |vpiParent: + \_ref_typespec: (work@top.p_edma_tx_pkt_buffer) + |vpiRange: + \_range: + |vpiParent: + \_int_typespec: , line:9:1, endln:9:43 + |vpiLeftRange: + \_constant: + |vpiParent: + \_range: + |INT:0 + |vpiRightRange: + \_constant: + |vpiParent: + \_range: + |INT:0 +\_int_typespec: , line:10:1, endln:10:43 + |vpiParent: + \_ref_typespec: (work@top.p_edma_rx_pkt_buffer) + |vpiRange: + \_range: + |vpiParent: + \_int_typespec: , line:10:1, endln:10:43 + |vpiLeftRange: + \_constant: + |vpiParent: + \_range: + |INT:0 + |vpiRightRange: + \_constant: + |vpiParent: + \_range: + |INT:0 +\_int_typespec: , line:12:1, endln:12:43 + |vpiParent: + \_ref_typespec: (work@top.p_edma_tsu) + |vpiRange: + \_range: + |vpiParent: + \_int_typespec: , line:12:1, endln:12:43 + |vpiLeftRange: + \_constant: + |vpiParent: + \_range: + |INT:0 + |vpiRightRange: + \_constant: + |vpiParent: + \_range: + |INT:0 +\_int_typespec: , line:13:1, endln:13:43 + |vpiParent: + \_ref_typespec: (work@top.p_edma_axi) + |vpiRange: + \_range: + |vpiParent: + \_int_typespec: , line:13:1, endln:13:43 + |vpiLeftRange: + \_constant: + |vpiParent: + \_range: + |INT:0 + |vpiRightRange: + \_constant: + |vpiParent: + \_range: + |INT:0 +\_int_typespec: , line:14:1, endln:14:43 + |vpiParent: + \_ref_typespec: (work@top.p_edma_has_pcs) + |vpiRange: + \_range: + |vpiParent: + \_int_typespec: , line:14:1, endln:14:43 + |vpiLeftRange: + \_constant: + |vpiParent: + \_range: + |INT:0 + |vpiRightRange: + \_constant: + |vpiParent: + \_range: + |INT:0 +\_int_typespec: , line:15:1, endln:15:43 + |vpiParent: + \_ref_typespec: (work@top.p_edma_ext_fifo_interface) + |vpiRange: + \_range: + |vpiParent: + \_int_typespec: , line:15:1, endln:15:43 + |vpiLeftRange: + \_constant: + |vpiParent: + \_range: + |INT:0 + |vpiRightRange: + \_constant: + |vpiParent: + \_range: + |INT:0 +=================== +[ FATAL] : 0 +[ SYNTAX] : 0 +[ ERROR] : 0 +[WARNING] : 2 +[ NOTE] : 5 diff --git a/tests/ParamEquivOp/ParamEquivOp.sl b/tests/ParamEquivOp/ParamEquivOp.sl new file mode 100644 index 0000000000..b461620aca --- /dev/null +++ b/tests/ParamEquivOp/ParamEquivOp.sl @@ -0,0 +1 @@ +-parse -d uhdm -d coveruhdm -elabuhdm -d ast dut.sv -nobuiltin diff --git a/tests/ParamEquivOp/dut.sv b/tests/ParamEquivOp/dut.sv new file mode 100644 index 0000000000..03a9c3c720 --- /dev/null +++ b/tests/ParamEquivOp/dut.sv @@ -0,0 +1,44 @@ + +module GOOD(); +endmodule + + +module top(); + +parameter p_edma_irq_read_clear = 1'b0; +parameter p_edma_tx_pkt_buffer = 1'b1; +parameter p_edma_rx_pkt_buffer = 1'b1; +parameter p_edma_queues = 32'd1; +parameter p_edma_tsu = 1'b1; +parameter p_edma_axi = 1'b1; +parameter p_edma_has_pcs = 1'b1; +parameter p_edma_ext_fifo_interface = 1'b0; +parameter p_has_dma = (p_edma_ext_fifo_interface == 1'b0); + +// Define interrupt bits which actually exists +parameter p_int_exists = { + 2'b11, // 31:30 + (p_edma_tsu == 1), // 29 + 2'b11, // 28:27 + (p_edma_tsu == 1), // 26 + 8'b11111111, // 25:18 + (p_edma_has_pcs == 1), // 17 + (p_edma_has_pcs == 1), // 16 + 4'b1111, // 15:12 + (p_has_dma == 1), // 11 + 1'b1, // 10 + (p_edma_has_pcs == 0), // 9 + 1'b0, // 8 Reserved + 1'b1, // 7 + (p_has_dma == 1), // 6 + 2'b11, // 5:4 + (p_has_dma == 1), // 3 + (p_has_dma == 1), // 2 + 2'b11 // 1:0 + }; + +if (p_int_exists == 32'b11111111111111111111110011111111) begin + GOOD good(); +end + +endmodule \ No newline at end of file diff --git a/tests/ParamOverload3/ParamOverload3.log b/tests/ParamOverload3/ParamOverload3.log index c6a0806b0a..538d1bc3a7 100644 --- a/tests/ParamOverload3/ParamOverload3.log +++ b/tests/ParamOverload3/ParamOverload3.log @@ -3409,9 +3409,9 @@ design: (work@top) |vpiParent: \_operation: , line:52:9, endln:52:52 |vpiDecompile:1 - |vpiSize:64 - |UINT:1 - |vpiConstType:9 + |vpiSize:1 + |BIN:1 + |vpiConstType:3 \_int_typespec: , line:44:15, endln:44:27 |vpiParent: \_ref_typespec: (work@top.NUM_FORMATS) diff --git a/third_party/UHDM b/third_party/UHDM index 30eb646596..b918b5d5c8 160000 --- a/third_party/UHDM +++ b/third_party/UHDM @@ -1 +1 @@ -Subproject commit 30eb646596de7b2bcc2184b271622efc054b5743 +Subproject commit b918b5d5c82cfbaf71e04f87ab69fc7e182e41aa diff --git a/third_party/tests/CoresSweRVMP/CoresSweRVMP.log b/third_party/tests/CoresSweRVMP/CoresSweRVMP.log index 41e3c4fafd..bf1ae6975d 100644 --- a/third_party/tests/CoresSweRVMP/CoresSweRVMP.log +++ b/third_party/tests/CoresSweRVMP/CoresSweRVMP.log @@ -65,21 +65,21 @@ Running: cd ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_preprocess; -- Generating done -- Build files have been written to: ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_preprocess [ 6%] Generating 10_lsu_bus_intf.sv -[ 12%] Generating 11_ifu_bp_ctl.sv -[ 18%] Generating 12_beh_lib.sv +[ 12%] Generating 12_beh_lib.sv +[ 18%] Generating 11_ifu_bp_ctl.sv [ 25%] Generating 13_ifu_mem_ctl.sv [ 31%] Generating 14_mem_lib.sv +[ 37%] Generating 15_exu.sv [ 43%] Generating 16_dec_decode_ctl.sv -[ 43%] Generating 15_exu.sv [ 50%] Generating 1_lsu_stbuf.sv [ 56%] Generating 2_ahb_to_axi4.sv [ 62%] Generating 3_rvjtag_tap.sv [ 68%] Generating 4_dec_tlu_ctl.sv [ 75%] Generating 5_lsu_bus_buffer.sv [ 81%] Generating 7_axi4_to_ahb.sv -[ 87%] Generating 6_dbg.sv +[ 87%] Generating 8_ifu_aln_ctl.sv +[ 93%] Generating 6_dbg.sv [100%] Generating 9_tb_top.sv -[100%] Generating 8_ifu_aln_ctl.sv [100%] Built target Parse Surelog parsing status: 0 [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/UVM/1800.2-2017-1.0/src/uvm_pkg.sv". diff --git a/third_party/tests/oh/BasicOh.log b/third_party/tests/oh/BasicOh.log index c7900b5e0e..3e84f37b7a 100644 --- a/third_party/tests/oh/BasicOh.log +++ b/third_party/tests/oh/BasicOh.log @@ -19845,9 +19845,9 @@ design: (work@oh_fifo_async) |vpiOperand: \_constant: , line:68:28, endln:68:34 |vpiDecompile:1 - |vpiSize:64 - |UINT:1 - |vpiConstType:9 + |vpiSize:1 + |BIN:1 + |vpiConstType:3 |vpiOperand: \_part_select: rd_reg (work@oh_fifo_async.oh_memory_dp.genblk1.rd_reg), line:68:38, endln:68:51 |vpiParent: