From c2af9acd48f1f65a46e3f9bf1927d339b4f5985b Mon Sep 17 00:00:00 2001 From: alaindargelas Date: Thu, 8 Feb 2024 21:20:09 -0800 Subject: [PATCH] sequences properties location --- src/DesignCompile/CompileAssertion.cpp | 10 + src/DesignCompile/CompileExpression.cpp | 1 + tests/AssertDelayError/AssertDelayError.log | 81 +- tests/AssertTempError/AssertTempError.log | 54 +- tests/Assertions/Assertions.log | 17 +- tests/CheckerInst/CheckerInst.log | 35 +- tests/LegalPastFunc/LegalPastFunc.log | 46 +- tests/OneDivider/OneDivider.log | 9 +- tests/PoundDelay/PoundDelay.log | 15 +- tests/PropBinding/PropBinding.log | 18 +- tests/SeqUseNonTemp/SeqUseNonTemp.log | 89 +- tests/SequenceInst/SequenceInst.log | 61 +- .../AmiqSimpleTestSuite.log | 129 ++- .../tests/CoresSweRVMP/CoresSweRVMP.log | 12 +- third_party/tests/IncompTitan/IncompTitan.log | 98 ++- third_party/tests/Opentitan/Opentitan.log | 809 +++++++++++++++++- 16 files changed, 1305 insertions(+), 179 deletions(-) diff --git a/src/DesignCompile/CompileAssertion.cpp b/src/DesignCompile/CompileAssertion.cpp index 82a03f8484..ded5aebfa1 100644 --- a/src/DesignCompile/CompileAssertion.cpp +++ b/src/DesignCompile/CompileAssertion.cpp @@ -294,6 +294,7 @@ UHDM::any* CompileHelper::compileSimpleImmediateAssertion( switch (fC->Type(the_stmt)) { case VObjectType::paSimple_immediate_assert_statement: { UHDM::immediate_assert* astmt = s.MakeImmediate_assert(); + fC->populateCoreMembers(the_stmt, the_stmt, astmt); astmt->VpiParent(pstmt); astmt->Expr((UHDM::expr*)expr); if (expr) expr->VpiParent(astmt); @@ -306,6 +307,7 @@ UHDM::any* CompileHelper::compileSimpleImmediateAssertion( } case VObjectType::paSimple_immediate_assume_statement: { UHDM::immediate_assume* astmt = s.MakeImmediate_assume(); + fC->populateCoreMembers(the_stmt, the_stmt, astmt); astmt->VpiParent(pstmt); astmt->Expr((UHDM::expr*)expr); if (expr) expr->VpiParent(astmt); @@ -318,6 +320,7 @@ UHDM::any* CompileHelper::compileSimpleImmediateAssertion( } case VObjectType::paSimple_immediate_cover_statement: { UHDM::immediate_cover* astmt = s.MakeImmediate_cover(); + fC->populateCoreMembers(the_stmt, the_stmt, astmt); astmt->VpiParent(pstmt); astmt->Expr((UHDM::expr*)expr); if (expr) expr->VpiParent(astmt); @@ -385,6 +388,7 @@ UHDM::any* CompileHelper::compileDeferredImmediateAssertion( switch (fC->Type(the_stmt)) { case VObjectType::paDeferred_immediate_assert_statement: { UHDM::immediate_assert* astmt = s.MakeImmediate_assert(); + fC->populateCoreMembers(the_stmt, the_stmt, astmt); astmt->VpiParent(pstmt); astmt->Expr((UHDM::expr*)expr); if (expr) expr->VpiParent(astmt); @@ -399,6 +403,7 @@ UHDM::any* CompileHelper::compileDeferredImmediateAssertion( } case VObjectType::paDeferred_immediate_assume_statement: { UHDM::immediate_assume* astmt = s.MakeImmediate_assume(); + fC->populateCoreMembers(the_stmt, the_stmt, astmt); astmt->VpiParent(pstmt); astmt->Expr((UHDM::expr*)expr); if (expr) expr->VpiParent(astmt); @@ -413,6 +418,7 @@ UHDM::any* CompileHelper::compileDeferredImmediateAssertion( } case VObjectType::paDeferred_immediate_cover_statement: { UHDM::immediate_cover* astmt = s.MakeImmediate_cover(); + fC->populateCoreMembers(the_stmt, the_stmt, astmt); astmt->VpiParent(pstmt); astmt->Expr((UHDM::expr*)expr); if (expr) expr->VpiParent(astmt); @@ -435,6 +441,7 @@ UHDM::property_decl* CompileHelper::compilePropertyDeclaration( ValuedComponentI* instance) { UHDM::Serializer& s = compileDesign->getSerializer(); UHDM::property_decl* result = s.MakeProperty_decl(); + fC->populateCoreMembers(nodeId, nodeId, result); std::string_view propName = fC->SymName(nodeId); result->VpiName(propName); result->VpiParent(pstmt); @@ -518,6 +525,7 @@ UHDM::sequence_decl* CompileHelper::compileSequenceDeclaration( ValuedComponentI* instance) { UHDM::Serializer& s = compileDesign->getSerializer(); UHDM::sequence_decl* result = s.MakeSequence_decl(); + fC->populateCoreMembers(nodeId, nodeId, result); std::string_view propName = fC->SymName(nodeId); result->VpiName(propName); result->VpiParent(pstmt); @@ -537,6 +545,7 @@ UHDM::sequence_decl* CompileHelper::compileSequenceDeclaration( NodeId Port_name = fC->Sibling(Sequence_formal_type); UHDM::seq_formal_decl* prop_port_decl = s.MakeSeq_formal_decl(); + fC->populateCoreMembers(Sequence_expr, Sequence_expr, prop_port_decl); ports->push_back(prop_port_decl); prop_port_decl->VpiName(fC->SymName(Port_name)); UHDM::ref_typespec* rtps = s.MakeRef_typespec(); @@ -549,6 +558,7 @@ UHDM::sequence_decl* CompileHelper::compileSequenceDeclaration( NodeId lookup = fC->Child(Sequence_expr); if (fC->Type(lookup) == VObjectType::paClocking_event) { UHDM::multiclock_sequence_expr* mexpr = s.MakeMulticlock_sequence_expr(); + fC->populateCoreMembers(Sequence_expr, Sequence_expr, mexpr); result->Sequence_expr_multiclock_group(mexpr); mexpr->Clocked_seqs(s.MakeClocked_seqVec()); while (fC->Type(lookup) == VObjectType::paClocking_event) { diff --git a/src/DesignCompile/CompileExpression.cpp b/src/DesignCompile/CompileExpression.cpp index 6c3a76c55a..768e7ca716 100644 --- a/src/DesignCompile/CompileExpression.cpp +++ b/src/DesignCompile/CompileExpression.cpp @@ -2245,6 +2245,7 @@ UHDM::any *CompileHelper::compileExpression( NodeId NameId = fC->Child(Ps_or_hierarchical_array_identifier); const std::string_view name = fC->SymName(NameId); sequence_inst *seqinst = s.MakeSequence_inst(); + fC->populateCoreMembers(child, child, seqinst); seqinst->VpiName(name); seqinst->VpiParent(pexpr); NodeId Sequence_list_of_arguments = diff --git a/tests/AssertDelayError/AssertDelayError.log b/tests/AssertDelayError/AssertDelayError.log index a4ade7fcbc..4d381feca0 100644 --- a/tests/AssertDelayError/AssertDelayError.log +++ b/tests/AssertDelayError/AssertDelayError.log @@ -1028,7 +1028,7 @@ design: (work@tb_left_rotation) \_design: (work@tb_left_rotation) |vpiFullName:work@left_rotate_assertions |vpiPropertyDecl: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_valid_rotation) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_valid_rotation), line:18:12, endln:18:28 |vpiParent: \_module_inst: work@left_rotate_assertions (work@tb_left_rotation.u_left_rotate_assertions), file:${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv, line:37:20, endln:43:3 |vpiName:p_valid_rotation @@ -1036,7 +1036,7 @@ design: (work@tb_left_rotation) |vpiPropertySpec: \_property_spec: , line:19:5, endln:19:98 |vpiParent: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_valid_rotation) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_valid_rotation), line:18:12, endln:18:28 |vpiClockingEvent: \_operation: , line:19:7, endln:19:18 |vpiParent: @@ -1142,7 +1142,7 @@ design: (work@tb_left_rotation) |vpiActual: \_logic_net: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.rotate_by), line:5:17, endln:5:26 |vpiPropertyDecl: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_rotation_range) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_rotation_range), line:24:12, endln:24:28 |vpiParent: \_module_inst: work@left_rotate_assertions (work@tb_left_rotation.u_left_rotate_assertions), file:${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv, line:37:20, endln:43:3 |vpiName:p_rotation_range @@ -1150,7 +1150,7 @@ design: (work@tb_left_rotation) |vpiPropertySpec: \_property_spec: , line:25:5, endln:25:53 |vpiParent: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_rotation_range) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_rotation_range), line:24:12, endln:24:28 |vpiClockingEvent: \_operation: , line:25:7, endln:25:18 |vpiParent: @@ -1204,7 +1204,7 @@ design: (work@tb_left_rotation) |DEC:31 |vpiConstType:1 |vpiPropertyDecl: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_no_rotation) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_no_rotation), line:30:12, endln:30:25 |vpiParent: \_module_inst: work@left_rotate_assertions (work@tb_left_rotation.u_left_rotate_assertions), file:${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv, line:37:20, endln:43:3 |vpiName:p_no_rotation @@ -1212,7 +1212,7 @@ design: (work@tb_left_rotation) |vpiPropertySpec: \_property_spec: , line:31:5, endln:31:71 |vpiParent: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_no_rotation) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_no_rotation), line:30:12, endln:30:25 |vpiClockingEvent: \_operation: , line:31:7, endln:31:18 |vpiParent: @@ -1339,7 +1339,7 @@ design: (work@tb_left_rotation) |vpiName:p_valid_rotation |vpiFullName:work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.a_valid_rotation.p_valid_rotation |vpiActual: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_valid_rotation) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_valid_rotation), line:18:12, endln:18:28 |vpiAssertion: \_assert_stmt: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.a_rotation_range), line:27:3, endln:27:55 |vpiParent: @@ -1357,7 +1357,7 @@ design: (work@tb_left_rotation) |vpiName:p_rotation_range |vpiFullName:work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.a_rotation_range.p_rotation_range |vpiActual: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_rotation_range) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_rotation_range), line:24:12, endln:24:28 |vpiAssertion: \_assert_stmt: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.a_no_rotation), line:33:3, endln:33:49 |vpiParent: @@ -1375,7 +1375,7 @@ design: (work@tb_left_rotation) |vpiName:p_no_rotation |vpiFullName:work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.a_no_rotation.p_no_rotation |vpiActual: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_no_rotation) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_no_rotation), line:30:12, endln:30:25 |vpiPort: \_port: (clk), line:2:11, endln:2:14 |vpiParent: @@ -2895,7 +2895,7 @@ design: (work@tb_left_rotation) |vpiName:u_left_rotate_assertions |vpiFullName:work@tb_left_rotation.u_left_rotate_assertions |vpiPropertyDecl: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_valid_rotation) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_valid_rotation), line:18:12, endln:18:28 |vpiParent: \_module_inst: work@left_rotate_assertions (work@tb_left_rotation.u_left_rotate_assertions), file:${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv, line:37:20, endln:43:3 |vpiName:p_valid_rotation @@ -2903,7 +2903,7 @@ design: (work@tb_left_rotation) |vpiPropertySpec: \_property_spec: , line:19:5, endln:19:98 |vpiParent: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_valid_rotation) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_valid_rotation), line:18:12, endln:18:28 |vpiClockingEvent: \_operation: , line:19:7, endln:19:18 |vpiParent: @@ -3003,7 +3003,7 @@ design: (work@tb_left_rotation) |vpiActual: \_logic_net: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.rotate_by), line:5:17, endln:5:26 |vpiPropertyDecl: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_rotation_range) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_rotation_range), line:24:12, endln:24:28 |vpiParent: \_module_inst: work@left_rotate_assertions (work@tb_left_rotation.u_left_rotate_assertions), file:${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv, line:37:20, endln:43:3 |vpiName:p_rotation_range @@ -3011,7 +3011,7 @@ design: (work@tb_left_rotation) |vpiPropertySpec: \_property_spec: , line:25:5, endln:25:53 |vpiParent: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_rotation_range) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_rotation_range), line:24:12, endln:24:28 |vpiClockingEvent: \_operation: , line:25:7, endln:25:18 |vpiParent: @@ -3059,7 +3059,7 @@ design: (work@tb_left_rotation) |vpiOperand: \_constant: , line:25:47, endln:25:52 |vpiPropertyDecl: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_no_rotation) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_no_rotation), line:30:12, endln:30:25 |vpiParent: \_module_inst: work@left_rotate_assertions (work@tb_left_rotation.u_left_rotate_assertions), file:${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv, line:37:20, endln:43:3 |vpiName:p_no_rotation @@ -3067,7 +3067,7 @@ design: (work@tb_left_rotation) |vpiPropertySpec: \_property_spec: , line:31:5, endln:31:71 |vpiParent: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_no_rotation) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_no_rotation), line:30:12, endln:30:25 |vpiClockingEvent: \_operation: , line:31:7, endln:31:18 |vpiParent: @@ -3225,7 +3225,7 @@ design: (work@tb_left_rotation) |vpiName:p_valid_rotation |vpiFullName:work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.a_valid_rotation.p_valid_rotation |vpiActual: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_valid_rotation) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_valid_rotation), line:18:12, endln:18:28 |vpiAssertion: \_assert_stmt: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.a_rotation_range), line:27:3, endln:27:55 |vpiParent: @@ -3243,7 +3243,7 @@ design: (work@tb_left_rotation) |vpiName:p_rotation_range |vpiFullName:work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.a_rotation_range.p_rotation_range |vpiActual: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_rotation_range) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_rotation_range), line:24:12, endln:24:28 |vpiAssertion: \_assert_stmt: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.a_no_rotation), line:33:3, endln:33:49 |vpiParent: @@ -3261,7 +3261,7 @@ design: (work@tb_left_rotation) |vpiName:p_no_rotation |vpiFullName:work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.a_no_rotation.p_no_rotation |vpiActual: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_no_rotation) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_no_rotation), line:30:12, endln:30:25 |vpiInstance: \_module_inst: work@left_rotation (work@tb_left_rotation.left_rotation_inst), file:${SURELOG_DIR}/tests/AssertDelayError/tb_left_rotate.sv, line:8:5, endln:13:7 |vpiPort: @@ -3490,7 +3490,7 @@ design: (work@tb_left_rotation) |vpiName:u_left_rotate_assertions |vpiFullName:work@tb_left_rotation.u_left_rotate_assertions |vpiPropertyDecl: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_valid_rotation) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_valid_rotation), line:18:12, endln:18:28 |vpiParent: \_module_inst: work@left_rotate_assertions (work@tb_left_rotation.u_left_rotate_assertions), file:${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv, line:37:20, endln:43:3 |vpiName:p_valid_rotation @@ -3498,7 +3498,7 @@ design: (work@tb_left_rotation) |vpiPropertySpec: \_property_spec: , line:19:5, endln:19:98 |vpiParent: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_valid_rotation) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_valid_rotation), line:18:12, endln:18:28 |vpiClockingEvent: \_operation: , line:19:7, endln:19:18 |vpiParent: @@ -3598,7 +3598,7 @@ design: (work@tb_left_rotation) |vpiActual: \_logic_net: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.rotate_by), line:5:17, endln:5:26 |vpiPropertyDecl: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_rotation_range) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_rotation_range), line:24:12, endln:24:28 |vpiParent: \_module_inst: work@left_rotate_assertions (work@tb_left_rotation.u_left_rotate_assertions), file:${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv, line:37:20, endln:43:3 |vpiName:p_rotation_range @@ -3606,7 +3606,7 @@ design: (work@tb_left_rotation) |vpiPropertySpec: \_property_spec: , line:25:5, endln:25:53 |vpiParent: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_rotation_range) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_rotation_range), line:24:12, endln:24:28 |vpiClockingEvent: \_operation: , line:25:7, endln:25:18 |vpiParent: @@ -3654,7 +3654,7 @@ design: (work@tb_left_rotation) |vpiOperand: \_constant: , line:25:47, endln:25:52 |vpiPropertyDecl: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_no_rotation) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_no_rotation), line:30:12, endln:30:25 |vpiParent: \_module_inst: work@left_rotate_assertions (work@tb_left_rotation.u_left_rotate_assertions), file:${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv, line:37:20, endln:43:3 |vpiName:p_no_rotation @@ -3662,7 +3662,7 @@ design: (work@tb_left_rotation) |vpiPropertySpec: \_property_spec: , line:31:5, endln:31:71 |vpiParent: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_no_rotation) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_no_rotation), line:30:12, endln:30:25 |vpiClockingEvent: \_operation: , line:31:7, endln:31:18 |vpiParent: @@ -3820,7 +3820,7 @@ design: (work@tb_left_rotation) |vpiName:p_valid_rotation |vpiFullName:work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.a_valid_rotation.p_valid_rotation |vpiActual: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_valid_rotation) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_valid_rotation), line:18:12, endln:18:28 |vpiAssertion: \_assert_stmt: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.a_rotation_range), line:27:3, endln:27:55 |vpiParent: @@ -3838,7 +3838,7 @@ design: (work@tb_left_rotation) |vpiName:p_rotation_range |vpiFullName:work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.a_rotation_range.p_rotation_range |vpiActual: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_rotation_range) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_rotation_range), line:24:12, endln:24:28 |vpiAssertion: \_assert_stmt: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.a_no_rotation), line:33:3, endln:33:49 |vpiParent: @@ -3856,7 +3856,7 @@ design: (work@tb_left_rotation) |vpiName:p_no_rotation |vpiFullName:work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.a_no_rotation.p_no_rotation |vpiActual: - \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_no_rotation) + \_property_decl: (work@tb_left_rotation.left_rotation_inst.u_left_rotate_assertions.p_no_rotation), line:30:12, endln:30:25 |vpiInstance: \_module_inst: work@left_rotation (work@tb_left_rotation.left_rotation_inst), file:${SURELOG_DIR}/tests/AssertDelayError/tb_left_rotate.sv, line:8:5, endln:13:7 |vpiPort: @@ -4666,7 +4666,14 @@ design: (work@tb_left_rotation) ============================== Begin Linting Results ============================== [LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:19:5: Non synthesizable construct, -[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:37:20: Non synthesizable construct, u_left_rotate_assertions +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:18:12: Non synthesizable construct, p_valid_rotation +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:25:5: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:24:12: Non synthesizable construct, p_rotation_range +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:31:5: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:30:12: Non synthesizable construct, p_no_rotation +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:21:37: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:27:37: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:33:34: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/tests/AssertDelayError/tb_left_rotate.sv:17:9: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/tests/AssertDelayError/tb_left_rotate.sv:26:9: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/tests/AssertDelayError/tb_left_rotate.sv:27:9: Non synthesizable construct, @@ -4680,5 +4687,21 @@ design: (work@tb_left_rotation) [LINT]: ${SURELOG_DIR}/tests/AssertDelayError/tb_left_rotate.sv:40:9: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/tests/AssertDelayError/tb_left_rotate.sv:41:9: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:19:5: Non synthesizable construct, -[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:37:20: Non synthesizable construct, u_left_rotate_assertions +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:18:12: Non synthesizable construct, p_valid_rotation +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:25:5: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:24:12: Non synthesizable construct, p_rotation_range +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:31:5: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:30:12: Non synthesizable construct, p_no_rotation +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:21:37: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:27:37: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:33:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:19:5: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:18:12: Non synthesizable construct, p_valid_rotation +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:25:5: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:24:12: Non synthesizable construct, p_rotation_range +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:31:5: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:30:12: Non synthesizable construct, p_no_rotation +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:21:37: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:27:37: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/AssertDelayError/left_rotate_assertions.sv:33:34: Non synthesizable construct, ============================== End Linting Results ============================== diff --git a/tests/AssertTempError/AssertTempError.log b/tests/AssertTempError/AssertTempError.log index ee7cc732f1..e0d0fae7cf 100644 --- a/tests/AssertTempError/AssertTempError.log +++ b/tests/AssertTempError/AssertTempError.log @@ -2804,7 +2804,7 @@ design: (work@tb_UART) \_design: (work@tb_UART) |vpiFullName:work@UART_assertions |vpiPropertyDecl: - \_property_decl: (work@tb_UART.uart_inst.uut.p_send) + \_property_decl: (work@tb_UART.uart_inst.uut.p_send), line:82:14, endln:82:20 |vpiParent: \_module_inst: work@UART_assertions (work@tb_UART.uut), file:${SURELOG_DIR}/tests/AssertTempError/design.sv, line:100:11, endln:100:80 |vpiName:p_send @@ -2812,7 +2812,7 @@ design: (work@tb_UART) |vpiPropertySpec: \_property_spec: , line:83:9, endln:84:33 |vpiParent: - \_property_decl: (work@tb_UART.uart_inst.uut.p_send) + \_property_decl: (work@tb_UART.uart_inst.uut.p_send), line:82:14, endln:82:20 |vpiClockingEvent: \_operation: , line:83:11, endln:83:22 |vpiParent: @@ -2861,7 +2861,7 @@ design: (work@tb_UART) |vpiActual: \_parameter: (work@tb_UART.uart_inst.uut.DATA), line:79:36, endln:79:40 |vpiPropertyDecl: - \_property_decl: (work@tb_UART.uart_inst.uut.p_done) + \_property_decl: (work@tb_UART.uart_inst.uut.p_done), line:90:14, endln:90:20 |vpiParent: \_module_inst: work@UART_assertions (work@tb_UART.uut), file:${SURELOG_DIR}/tests/AssertTempError/design.sv, line:100:11, endln:100:80 |vpiName:p_done @@ -2869,7 +2869,7 @@ design: (work@tb_UART) |vpiPropertySpec: \_property_spec: , line:91:9, endln:92:33 |vpiParent: - \_property_decl: (work@tb_UART.uart_inst.uut.p_done) + \_property_decl: (work@tb_UART.uart_inst.uut.p_done), line:90:14, endln:90:20 |vpiClockingEvent: \_operation: , line:91:11, endln:91:22 |vpiParent: @@ -3125,7 +3125,7 @@ design: (work@tb_UART) |vpiName:p_send |vpiFullName:work@tb_UART.uart_inst.uut.p_send |vpiActual: - \_property_decl: (work@tb_UART.uart_inst.uut.p_send) + \_property_decl: (work@tb_UART.uart_inst.uut.p_send), line:82:14, endln:82:20 |vpiAssertion: \_assert_stmt: (work@tb_UART.uart_inst.uut), line:95:5, endln:95:70 |vpiParent: @@ -3155,7 +3155,7 @@ design: (work@tb_UART) |vpiName:p_done |vpiFullName:work@tb_UART.uart_inst.uut.p_done |vpiActual: - \_property_decl: (work@tb_UART.uart_inst.uut.p_done) + \_property_decl: (work@tb_UART.uart_inst.uut.p_done), line:90:14, endln:90:20 |vpiPort: \_port: (clk), line:71:11, endln:71:14 |vpiParent: @@ -5478,7 +5478,7 @@ design: (work@tb_UART) |vpiName:uut |vpiFullName:work@tb_UART.uut |vpiPropertyDecl: - \_property_decl: (work@tb_UART.uart_inst.uut.p_send) + \_property_decl: (work@tb_UART.uart_inst.uut.p_send), line:82:14, endln:82:20 |vpiParent: \_module_inst: work@UART_assertions (work@tb_UART.uut), file:${SURELOG_DIR}/tests/AssertTempError/design.sv, line:100:11, endln:100:80 |vpiName:p_send @@ -5486,7 +5486,7 @@ design: (work@tb_UART) |vpiPropertySpec: \_property_spec: , line:83:9, endln:84:33 |vpiParent: - \_property_decl: (work@tb_UART.uart_inst.uut.p_send) + \_property_decl: (work@tb_UART.uart_inst.uut.p_send), line:82:14, endln:82:20 |vpiClockingEvent: \_operation: , line:83:11, endln:83:22 |vpiParent: @@ -5535,7 +5535,7 @@ design: (work@tb_UART) |vpiActual: \_parameter: (work@tb_UART.uart_inst.uut.DATA), line:79:36, endln:79:40 |vpiPropertyDecl: - \_property_decl: (work@tb_UART.uart_inst.uut.p_done) + \_property_decl: (work@tb_UART.uart_inst.uut.p_done), line:90:14, endln:90:20 |vpiParent: \_module_inst: work@UART_assertions (work@tb_UART.uut), file:${SURELOG_DIR}/tests/AssertTempError/design.sv, line:100:11, endln:100:80 |vpiName:p_done @@ -5543,7 +5543,7 @@ design: (work@tb_UART) |vpiPropertySpec: \_property_spec: , line:91:9, endln:92:33 |vpiParent: - \_property_decl: (work@tb_UART.uart_inst.uut.p_done) + \_property_decl: (work@tb_UART.uart_inst.uut.p_done), line:90:14, endln:90:20 |vpiClockingEvent: \_operation: , line:91:11, endln:91:22 |vpiParent: @@ -5823,7 +5823,7 @@ design: (work@tb_UART) |vpiName:p_send |vpiFullName:work@tb_UART.uart_inst.uut.p_send |vpiActual: - \_property_decl: (work@tb_UART.uart_inst.uut.p_send) + \_property_decl: (work@tb_UART.uart_inst.uut.p_send), line:82:14, endln:82:20 |vpiAssertion: \_assert_stmt: (work@tb_UART.uart_inst.uut), line:95:5, endln:95:70 |vpiParent: @@ -5847,7 +5847,7 @@ design: (work@tb_UART) |vpiName:p_done |vpiFullName:work@tb_UART.uart_inst.uut.p_done |vpiActual: - \_property_decl: (work@tb_UART.uart_inst.uut.p_done) + \_property_decl: (work@tb_UART.uart_inst.uut.p_done), line:90:14, endln:90:20 |vpiInstance: \_module_inst: work@UART (work@tb_UART.uart_inst), file:${SURELOG_DIR}/tests/AssertTempError/testbench.sv, line:10:5, endln:18:7 |vpiPort: @@ -5981,7 +5981,7 @@ design: (work@tb_UART) |vpiName:uut |vpiFullName:work@tb_UART.uut |vpiPropertyDecl: - \_property_decl: (work@tb_UART.uart_inst.uut.p_send) + \_property_decl: (work@tb_UART.uart_inst.uut.p_send), line:82:14, endln:82:20 |vpiParent: \_module_inst: work@UART_assertions (work@tb_UART.uut), file:${SURELOG_DIR}/tests/AssertTempError/design.sv, line:100:11, endln:100:80 |vpiName:p_send @@ -5989,7 +5989,7 @@ design: (work@tb_UART) |vpiPropertySpec: \_property_spec: , line:83:9, endln:84:33 |vpiParent: - \_property_decl: (work@tb_UART.uart_inst.uut.p_send) + \_property_decl: (work@tb_UART.uart_inst.uut.p_send), line:82:14, endln:82:20 |vpiClockingEvent: \_operation: , line:83:11, endln:83:22 |vpiParent: @@ -6038,7 +6038,7 @@ design: (work@tb_UART) |vpiActual: \_parameter: (work@tb_UART.uart_inst.uut.DATA), line:79:36, endln:79:40 |vpiPropertyDecl: - \_property_decl: (work@tb_UART.uart_inst.uut.p_done) + \_property_decl: (work@tb_UART.uart_inst.uut.p_done), line:90:14, endln:90:20 |vpiParent: \_module_inst: work@UART_assertions (work@tb_UART.uut), file:${SURELOG_DIR}/tests/AssertTempError/design.sv, line:100:11, endln:100:80 |vpiName:p_done @@ -6046,7 +6046,7 @@ design: (work@tb_UART) |vpiPropertySpec: \_property_spec: , line:91:9, endln:92:33 |vpiParent: - \_property_decl: (work@tb_UART.uart_inst.uut.p_done) + \_property_decl: (work@tb_UART.uart_inst.uut.p_done), line:90:14, endln:90:20 |vpiClockingEvent: \_operation: , line:91:11, endln:91:22 |vpiParent: @@ -6326,7 +6326,7 @@ design: (work@tb_UART) |vpiName:p_send |vpiFullName:work@tb_UART.uart_inst.uut.p_send |vpiActual: - \_property_decl: (work@tb_UART.uart_inst.uut.p_send) + \_property_decl: (work@tb_UART.uart_inst.uut.p_send), line:82:14, endln:82:20 |vpiAssertion: \_assert_stmt: (work@tb_UART.uart_inst.uut), line:95:5, endln:95:70 |vpiParent: @@ -6350,7 +6350,7 @@ design: (work@tb_UART) |vpiName:p_done |vpiFullName:work@tb_UART.uart_inst.uut.p_done |vpiActual: - \_property_decl: (work@tb_UART.uart_inst.uut.p_done) + \_property_decl: (work@tb_UART.uart_inst.uut.p_done), line:90:14, endln:90:20 |vpiInstance: \_module_inst: work@UART (work@tb_UART.uart_inst), file:${SURELOG_DIR}/tests/AssertTempError/testbench.sv, line:10:5, endln:18:7 |vpiPort: @@ -6945,7 +6945,11 @@ design: (work@tb_UART) ============================== Begin Linting Results ============================== [LINT]: ${SURELOG_DIR}/tests/AssertTempError/design.sv:83:9: Non synthesizable construct, -[LINT]: ${SURELOG_DIR}/tests/AssertTempError/design.sv:100:11: Non synthesizable construct, uut +[LINT]: ${SURELOG_DIR}/tests/AssertTempError/design.sv:82:14: Non synthesizable construct, p_send +[LINT]: ${SURELOG_DIR}/tests/AssertTempError/design.sv:91:9: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/AssertTempError/design.sv:90:14: Non synthesizable construct, p_done +[LINT]: ${SURELOG_DIR}/tests/AssertTempError/design.sv:87:21: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/AssertTempError/design.sv:95:22: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/tests/AssertTempError/testbench.sv:23:9: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/tests/AssertTempError/testbench.sv:37:9: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/tests/AssertTempError/testbench.sv:38:9: Non synthesizable construct, @@ -6959,5 +6963,15 @@ design: (work@tb_UART) [LINT]: ${SURELOG_DIR}/tests/AssertTempError/testbench.sv:46:13: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/tests/AssertTempError/testbench.sv:48:13: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/tests/AssertTempError/design.sv:83:9: Non synthesizable construct, -[LINT]: ${SURELOG_DIR}/tests/AssertTempError/design.sv:100:11: Non synthesizable construct, uut +[LINT]: ${SURELOG_DIR}/tests/AssertTempError/design.sv:82:14: Non synthesizable construct, p_send +[LINT]: ${SURELOG_DIR}/tests/AssertTempError/design.sv:91:9: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/AssertTempError/design.sv:90:14: Non synthesizable construct, p_done +[LINT]: ${SURELOG_DIR}/tests/AssertTempError/design.sv:87:21: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/AssertTempError/design.sv:95:22: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/AssertTempError/design.sv:83:9: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/AssertTempError/design.sv:82:14: Non synthesizable construct, p_send +[LINT]: ${SURELOG_DIR}/tests/AssertTempError/design.sv:91:9: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/AssertTempError/design.sv:90:14: Non synthesizable construct, p_done +[LINT]: ${SURELOG_DIR}/tests/AssertTempError/design.sv:87:21: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/AssertTempError/design.sv:95:22: Non synthesizable construct, ============================== End Linting Results ============================== diff --git a/tests/Assertions/Assertions.log b/tests/Assertions/Assertions.log index f283af934f..3393b0d7be 100644 --- a/tests/Assertions/Assertions.log +++ b/tests/Assertions/Assertions.log @@ -506,7 +506,7 @@ design: (work@m) \_design: (work@m) |vpiFullName:work@m |vpiPropertyDecl: - \_property_decl: (work@m.toggles) + \_property_decl: (work@m.toggles), line:9:10, endln:9:17 |vpiParent: \_module_inst: work@m (work@m), file:${SURELOG_DIR}/tests/Assertions/dut.sv, line:1:1, endln:13:14 |vpiName:toggles @@ -526,7 +526,7 @@ design: (work@m) |vpiPropertySpec: \_property_spec: , line:10:1, endln:10:58 |vpiParent: - \_property_decl: (work@m.toggles) + \_property_decl: (work@m.toggles), line:9:10, endln:9:17 |vpiPropertyExpr: \_operation: , line:10:1, endln:10:58 |vpiParent: @@ -835,7 +835,7 @@ design: (work@m) \_module_inst: work@m (work@m), file:${SURELOG_DIR}/tests/Assertions/dut.sv, line:1:1, endln:13:14 |vpiName:work@m |vpiPropertyDecl: - \_property_decl: (work@m.toggles) + \_property_decl: (work@m.toggles), line:9:10, endln:9:17 |vpiParent: \_module_inst: work@m (work@m), file:${SURELOG_DIR}/tests/Assertions/dut.sv, line:1:1, endln:13:14 |vpiName:toggles @@ -843,7 +843,7 @@ design: (work@m) |vpiPropFormalDecl: \_prop_formal_decl: (x) |vpiParent: - \_property_decl: (work@m.toggles) + \_property_decl: (work@m.toggles), line:9:10, endln:9:17 |vpiName:x |vpiTypespec: \_ref_typespec: (work@m.toggles.x) @@ -855,7 +855,7 @@ design: (work@m) |vpiPropFormalDecl: \_prop_formal_decl: (y) |vpiParent: - \_property_decl: (work@m.toggles) + \_property_decl: (work@m.toggles), line:9:10, endln:9:17 |vpiName:y |vpiTypespec: \_ref_typespec: (work@m.toggles.y) @@ -865,7 +865,7 @@ design: (work@m) |vpiPropertySpec: \_property_spec: , line:10:1, endln:10:58 |vpiParent: - \_property_decl: (work@m.toggles) + \_property_decl: (work@m.toggles), line:9:10, endln:9:17 |vpiPropertyExpr: \_operation: , line:10:1, endln:10:58 |vpiParent: @@ -1289,5 +1289,8 @@ design: (work@m) ============================== Begin Linting Results ============================== [LINT]: ${SURELOG_DIR}/tests/Assertions/dut.sv:10:1: Non synthesizable construct, -[LINT]: ${SURELOG_DIR}/tests/Assertions/dut.sv:1:1: Non synthesizable construct, work@m +[LINT]: ${SURELOG_DIR}/tests/Assertions/dut.sv:9:10: Non synthesizable construct, toggles +[LINT]: ${SURELOG_DIR}/tests/Assertions/dut.sv:12:22: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/Assertions/dut.sv:9:10: Non synthesizable construct, toggles +[LINT]: ${SURELOG_DIR}/tests/Assertions/dut.sv:12:22: Non synthesizable construct, ============================== End Linting Results ============================== diff --git a/tests/CheckerInst/CheckerInst.log b/tests/CheckerInst/CheckerInst.log index d7311683c3..874e29f439 100644 --- a/tests/CheckerInst/CheckerInst.log +++ b/tests/CheckerInst/CheckerInst.log @@ -346,7 +346,7 @@ design: (work@top) \_design: (work@top) |vpiFullName:work@top |vpiPropertyDecl: - \_property_decl: (work@top.p1) + \_property_decl: (work@top.p1), line:5:12, endln:5:14 |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/CheckerInst/dut.sv, line:1:1, endln:16:10 |vpiName:p1 @@ -364,7 +364,7 @@ design: (work@top) |vpiPropertySpec: \_property_spec: , line:6:5, endln:6:33 |vpiParent: - \_property_decl: (work@top.p1) + \_property_decl: (work@top.p1), line:5:12, endln:5:14 |vpiClockingEvent: \_sys_func_call: ($global_clock), line:6:7, endln:6:20 |vpiParent: @@ -392,7 +392,7 @@ design: (work@top) |vpiActual: \_logic_net: (work@top.ack), line:6:30, endln:6:33 |vpiPropertyDecl: - \_property_decl: (work@top.p2) + \_property_decl: (work@top.p2), line:9:12, endln:9:14 |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/CheckerInst/dut.sv, line:1:1, endln:16:10 |vpiName:p2 @@ -415,7 +415,7 @@ design: (work@top) |vpiPropertySpec: \_property_spec: , line:10:5, endln:10:55 |vpiParent: - \_property_decl: (work@top.p2) + \_property_decl: (work@top.p2), line:9:12, endln:9:14 |vpiClockingEvent: \_sys_func_call: ($global_clock), line:10:7, endln:10:20 |vpiParent: @@ -541,7 +541,7 @@ design: (work@top) \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/CheckerInst/dut.sv, line:1:1, endln:16:10 |vpiName:work@top |vpiPropertyDecl: - \_property_decl: (work@top.p1) + \_property_decl: (work@top.p1), line:5:12, endln:5:14 |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/CheckerInst/dut.sv, line:1:1, endln:16:10 |vpiName:p1 @@ -549,7 +549,7 @@ design: (work@top) |vpiPropFormalDecl: \_prop_formal_decl: (req) |vpiParent: - \_property_decl: (work@top.p1) + \_property_decl: (work@top.p1), line:5:12, endln:5:14 |vpiName:req |vpiTypespec: \_ref_typespec: (work@top.p1.req) @@ -559,7 +559,7 @@ design: (work@top) |vpiPropFormalDecl: \_prop_formal_decl: (ack) |vpiParent: - \_property_decl: (work@top.p1) + \_property_decl: (work@top.p1), line:5:12, endln:5:14 |vpiName:ack |vpiTypespec: \_ref_typespec: (work@top.p1.ack) @@ -569,7 +569,7 @@ design: (work@top) |vpiPropertySpec: \_property_spec: , line:6:5, endln:6:33 |vpiParent: - \_property_decl: (work@top.p1) + \_property_decl: (work@top.p1), line:5:12, endln:5:14 |vpiClockingEvent: \_sys_func_call: ($global_clock), line:6:7, endln:6:20 |vpiParent: @@ -597,7 +597,7 @@ design: (work@top) |vpiActual: \_logic_net: (work@top.ack), line:6:30, endln:6:33 |vpiPropertyDecl: - \_property_decl: (work@top.p2) + \_property_decl: (work@top.p2), line:9:12, endln:9:14 |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/CheckerInst/dut.sv, line:1:1, endln:16:10 |vpiName:p2 @@ -605,7 +605,7 @@ design: (work@top) |vpiPropFormalDecl: \_prop_formal_decl: (req) |vpiParent: - \_property_decl: (work@top.p2) + \_property_decl: (work@top.p2), line:9:12, endln:9:14 |vpiName:req |vpiTypespec: \_ref_typespec: (work@top.p2.req) @@ -615,7 +615,7 @@ design: (work@top) |vpiPropFormalDecl: \_prop_formal_decl: (ack) |vpiParent: - \_property_decl: (work@top.p2) + \_property_decl: (work@top.p2), line:9:12, endln:9:14 |vpiName:ack |vpiTypespec: \_ref_typespec: (work@top.p2.ack) @@ -625,7 +625,7 @@ design: (work@top) |vpiPropFormalDecl: \_prop_formal_decl: (interrupt) |vpiParent: - \_property_decl: (work@top.p2) + \_property_decl: (work@top.p2), line:9:12, endln:9:14 |vpiName:interrupt |vpiTypespec: \_ref_typespec: (work@top.p2.interrupt) @@ -635,7 +635,7 @@ design: (work@top) |vpiPropertySpec: \_property_spec: , line:10:5, endln:10:55 |vpiParent: - \_property_decl: (work@top.p2) + \_property_decl: (work@top.p2), line:9:12, endln:9:14 |vpiClockingEvent: \_sys_func_call: ($global_clock), line:10:7, endln:10:20 |vpiParent: @@ -759,6 +759,13 @@ design: (work@top) ============================== Begin Linting Results ============================== [LINT]: ${SURELOG_DIR}/tests/CheckerInst/dut.sv:6:5: Non synthesizable construct, -[LINT]: ${SURELOG_DIR}/tests/CheckerInst/dut.sv:1:1: Non synthesizable construct, work@top +[LINT]: ${SURELOG_DIR}/tests/CheckerInst/dut.sv:5:12: Non synthesizable construct, p1 +[LINT]: ${SURELOG_DIR}/tests/CheckerInst/dut.sv:10:5: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/CheckerInst/dut.sv:9:12: Non synthesizable construct, p2 +[LINT]: ${SURELOG_DIR}/tests/CheckerInst/dut.sv:13:3: Non synthesizable construct, check +[LINT]: ${SURELOG_DIR}/tests/CheckerInst/dut.sv:3:3: Non synthesizable construct, top_clocking +[LINT]: ${SURELOG_DIR}/tests/CheckerInst/dut.sv:5:12: Non synthesizable construct, p1 +[LINT]: ${SURELOG_DIR}/tests/CheckerInst/dut.sv:9:12: Non synthesizable construct, p2 +[LINT]: ${SURELOG_DIR}/tests/CheckerInst/dut.sv:13:3: Non synthesizable construct, check [LINT]: ${SURELOG_DIR}/tests/CheckerInst/dut.sv:3:3: Non synthesizable construct, top_clocking ============================== End Linting Results ============================== diff --git a/tests/LegalPastFunc/LegalPastFunc.log b/tests/LegalPastFunc/LegalPastFunc.log index c41bc0e14b..83f71d2248 100644 --- a/tests/LegalPastFunc/LegalPastFunc.log +++ b/tests/LegalPastFunc/LegalPastFunc.log @@ -169,19 +169,19 @@ design: (work@top) \_design: (work@top) |vpiFullName:work@top |vpiSequenceDecl: - \_sequence_decl: (work@top.s_req_bad) + \_sequence_decl: (work@top.s_req_bad), line:3:10, endln:3:19 |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/LegalPastFunc/dut.sv, line:1:1, endln:14:10 |vpiName:s_req_bad |vpiFullName:work@top.s_req_bad |vpiExpr: - \_multiclock_sequence_expr: + \_multiclock_sequence_expr: , line:4:3, endln:5:31 |vpiClockedSeq: \_clocked_seq: |vpiClockingEvent: \_operation: , line:4:6, endln:4:17 |vpiParent: - \_sequence_decl: (work@top.s_req_bad) + \_sequence_decl: (work@top.s_req_bad), line:3:10, endln:3:19 |vpiOpType:39 |vpiOperand: \_ref_obj: (work@top.s_req_bad.clk), line:4:14, endln:4:17 @@ -194,7 +194,7 @@ design: (work@top) |vpiSequenceExpr: \_operation: , line:5:3, endln:5:31 |vpiParent: - \_sequence_decl: (work@top.s_req_bad) + \_sequence_decl: (work@top.s_req_bad), line:3:10, endln:3:19 |vpiOpType:54 |vpiOperand: \_sys_func_call: ($rose), line:5:3, endln:5:13 @@ -242,19 +242,19 @@ design: (work@top) |vpiConstType:9 |vpiName:$past |vpiSequenceDecl: - \_sequence_decl: (work@top.s_req_ok) + \_sequence_decl: (work@top.s_req_ok), line:9:10, endln:9:18 |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/LegalPastFunc/dut.sv, line:1:1, endln:14:10 |vpiName:s_req_ok |vpiFullName:work@top.s_req_ok |vpiExpr: - \_multiclock_sequence_expr: + \_multiclock_sequence_expr: , line:10:3, endln:11:31 |vpiClockedSeq: \_clocked_seq: |vpiClockingEvent: \_operation: , line:10:6, endln:10:17 |vpiParent: - \_sequence_decl: (work@top.s_req_ok) + \_sequence_decl: (work@top.s_req_ok), line:9:10, endln:9:18 |vpiOpType:39 |vpiOperand: \_ref_obj: (work@top.s_req_ok.clk), line:10:14, endln:10:17 @@ -267,7 +267,7 @@ design: (work@top) |vpiSequenceExpr: \_operation: , line:11:3, endln:11:31 |vpiParent: - \_sequence_decl: (work@top.s_req_ok) + \_sequence_decl: (work@top.s_req_ok), line:9:10, endln:9:18 |vpiOpType:54 |vpiOperand: \_sys_func_call: ($rose), line:11:3, endln:11:13 @@ -333,19 +333,19 @@ design: (work@top) \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/LegalPastFunc/dut.sv, line:1:1, endln:14:10 |vpiName:work@top |vpiSequenceDecl: - \_sequence_decl: (work@top.s_req_bad) + \_sequence_decl: (work@top.s_req_bad), line:3:10, endln:3:19 |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/LegalPastFunc/dut.sv, line:1:1, endln:14:10 |vpiName:s_req_bad |vpiFullName:work@top.s_req_bad |vpiExpr: - \_multiclock_sequence_expr: + \_multiclock_sequence_expr: , line:4:3, endln:5:31 |vpiParent: - \_sequence_decl: (work@top.s_req_bad) + \_sequence_decl: (work@top.s_req_bad), line:3:10, endln:3:19 |vpiClockedSeq: \_clocked_seq: |vpiParent: - \_multiclock_sequence_expr: + \_multiclock_sequence_expr: , line:4:3, endln:5:31 |vpiClockingEvent: \_operation: , line:4:6, endln:4:17 |vpiParent: @@ -400,19 +400,19 @@ design: (work@top) \_constant: , line:5:29, endln:5:30 |vpiName:$past |vpiSequenceDecl: - \_sequence_decl: (work@top.s_req_ok) + \_sequence_decl: (work@top.s_req_ok), line:9:10, endln:9:18 |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/LegalPastFunc/dut.sv, line:1:1, endln:14:10 |vpiName:s_req_ok |vpiFullName:work@top.s_req_ok |vpiExpr: - \_multiclock_sequence_expr: + \_multiclock_sequence_expr: , line:10:3, endln:11:31 |vpiParent: - \_sequence_decl: (work@top.s_req_ok) + \_sequence_decl: (work@top.s_req_ok), line:9:10, endln:9:18 |vpiClockedSeq: \_clocked_seq: |vpiParent: - \_multiclock_sequence_expr: + \_multiclock_sequence_expr: , line:10:3, endln:11:31 |vpiClockingEvent: \_operation: , line:10:6, endln:10:17 |vpiParent: @@ -481,10 +481,20 @@ design: (work@top) [LINT]: ${SURELOG_DIR}/tests/LegalPastFunc/dut.sv:5:29: Non positive (<1) value, 0 [LINT]: ${SURELOG_DIR}/tests/LegalPastFunc/dut.sv:5:3: Non synthesizable construct, $rose [LINT]: ${SURELOG_DIR}/tests/LegalPastFunc/dut.sv:5:18: Non synthesizable construct, $past -[LINT]: ${SURELOG_DIR}/tests/LegalPastFunc/dut.sv:1:1: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/LegalPastFunc/dut.sv:4:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/LegalPastFunc/dut.sv:3:10: Non synthesizable construct, s_req_bad +[LINT]: ${SURELOG_DIR}/tests/LegalPastFunc/dut.sv:11:3: Non synthesizable construct, $rose +[LINT]: ${SURELOG_DIR}/tests/LegalPastFunc/dut.sv:11:18: Non synthesizable construct, $past +[LINT]: ${SURELOG_DIR}/tests/LegalPastFunc/dut.sv:10:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/LegalPastFunc/dut.sv:9:10: Non synthesizable construct, s_req_ok [LINT]: ${SURELOG_DIR}/tests/LegalPastFunc/dut.sv:5:3: Non synthesizable construct, $rose [LINT]: ${SURELOG_DIR}/tests/LegalPastFunc/dut.sv:5:18: Non synthesizable construct, $past -[LINT]: ${SURELOG_DIR}/tests/LegalPastFunc/dut.sv:1:1: Non synthesizable construct, work@top +[LINT]: ${SURELOG_DIR}/tests/LegalPastFunc/dut.sv:4:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/LegalPastFunc/dut.sv:3:10: Non synthesizable construct, s_req_bad +[LINT]: ${SURELOG_DIR}/tests/LegalPastFunc/dut.sv:11:3: Non synthesizable construct, $rose +[LINT]: ${SURELOG_DIR}/tests/LegalPastFunc/dut.sv:11:18: Non synthesizable construct, $past +[LINT]: ${SURELOG_DIR}/tests/LegalPastFunc/dut.sv:10:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/LegalPastFunc/dut.sv:9:10: Non synthesizable construct, s_req_ok ============================== End Linting Results ============================== ============================== Begin RoundTrip Results ============================== diff --git a/tests/OneDivider/OneDivider.log b/tests/OneDivider/OneDivider.log index bebd1e1bfe..e90854eca5 100644 --- a/tests/OneDivider/OneDivider.log +++ b/tests/OneDivider/OneDivider.log @@ -243,7 +243,7 @@ design: (work@tb) \_design: (work@tb) |vpiFullName:work@tb |vpiPropertyDecl: - \_property_decl: (work@tb.divide) + \_property_decl: (work@tb.divide), line:24:12, endln:24:18 |vpiParent: \_module_inst: work@tb (work@tb), file:${SURELOG_DIR}/tests/OneDivider/tb.v, line:1:1, endln:30:10 |vpiName:divide @@ -265,7 +265,7 @@ design: (work@tb) |vpiPropertySpec: \_property_spec: , line:25:3, endln:25:52 |vpiParent: - \_property_decl: (work@tb.divide) + \_property_decl: (work@tb.divide), line:24:12, endln:24:18 |vpiClockingEvent: \_operation: , line:25:5, endln:25:16 |vpiParent: @@ -639,7 +639,7 @@ design: (work@tb) \_module_inst: work@tb (work@tb), file:${SURELOG_DIR}/tests/OneDivider/tb.v, line:1:1, endln:30:10 |vpiName:work@tb |vpiPropertyDecl: - \_property_decl: (work@tb.divide) + \_property_decl: (work@tb.divide), line:24:12, endln:24:18 |vpiVariables: \_logic_var: (work@tb.div), line:3:9, endln:3:12 |vpiParent: @@ -877,7 +877,8 @@ design: (work@tb) [LINT]: ${SURELOG_DIR}/tests/OneDivider/tb.v:25:18: Non synthesizable construct, $rose [LINT]: ${SURELOG_DIR}/tests/OneDivider/tb.v:25:44: Non synthesizable construct, $rose [LINT]: ${SURELOG_DIR}/tests/OneDivider/tb.v:25:3: Non synthesizable construct, -[LINT]: ${SURELOG_DIR}/tests/OneDivider/tb.v:1:1: Non synthesizable construct, work@tb +[LINT]: ${SURELOG_DIR}/tests/OneDivider/tb.v:24:12: Non synthesizable construct, divide +[LINT]: ${SURELOG_DIR}/tests/OneDivider/tb.v:28:28: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/tests/OneDivider/tb.v:8:5: Non synthesizable construct, $monitor [LINT]: ${SURELOG_DIR}/tests/OneDivider/tb.v:9:5: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/tests/OneDivider/tb.v:16:5: Non synthesizable construct, diff --git a/tests/PoundDelay/PoundDelay.log b/tests/PoundDelay/PoundDelay.log index 447d14ce35..74d98b40ae 100644 --- a/tests/PoundDelay/PoundDelay.log +++ b/tests/PoundDelay/PoundDelay.log @@ -51,7 +51,7 @@ design: (work@top) \_design: (work@top) |vpiFullName:work@top |vpiPropertyDecl: - \_property_decl: (work@top.inq2) + \_property_decl: (work@top.inq2), line:2:10, endln:2:14 |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/PoundDelay/dut.sv, line:1:1, endln:5:10 |vpiName:inq2 @@ -69,7 +69,7 @@ design: (work@top) |vpiPropertySpec: \_property_spec: , line:3:1, endln:3:44 |vpiParent: - \_property_decl: (work@top.inq2) + \_property_decl: (work@top.inq2), line:2:10, endln:2:14 |vpiClockingEvent: \_operation: , line:3:3, endln:3:14 |vpiParent: @@ -197,7 +197,7 @@ design: (work@top) \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/PoundDelay/dut.sv, line:1:1, endln:5:10 |vpiName:work@top |vpiPropertyDecl: - \_property_decl: (work@top.inq2) + \_property_decl: (work@top.inq2), line:2:10, endln:2:14 |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/PoundDelay/dut.sv, line:1:1, endln:5:10 |vpiName:inq2 @@ -205,7 +205,7 @@ design: (work@top) |vpiPropFormalDecl: \_prop_formal_decl: (r1) |vpiParent: - \_property_decl: (work@top.inq2) + \_property_decl: (work@top.inq2), line:2:10, endln:2:14 |vpiName:r1 |vpiTypespec: \_ref_typespec: (work@top.inq2.r1) @@ -215,7 +215,7 @@ design: (work@top) |vpiPropFormalDecl: \_prop_formal_decl: (r2) |vpiParent: - \_property_decl: (work@top.inq2) + \_property_decl: (work@top.inq2), line:2:10, endln:2:14 |vpiName:r2 |vpiTypespec: \_ref_typespec: (work@top.inq2.r2) @@ -225,7 +225,7 @@ design: (work@top) |vpiPropertySpec: \_property_spec: , line:3:1, endln:3:44 |vpiParent: - \_property_decl: (work@top.inq2) + \_property_decl: (work@top.inq2), line:2:10, endln:2:14 |vpiClockingEvent: \_operation: , line:3:3, endln:3:14 |vpiParent: @@ -314,5 +314,6 @@ design: (work@top) ============================== Begin Linting Results ============================== [LINT]: ${SURELOG_DIR}/tests/PoundDelay/dut.sv:3:1: Non synthesizable construct, -[LINT]: ${SURELOG_DIR}/tests/PoundDelay/dut.sv:1:1: Non synthesizable construct, work@top +[LINT]: ${SURELOG_DIR}/tests/PoundDelay/dut.sv:2:10: Non synthesizable construct, inq2 +[LINT]: ${SURELOG_DIR}/tests/PoundDelay/dut.sv:2:10: Non synthesizable construct, inq2 ============================== End Linting Results ============================== diff --git a/tests/PropBinding/PropBinding.log b/tests/PropBinding/PropBinding.log index 4a39a7d97f..b843c51b55 100644 --- a/tests/PropBinding/PropBinding.log +++ b/tests/PropBinding/PropBinding.log @@ -139,7 +139,7 @@ design: (work@clock_divider_assertions) \_design: (work@clock_divider_assertions) |vpiFullName:work@clock_divider_assertions |vpiPropertyDecl: - \_property_decl: (work@clock_divider_assertions.p_reset) + \_property_decl: (work@clock_divider_assertions.p_reset), line:10:14, endln:10:21 |vpiParent: \_module_inst: work@clock_divider_assertions (work@clock_divider_assertions), file:${SURELOG_DIR}/tests/PropBinding/dut.sv, line:3:1, endln:18:10 |vpiName:p_reset @@ -147,7 +147,7 @@ design: (work@clock_divider_assertions) |vpiPropertySpec: \_property_spec: , line:11:9, endln:12:31 |vpiParent: - \_property_decl: (work@clock_divider_assertions.p_reset) + \_property_decl: (work@clock_divider_assertions.p_reset), line:10:14, endln:10:21 |vpiClockingEvent: \_operation: , line:11:11, endln:11:22 |vpiParent: @@ -233,7 +233,7 @@ design: (work@clock_divider_assertions) |vpiName:p_reset |vpiFullName:work@clock_divider_assertions.p_reset |vpiActual: - \_property_decl: (work@clock_divider_assertions.p_reset) + \_property_decl: (work@clock_divider_assertions.p_reset), line:10:14, endln:10:21 |vpiPort: \_port: (clk), line:4:11, endln:4:14 |vpiParent: @@ -301,7 +301,7 @@ design: (work@clock_divider_assertions) \_module_inst: work@clock_divider_assertions (work@clock_divider_assertions), file:${SURELOG_DIR}/tests/PropBinding/dut.sv, line:3:1, endln:18:10 |vpiName:work@clock_divider_assertions |vpiPropertyDecl: - \_property_decl: (work@clock_divider_assertions.p_reset) + \_property_decl: (work@clock_divider_assertions.p_reset), line:10:14, endln:10:21 |vpiParent: \_module_inst: work@clock_divider_assertions (work@clock_divider_assertions), file:${SURELOG_DIR}/tests/PropBinding/dut.sv, line:3:1, endln:18:10 |vpiName:p_reset @@ -309,7 +309,7 @@ design: (work@clock_divider_assertions) |vpiPropertySpec: \_property_spec: , line:11:9, endln:12:31 |vpiParent: - \_property_decl: (work@clock_divider_assertions.p_reset) + \_property_decl: (work@clock_divider_assertions.p_reset), line:10:14, endln:10:21 |vpiClockingEvent: \_operation: , line:11:11, endln:11:22 |vpiParent: @@ -413,7 +413,7 @@ design: (work@clock_divider_assertions) |vpiName:p_reset |vpiFullName:work@clock_divider_assertions.p_reset |vpiActual: - \_property_decl: (work@clock_divider_assertions.p_reset) + \_property_decl: (work@clock_divider_assertions.p_reset), line:10:14, endln:10:21 |vpiTopModule:1 |vpiPort: \_port: (clk), line:4:11, endln:4:14 @@ -509,7 +509,11 @@ design: (work@clock_divider_assertions) ============================== Begin Linting Results ============================== [LINT]: ${SURELOG_DIR}/tests/PropBinding/dut.sv:11:9: Non synthesizable construct, -[LINT]: ${SURELOG_DIR}/tests/PropBinding/dut.sv:3:1: Non synthesizable construct, work@clock_divider_assertions +[LINT]: ${SURELOG_DIR}/tests/PropBinding/dut.sv:10:14: Non synthesizable construct, p_reset +[LINT]: ${SURELOG_DIR}/tests/PropBinding/dut.sv:16:22: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/PropBinding/dut.sv:11:9: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/PropBinding/dut.sv:10:14: Non synthesizable construct, p_reset +[LINT]: ${SURELOG_DIR}/tests/PropBinding/dut.sv:16:22: Non synthesizable construct, ============================== End Linting Results ============================== ============================== Begin RoundTrip Results ============================== diff --git a/tests/SeqUseNonTemp/SeqUseNonTemp.log b/tests/SeqUseNonTemp/SeqUseNonTemp.log index 25bbaa899e..3941dd1515 100644 --- a/tests/SeqUseNonTemp/SeqUseNonTemp.log +++ b/tests/SeqUseNonTemp/SeqUseNonTemp.log @@ -262,7 +262,7 @@ design: (work@top) \_design: (work@top) |vpiFullName:work@top |vpiPropertyDecl: - \_property_decl: (work@top.p1_count_increment) + \_property_decl: (work@top.p1_count_increment), line:10:10, endln:10:28 |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv, line:2:1, endln:29:10 |vpiName:p1_count_increment @@ -270,7 +270,7 @@ design: (work@top) |vpiPropertySpec: \_property_spec: , line:11:3, endln:11:32 |vpiParent: - \_property_decl: (work@top.p1_count_increment) + \_property_decl: (work@top.p1_count_increment), line:10:10, endln:10:28 |vpiPropertyExpr: \_operation: , line:11:3, endln:11:32 |vpiParent: @@ -283,7 +283,7 @@ design: (work@top) |vpiName:seq_count_increment |vpiFullName:work@top.p1_count_increment.seq_count_increment |vpiActual: - \_sequence_decl: (work@top.seq_count_increment) + \_sequence_decl: (work@top.seq_count_increment), line:5:10, endln:5:29 |vpiOperand: \_ref_obj: (work@top.p1_count_increment.count), line:11:27, endln:11:32 |vpiParent: @@ -293,7 +293,7 @@ design: (work@top) |vpiActual: \_logic_net: (work@top.count), line:3:7, endln:3:12 |vpiPropertyDecl: - \_property_decl: (work@top.p1_count_increment) + \_property_decl: (work@top.p1_count_increment), line:15:10, endln:15:28 |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv, line:2:1, endln:29:10 |vpiName:p1_count_increment @@ -301,7 +301,7 @@ design: (work@top) |vpiPropertySpec: \_property_spec: , line:16:3, endln:16:47 |vpiParent: - \_property_decl: (work@top.p1_count_increment) + \_property_decl: (work@top.p1_count_increment), line:15:10, endln:15:28 |vpiClockingEvent: \_operation: , line:16:5, endln:16:16 |vpiParent: @@ -327,7 +327,7 @@ design: (work@top) |vpiName:seq_count_increment |vpiFullName:work@top.p1_count_increment.seq_count_increment |vpiActual: - \_sequence_decl: (work@top.seq_count_increment) + \_sequence_decl: (work@top.seq_count_increment), line:5:10, endln:5:29 |vpiOperand: \_ref_obj: (work@top.p1_count_increment.count), line:16:42, endln:16:47 |vpiParent: @@ -337,7 +337,7 @@ design: (work@top) |vpiActual: \_logic_net: (work@top.count), line:3:7, endln:3:12 |vpiPropertyDecl: - \_property_decl: (work@top.p2_count_increment) + \_property_decl: (work@top.p2_count_increment), line:20:10, endln:20:28 |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv, line:2:1, endln:29:10 |vpiName:p2_count_increment @@ -345,7 +345,7 @@ design: (work@top) |vpiPropertySpec: \_property_spec: , line:21:3, endln:21:47 |vpiParent: - \_property_decl: (work@top.p2_count_increment) + \_property_decl: (work@top.p2_count_increment), line:20:10, endln:20:28 |vpiClockingEvent: \_operation: , line:21:5, endln:21:16 |vpiParent: @@ -379,9 +379,9 @@ design: (work@top) |vpiName:seq_count_increment |vpiFullName:work@top.p2_count_increment.seq_count_increment |vpiActual: - \_sequence_decl: (work@top.seq_count_increment) + \_sequence_decl: (work@top.seq_count_increment), line:5:10, endln:5:29 |vpiPropertyDecl: - \_property_decl: (work@top.p3_count_increment) + \_property_decl: (work@top.p3_count_increment), line:25:10, endln:25:28 |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv, line:2:1, endln:29:10 |vpiName:p3_count_increment @@ -389,7 +389,7 @@ design: (work@top) |vpiPropertySpec: \_property_spec: , line:26:3, endln:26:61 |vpiParent: - \_property_decl: (work@top.p3_count_increment) + \_property_decl: (work@top.p3_count_increment), line:25:10, endln:25:28 |vpiClockingEvent: \_operation: , line:26:5, endln:26:16 |vpiParent: @@ -415,7 +415,7 @@ design: (work@top) |vpiName:seq_count_increment |vpiFullName:work@top.p3_count_increment.seq_count_increment |vpiActual: - \_sequence_decl: (work@top.seq_count_increment) + \_sequence_decl: (work@top.seq_count_increment), line:5:10, endln:5:29 |vpiOperand: \_ref_obj: (work@top.p3_count_increment.seq_count_increment), line:26:42, endln:26:61 |vpiParent: @@ -423,21 +423,21 @@ design: (work@top) |vpiName:seq_count_increment |vpiFullName:work@top.p3_count_increment.seq_count_increment |vpiActual: - \_sequence_decl: (work@top.seq_count_increment) + \_sequence_decl: (work@top.seq_count_increment), line:5:10, endln:5:29 |vpiSequenceDecl: - \_sequence_decl: (work@top.seq_count_increment) + \_sequence_decl: (work@top.seq_count_increment), line:5:10, endln:5:29 |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv, line:2:1, endln:29:10 |vpiName:seq_count_increment |vpiFullName:work@top.seq_count_increment |vpiExpr: - \_multiclock_sequence_expr: + \_multiclock_sequence_expr: , line:6:1, endln:6:52 |vpiClockedSeq: \_clocked_seq: |vpiClockingEvent: \_operation: , line:6:3, endln:6:14 |vpiParent: - \_sequence_decl: (work@top.seq_count_increment) + \_sequence_decl: (work@top.seq_count_increment), line:5:10, endln:5:29 |vpiOpType:39 |vpiOperand: \_ref_obj: (work@top.seq_count_increment.clk), line:6:11, endln:6:14 @@ -450,7 +450,7 @@ design: (work@top) |vpiSequenceExpr: \_operation: , line:6:16, endln:6:52 |vpiParent: - \_sequence_decl: (work@top.seq_count_increment) + \_sequence_decl: (work@top.seq_count_increment), line:5:10, endln:5:29 |vpiOpType:27 |vpiOperand: \_operation: , line:6:17, endln:6:29 @@ -541,7 +541,7 @@ design: (work@top) \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv, line:2:1, endln:29:10 |vpiName:work@top |vpiPropertyDecl: - \_property_decl: (work@top.p1_count_increment) + \_property_decl: (work@top.p1_count_increment), line:10:10, endln:10:28 |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv, line:2:1, endln:29:10 |vpiName:p1_count_increment @@ -549,7 +549,7 @@ design: (work@top) |vpiPropertySpec: \_property_spec: , line:11:3, endln:11:32 |vpiParent: - \_property_decl: (work@top.p1_count_increment) + \_property_decl: (work@top.p1_count_increment), line:10:10, endln:10:28 |vpiPropertyExpr: \_operation: , line:11:3, endln:11:32 |vpiParent: @@ -562,7 +562,7 @@ design: (work@top) |vpiName:seq_count_increment |vpiFullName:work@top.p1_count_increment.seq_count_increment |vpiActual: - \_sequence_decl: (work@top.seq_count_increment) + \_sequence_decl: (work@top.seq_count_increment), line:5:10, endln:5:29 |vpiOperand: \_ref_obj: (work@top.p1_count_increment.count), line:11:27, endln:11:32 |vpiParent: @@ -572,7 +572,7 @@ design: (work@top) |vpiActual: \_logic_var: (work@top.count), line:3:7, endln:3:12 |vpiPropertyDecl: - \_property_decl: (work@top.p1_count_increment) + \_property_decl: (work@top.p1_count_increment), line:15:10, endln:15:28 |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv, line:2:1, endln:29:10 |vpiName:p1_count_increment @@ -580,7 +580,7 @@ design: (work@top) |vpiPropertySpec: \_property_spec: , line:16:3, endln:16:47 |vpiParent: - \_property_decl: (work@top.p1_count_increment) + \_property_decl: (work@top.p1_count_increment), line:15:10, endln:15:28 |vpiClockingEvent: \_operation: , line:16:5, endln:16:16 |vpiParent: @@ -606,7 +606,7 @@ design: (work@top) |vpiName:seq_count_increment |vpiFullName:work@top.p1_count_increment.seq_count_increment |vpiActual: - \_sequence_decl: (work@top.seq_count_increment) + \_sequence_decl: (work@top.seq_count_increment), line:5:10, endln:5:29 |vpiOperand: \_ref_obj: (work@top.p1_count_increment.count), line:16:42, endln:16:47 |vpiParent: @@ -616,7 +616,7 @@ design: (work@top) |vpiActual: \_logic_var: (work@top.count), line:3:7, endln:3:12 |vpiPropertyDecl: - \_property_decl: (work@top.p2_count_increment) + \_property_decl: (work@top.p2_count_increment), line:20:10, endln:20:28 |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv, line:2:1, endln:29:10 |vpiName:p2_count_increment @@ -624,7 +624,7 @@ design: (work@top) |vpiPropertySpec: \_property_spec: , line:21:3, endln:21:47 |vpiParent: - \_property_decl: (work@top.p2_count_increment) + \_property_decl: (work@top.p2_count_increment), line:20:10, endln:20:28 |vpiClockingEvent: \_operation: , line:21:5, endln:21:16 |vpiParent: @@ -658,9 +658,9 @@ design: (work@top) |vpiName:seq_count_increment |vpiFullName:work@top.p2_count_increment.seq_count_increment |vpiActual: - \_sequence_decl: (work@top.seq_count_increment) + \_sequence_decl: (work@top.seq_count_increment), line:5:10, endln:5:29 |vpiPropertyDecl: - \_property_decl: (work@top.p3_count_increment) + \_property_decl: (work@top.p3_count_increment), line:25:10, endln:25:28 |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv, line:2:1, endln:29:10 |vpiName:p3_count_increment @@ -668,7 +668,7 @@ design: (work@top) |vpiPropertySpec: \_property_spec: , line:26:3, endln:26:61 |vpiParent: - \_property_decl: (work@top.p3_count_increment) + \_property_decl: (work@top.p3_count_increment), line:25:10, endln:25:28 |vpiClockingEvent: \_operation: , line:26:5, endln:26:16 |vpiParent: @@ -694,7 +694,7 @@ design: (work@top) |vpiName:seq_count_increment |vpiFullName:work@top.p3_count_increment.seq_count_increment |vpiActual: - \_sequence_decl: (work@top.seq_count_increment) + \_sequence_decl: (work@top.seq_count_increment), line:5:10, endln:5:29 |vpiOperand: \_ref_obj: (work@top.p3_count_increment.seq_count_increment), line:26:42, endln:26:61 |vpiParent: @@ -702,21 +702,21 @@ design: (work@top) |vpiName:seq_count_increment |vpiFullName:work@top.p3_count_increment.seq_count_increment |vpiActual: - \_sequence_decl: (work@top.seq_count_increment) + \_sequence_decl: (work@top.seq_count_increment), line:5:10, endln:5:29 |vpiSequenceDecl: - \_sequence_decl: (work@top.seq_count_increment) + \_sequence_decl: (work@top.seq_count_increment), line:5:10, endln:5:29 |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv, line:2:1, endln:29:10 |vpiName:seq_count_increment |vpiFullName:work@top.seq_count_increment |vpiExpr: - \_multiclock_sequence_expr: + \_multiclock_sequence_expr: , line:6:1, endln:6:52 |vpiParent: - \_sequence_decl: (work@top.seq_count_increment) + \_sequence_decl: (work@top.seq_count_increment), line:5:10, endln:5:29 |vpiClockedSeq: \_clocked_seq: |vpiParent: - \_multiclock_sequence_expr: + \_multiclock_sequence_expr: , line:6:1, endln:6:52 |vpiClockingEvent: \_operation: , line:6:3, endln:6:14 |vpiParent: @@ -827,7 +827,24 @@ design: (work@top) ============================== Begin Linting Results ============================== [LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:21:28: Sequence used in non-temporal context, seq_count_increment [LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:26:42: Sequence used in non-temporal context, seq_count_increment -[LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:2:1: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:6:1: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:5:10: Non synthesizable construct, seq_count_increment [LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:11:3: Non synthesizable construct, -[LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:2:1: Non synthesizable construct, work@top +[LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:10:10: Non synthesizable construct, p1_count_increment +[LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:16:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:15:10: Non synthesizable construct, p1_count_increment +[LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:21:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:20:10: Non synthesizable construct, p2_count_increment +[LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:26:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:25:10: Non synthesizable construct, p3_count_increment +[LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:11:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:10:10: Non synthesizable construct, p1_count_increment +[LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:16:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:15:10: Non synthesizable construct, p1_count_increment +[LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:21:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:20:10: Non synthesizable construct, p2_count_increment +[LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:26:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:25:10: Non synthesizable construct, p3_count_increment +[LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:6:1: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/SeqUseNonTemp/dut.sv:5:10: Non synthesizable construct, seq_count_increment ============================== End Linting Results ============================== diff --git a/tests/SequenceInst/SequenceInst.log b/tests/SequenceInst/SequenceInst.log index 83ac4c4dcb..303fbb812c 100644 --- a/tests/SequenceInst/SequenceInst.log +++ b/tests/SequenceInst/SequenceInst.log @@ -592,7 +592,7 @@ design: (work@m) \_design: (work@m) |vpiFullName:work@m |vpiPropertyDecl: - \_property_decl: (work@m.p_triggers) + \_property_decl: (work@m.p_triggers), line:7:12, endln:7:22 |vpiParent: \_module_inst: work@m (work@m), file:${SURELOG_DIR}/tests/SequenceInst/dut.sv, line:1:1, endln:30:10 |vpiName:p_triggers @@ -625,7 +625,7 @@ design: (work@m) |vpiPropertySpec: \_property_spec: , line:9:5, endln:9:69 |vpiParent: - \_property_decl: (work@m.p_triggers) + \_property_decl: (work@m.p_triggers), line:7:12, endln:7:22 |vpiClockingEvent: \_ref_obj: (work@m.p_triggers.clk), line:9:5, endln:9:9 |vpiParent: @@ -643,7 +643,7 @@ design: (work@m) |vpiActual: \_logic_net: (work@m.rst), line:3:9, endln:3:12 |vpiPropertyDecl: - \_property_decl: (work@m.p_multiclock) + \_property_decl: (work@m.p_multiclock), line:12:12, endln:12:24 |vpiParent: \_module_inst: work@m (work@m), file:${SURELOG_DIR}/tests/SequenceInst/dut.sv, line:1:1, endln:30:10 |vpiName:p_multiclock @@ -686,7 +686,7 @@ design: (work@m) |vpiPropertySpec: \_property_spec: , line:13:5, endln:13:42 |vpiParent: - \_property_decl: (work@m.p_multiclock) + \_property_decl: (work@m.p_multiclock), line:12:12, endln:12:24 |vpiClockingEvent: \_ref_obj: (work@m.p_multiclock.clkw), line:13:5, endln:13:10 |vpiParent: @@ -1332,7 +1332,7 @@ design: (work@m) \_module_inst: work@m (work@m), file:${SURELOG_DIR}/tests/SequenceInst/dut.sv, line:1:1, endln:30:10 |vpiName:work@m |vpiPropertyDecl: - \_property_decl: (work@m.p_triggers) + \_property_decl: (work@m.p_triggers), line:7:12, endln:7:22 |vpiParent: \_module_inst: work@m (work@m), file:${SURELOG_DIR}/tests/SequenceInst/dut.sv, line:1:1, endln:30:10 |vpiName:p_triggers @@ -1340,7 +1340,7 @@ design: (work@m) |vpiPropFormalDecl: \_prop_formal_decl: (start_event) |vpiParent: - \_property_decl: (work@m.p_triggers) + \_property_decl: (work@m.p_triggers), line:7:12, endln:7:22 |vpiName:start_event |vpiTypespec: \_ref_typespec: (work@m.p_triggers.start_event) @@ -1350,7 +1350,7 @@ design: (work@m) |vpiPropFormalDecl: \_prop_formal_decl: (end_event) |vpiParent: - \_property_decl: (work@m.p_triggers) + \_property_decl: (work@m.p_triggers), line:7:12, endln:7:22 |vpiName:end_event |vpiTypespec: \_ref_typespec: (work@m.p_triggers.end_event) @@ -1360,7 +1360,7 @@ design: (work@m) |vpiPropFormalDecl: \_prop_formal_decl: (form) |vpiParent: - \_property_decl: (work@m.p_triggers) + \_property_decl: (work@m.p_triggers), line:7:12, endln:7:22 |vpiName:form |vpiTypespec: \_ref_typespec: (work@m.p_triggers.form) @@ -1370,7 +1370,7 @@ design: (work@m) |vpiPropFormalDecl: \_prop_formal_decl: (clk) |vpiParent: - \_property_decl: (work@m.p_triggers) + \_property_decl: (work@m.p_triggers), line:7:12, endln:7:22 |vpiName:clk |vpiTypespec: \_ref_typespec: (work@m.p_triggers.clk) @@ -1380,7 +1380,7 @@ design: (work@m) |vpiPropFormalDecl: \_prop_formal_decl: (rst) |vpiParent: - \_property_decl: (work@m.p_triggers) + \_property_decl: (work@m.p_triggers), line:7:12, endln:7:22 |vpiName:rst |vpiTypespec: \_ref_typespec: (work@m.p_triggers.rst) @@ -1390,7 +1390,7 @@ design: (work@m) |vpiPropertySpec: \_property_spec: , line:9:5, endln:9:69 |vpiParent: - \_property_decl: (work@m.p_triggers) + \_property_decl: (work@m.p_triggers), line:7:12, endln:7:22 |vpiClockingEvent: \_ref_obj: (work@m.p_triggers.clk), line:9:5, endln:9:9 |vpiParent: @@ -1408,7 +1408,7 @@ design: (work@m) |vpiActual: \_logic_var: (work@m.rst), line:3:9, endln:3:12 |vpiPropertyDecl: - \_property_decl: (work@m.p_multiclock) + \_property_decl: (work@m.p_multiclock), line:12:12, endln:12:24 |vpiParent: \_module_inst: work@m (work@m), file:${SURELOG_DIR}/tests/SequenceInst/dut.sv, line:1:1, endln:30:10 |vpiName:p_multiclock @@ -1416,7 +1416,7 @@ design: (work@m) |vpiPropFormalDecl: \_prop_formal_decl: (clkw) |vpiParent: - \_property_decl: (work@m.p_multiclock) + \_property_decl: (work@m.p_multiclock), line:12:12, endln:12:24 |vpiName:clkw |vpiTypespec: \_ref_typespec: (work@m.p_multiclock.clkw) @@ -1426,7 +1426,7 @@ design: (work@m) |vpiPropFormalDecl: \_prop_formal_decl: (clkx) |vpiParent: - \_property_decl: (work@m.p_multiclock) + \_property_decl: (work@m.p_multiclock), line:12:12, endln:12:24 |vpiName:clkx |vpiTypespec: \_ref_typespec: (work@m.p_multiclock.clkx) @@ -1436,7 +1436,7 @@ design: (work@m) |vpiPropFormalDecl: \_prop_formal_decl: (clky) |vpiParent: - \_property_decl: (work@m.p_multiclock) + \_property_decl: (work@m.p_multiclock), line:12:12, endln:12:24 |vpiName:clky |vpiTypespec: \_ref_typespec: (work@m.p_multiclock.clky) @@ -1446,7 +1446,7 @@ design: (work@m) |vpiPropFormalDecl: \_prop_formal_decl: (w) |vpiParent: - \_property_decl: (work@m.p_multiclock) + \_property_decl: (work@m.p_multiclock), line:12:12, endln:12:24 |vpiName:w |vpiTypespec: \_ref_typespec: (work@m.p_multiclock.w) @@ -1456,7 +1456,7 @@ design: (work@m) |vpiPropFormalDecl: \_prop_formal_decl: (x) |vpiParent: - \_property_decl: (work@m.p_multiclock) + \_property_decl: (work@m.p_multiclock), line:12:12, endln:12:24 |vpiName:x |vpiTypespec: \_ref_typespec: (work@m.p_multiclock.x) @@ -1466,7 +1466,7 @@ design: (work@m) |vpiPropFormalDecl: \_prop_formal_decl: (y) |vpiParent: - \_property_decl: (work@m.p_multiclock) + \_property_decl: (work@m.p_multiclock), line:12:12, endln:12:24 |vpiName:y |vpiTypespec: \_ref_typespec: (work@m.p_multiclock.y) @@ -1476,7 +1476,7 @@ design: (work@m) |vpiPropFormalDecl: \_prop_formal_decl: (z) |vpiParent: - \_property_decl: (work@m.p_multiclock) + \_property_decl: (work@m.p_multiclock), line:12:12, endln:12:24 |vpiName:z |vpiTypespec: \_ref_typespec: (work@m.p_multiclock.z) @@ -1486,7 +1486,7 @@ design: (work@m) |vpiPropertySpec: \_property_spec: , line:13:5, endln:13:42 |vpiParent: - \_property_decl: (work@m.p_multiclock) + \_property_decl: (work@m.p_multiclock), line:12:12, endln:12:24 |vpiClockingEvent: \_ref_obj: (work@m.p_multiclock.clkw), line:13:5, endln:13:10 |vpiParent: @@ -2157,10 +2157,29 @@ design: (work@m) ============================== Begin Linting Results ============================== [LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:9:5: Non synthesizable construct, -[LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:1:1: Non synthesizable construct, work@m +[LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:7:12: Non synthesizable construct, p_triggers [LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:13:17: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:13:29: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:13:5: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:12:12: Non synthesizable construct, p_multiclock [LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:16:24: Non synthesizable construct, p_triggers +[LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:16:24: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:18:24: Non synthesizable construct, p_triggers +[LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:18:24: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:28:23: Non synthesizable construct, p_multiclock +[LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:28:23: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:4:3: Non synthesizable construct, unnamed_clocking_block +[LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:22:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:24:28: Non synthesizable construct, p_triggers +[LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:24:28: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:7:12: Non synthesizable construct, p_triggers +[LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:12:12: Non synthesizable construct, p_multiclock +[LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:16:24: Non synthesizable construct, p_triggers +[LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:16:24: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:18:24: Non synthesizable construct, p_triggers +[LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:18:24: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:28:23: Non synthesizable construct, p_multiclock +[LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:28:23: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:4:3: Non synthesizable construct, unnamed_clocking_block [LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:22:7: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/tests/SequenceInst/dut.sv:24:28: Non synthesizable construct, p_triggers diff --git a/third_party/tests/AmiqSimpleTestSuite/AmiqSimpleTestSuite.log b/third_party/tests/AmiqSimpleTestSuite/AmiqSimpleTestSuite.log index 6843f7733c..60a22d02bd 100644 --- a/third_party/tests/AmiqSimpleTestSuite/AmiqSimpleTestSuite.log +++ b/third_party/tests/AmiqSimpleTestSuite/AmiqSimpleTestSuite.log @@ -14159,9 +14159,131 @@ while_stmt 271 [LINT]: ${SURELOG_DIR}/build/bin/1800.2-2017-1.0/src/reg/uvm_reg_map.svh:568:1: Non synthesizable construct, uvm_reg_map::new [LINT]: ${SURELOG_DIR}/build/bin/1800.2-2017-1.0/src/reg/uvm_reg_block.svh:1007:1: Non synthesizable construct, uvm_reg_block::new [LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:113:7: Non synthesizable construct, -[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/apb_top.sv:45:10: Non synthesizable construct, apb_if +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:112:13: Non synthesizable construct, amiq_apb_sel_valid_values_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:126:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:125:13: Non synthesizable construct, amiq_apb_addr_valid_values_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:139:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:138:13: Non synthesizable construct, amiq_apb_write_valid_values_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:152:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:151:13: Non synthesizable construct, amiq_apb_prot_valid_values_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:165:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:164:13: Non synthesizable construct, amiq_apb_enable_valid_values_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:178:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:177:13: Non synthesizable construct, amiq_apb_strb_valid_values_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:191:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:190:13: Non synthesizable construct, amiq_apb_ready_valid_values_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:204:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:203:13: Non synthesizable construct, amiq_apb_slverr_valid_values_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:223:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:222:13: Non synthesizable construct, amiq_apb_sel_post_reset_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:236:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:235:13: Non synthesizable construct, amiq_apb_enable_post_reset_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:249:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:248:13: Non synthesizable construct, amiq_apb_slverr_post_reset_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:268:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:267:13: Non synthesizable construct, amiq_apb_sel_validity_during_transfer_phases_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:280:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:279:13: Non synthesizable construct, amiq_apb_sel_legal_values_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:292:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:291:13: Non synthesizable construct, amiq_apb_sel_stability_during_transfer_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:305:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:304:13: Non synthesizable construct, amiq_apb_sel_minimum_time_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:318:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:317:13: Non synthesizable construct, amiq_apb_enable_fall_towards_sel_fall_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:333:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:332:13: Non synthesizable construct, amiq_apb_addr_stability_during_transfer_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:349:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:348:13: Non synthesizable construct, amiq_apb_write_stability_during_transfer_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:365:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:364:13: Non synthesizable construct, amiq_apb_wdata_stability_during_transfer_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:381:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:380:13: Non synthesizable construct, amiq_apb_prot_stability_during_transfer_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:397:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:396:13: Non synthesizable construct, amiq_apb_enable_assertion_time_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:410:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:409:13: Non synthesizable construct, amiq_apb_enable_stability_during_ready_changes_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:425:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:424:13: Non synthesizable construct, amiq_apb_enable_value_between_transfers_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:438:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:437:13: Non synthesizable construct, amiq_apb_enable_deassertion_time_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:453:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:452:13: Non synthesizable construct, amiq_apb_strb_stability_during_transfer_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:467:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:466:13: Non synthesizable construct, amiq_apb_strb_value_read_transfer_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:482:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:481:13: Non synthesizable construct, amiq_apb_ready_low_maximum_time_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:497:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:496:13: Non synthesizable construct, amiq_apb_rdata_stability_during_transfer_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:514:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:513:13: Non synthesizable construct, amiq_apb_slverr_value_condition_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:527:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:526:13: Non synthesizable construct, amiq_apb_slverr_assertion_time_p +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:117:53: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:122:52: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:130:54: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:135:53: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:143:55: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:148:54: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:156:54: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:161:53: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:169:56: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:174:55: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:182:54: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:187:53: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:195:55: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:200:54: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:208:56: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:213:55: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:227:64: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:232:63: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:240:67: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:245:66: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:253:67: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:258:66: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:271:68: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:276:67: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:283:60: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:288:59: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:296:74: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:301:73: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:309:59: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:314:58: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:322:71: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:327:70: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:337:75: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:343:74: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:353:76: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:359:75: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:369:76: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:375:75: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:385:75: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:391:74: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:401:65: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:406:64: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:415:10: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:421:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:429:73: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:434:72: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:442:66: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:447:65: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:457:75: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:463:74: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:471:68: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:476:67: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:486:66: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:491:65: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:502:76: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:508:75: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:518:66: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:523:65: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:531:64: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/amiq_apb_if.sv:536:63: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/an_interface.sv:61:7: Non synthesizable construct, -[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/testbench.sv:39:4: Non synthesizable construct, an_if +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/an_interface.sv:60:13: Non synthesizable construct, an_sva_property +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/an_interface.sv:65:29: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/another_interface.sv:43:7: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/another_interface.sv:42:13: Non synthesizable construct, an_sva_property +[LINT]: ${SURELOG_DIR}/third_party/tests/AmiqSimpleTestSuite/another_interface.sv:47:34: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/UVM/svaunit/sv/svaunit_vpi_interface.sv:222:41: Non synthesizable construct, size [LINT]: ${SURELOG_DIR}/third_party/UVM/svaunit/sv/svaunit_vpi_interface.sv:222:26: Non synthesizable construct, new [LINT]: ${SURELOG_DIR}/third_party/UVM/svaunit/sv/svaunit_vpi_interface.sv:223:35: Non synthesizable construct, size @@ -14239,6 +14361,9 @@ while_stmt 271 [LINT]: ${SURELOG_DIR}/build/bin/1800.2-2017-1.0/src/base/uvm_misc.svh:74:39: Non synthesizable construct, $urandom [LINT]: ${SURELOG_DIR}/build/bin/1800.2-2017-1.0/src/base/uvm_misc.svh:74:39: Non synthesizable construct, $urandom [LINT]: ${SURELOG_DIR}/build/bin/1800.2-2017-1.0/src/base/uvm_misc.svh:74:39: Non synthesizable construct, $urandom +[LINT]: ${SURELOG_DIR}/build/bin/1800.2-2017-1.0/src/base/uvm_misc.svh:74:39: Non synthesizable construct, $urandom +[LINT]: ${SURELOG_DIR}/build/bin/1800.2-2017-1.0/src/base/uvm_misc.svh:74:39: Non synthesizable construct, $urandom +[LINT]: ${SURELOG_DIR}/build/bin/1800.2-2017-1.0/src/base/uvm_misc.svh:74:39: Non synthesizable construct, $urandom [LINT]: ${SURELOG_DIR}/build/bin/1800.2-2017-1.0/src/comps/uvm_agent.svh:67:6: Unsupported typespec, uvm_resource_types::rsrc_q_t [LINT]: ${SURELOG_DIR}/build/bin/1800.2-2017-1.0/src/macros/uvm_resource_defines.svh:123:6: Unsupported typespec, __tmp_int_t__ [LINT]: ${SURELOG_DIR}/build/bin/1800.2-2017-1.0/src/base/uvm_traversal.svh:168:13: Unsupported typespec, c diff --git a/third_party/tests/CoresSweRVMP/CoresSweRVMP.log b/third_party/tests/CoresSweRVMP/CoresSweRVMP.log index 15671d64ce..eda059b720 100644 --- a/third_party/tests/CoresSweRVMP/CoresSweRVMP.log +++ b/third_party/tests/CoresSweRVMP/CoresSweRVMP.log @@ -64,18 +64,18 @@ Running: cd ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_preprocess; -- Configuring done -- Generating done -- Build files have been written to: ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_preprocess -[ 6%] Generating 10_lsu_bus_intf.sv -[ 12%] Generating 12_beh_lib.sv -[ 18%] Generating 11_ifu_bp_ctl.sv +[ 6%] Generating 11_ifu_bp_ctl.sv +[ 12%] Generating 10_lsu_bus_intf.sv +[ 18%] Generating 12_beh_lib.sv [ 25%] Generating 13_ifu_mem_ctl.sv [ 31%] Generating 14_mem_lib.sv [ 37%] Generating 15_exu.sv [ 43%] Generating 16_dec_decode_ctl.sv [ 50%] Generating 1_lsu_stbuf.sv [ 56%] Generating 2_ahb_to_axi4.sv -[ 62%] Generating 3_rvjtag_tap.sv -[ 68%] Generating 4_dec_tlu_ctl.sv -[ 75%] Generating 5_lsu_bus_buffer.sv +[ 62%] Generating 4_dec_tlu_ctl.sv +[ 68%] Generating 5_lsu_bus_buffer.sv +[ 75%] Generating 3_rvjtag_tap.sv [ 81%] Generating 6_dbg.sv [ 87%] Generating 7_axi4_to_ahb.sv [ 93%] Generating 8_ifu_aln_ctl.sv diff --git a/third_party/tests/IncompTitan/IncompTitan.log b/third_party/tests/IncompTitan/IncompTitan.log index c691db0384..79f7f48a05 100644 --- a/third_party/tests/IncompTitan/IncompTitan.log +++ b/third_party/tests/IncompTitan/IncompTitan.log @@ -5489,7 +5489,20 @@ var_select 882 [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:32: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:49:31: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_ip_hmac_0.1/rtl/hmac.sv:515:5: Non synthesizable construct, -[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_systems_top_earlgrey_0.1/rtl/autogen/top_earlgrey.sv:1273:3: Non synthesizable construct, u_hmac +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_ip_hmac_0.1/rtl/hmac.sv:514:12: Non synthesizable construct, wmask_bytealign_p +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:38: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:44: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:48: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:48: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:40: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:41: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:29: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:29: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:31: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:32: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:49:31: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:40: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:34: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:34: Non synthesizable construct, @@ -5652,13 +5665,56 @@ var_select 882 [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:42: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:43: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:35: Non synthesizable construct, -[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:10:1: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:92:12: Non synthesizable construct, h2d_pre_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:97:12: Non synthesizable construct, legalAOpcode_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:104:12: Non synthesizable construct, legalAParam_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:114:60: Non synthesizable construct, $countones +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:113:12: Non synthesizable construct, sizeGTEMask_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:120:28: Non synthesizable construct, $countones +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:118:12: Non synthesizable construct, sizeMatchesMask_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:124:12: Non synthesizable construct, pendingReqPerSrc_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:129:12: Non synthesizable construct, addrSizeAligned_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:137:12: Non synthesizable construct, contigMask_pre_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:142:5: Non synthesizable construct, $countones +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:141:12: Non synthesizable construct, contigMask_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:146:12: Non synthesizable construct, aDataKnown_pre_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:152:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:153:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:154:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:155:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:156:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:157:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:158:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:159:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:150:12: Non synthesizable construct, aDataKnown_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:166:12: Non synthesizable construct, d2h_pre_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:171:12: Non synthesizable construct, respOpcode_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:176:12: Non synthesizable construct, legalDParam_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:181:12: Non synthesizable construct, respSzEqReqSz_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:186:12: Non synthesizable construct, respMustHaveReq_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:191:12: Non synthesizable construct, dDataKnown_pre_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:197:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:198:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:199:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:200:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:201:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:202:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:203:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:204:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:195:12: Non synthesizable construct, dDataKnown_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:289:12: Non synthesizable construct, b2bReq_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:294:12: Non synthesizable construct, b2bRsp_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:300:12: Non synthesizable construct, b2bReqWithSameAddr_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:307:12: Non synthesizable construct, aValidNotAccepted_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:312:12: Non synthesizable construct, dValidNotAccepted_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:317:12: Non synthesizable construct, b2bSameSource_S [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:41: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:30: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:41: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:30: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:35: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:23:3: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:34: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:35: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:31: Non synthesizable construct, @@ -6020,7 +6076,22 @@ var_select 882 [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:23:3: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:23:3: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:23:3: Non synthesizable construct, -[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:46:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:325:14: Non synthesizable construct, a_addressChangedNotAccepted_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:325:14: Non synthesizable construct, a_dataChangedNotAccepted_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:325:14: Non synthesizable construct, a_opcodeChangedNotAccepted_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:325:14: Non synthesizable construct, a_sizeChangedNotAccepted_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:325:14: Non synthesizable construct, a_sourceChangedNotAccepted_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:325:14: Non synthesizable construct, a_maskChangedNotAccepted_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:46:29: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:46:41: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:46:40: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:46:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:46:50: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:46:47: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:46:49: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:46:47: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:46:49: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:46:47: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:49:36: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:49:35: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:49:35: Non synthesizable construct, @@ -6290,7 +6361,22 @@ var_select 882 [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:23:3: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:23:3: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:23:3: Non synthesizable construct, -[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:46:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:325:14: Non synthesizable construct, a_addressChangedNotAccepted_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:325:14: Non synthesizable construct, a_dataChangedNotAccepted_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:325:14: Non synthesizable construct, a_opcodeChangedNotAccepted_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:325:14: Non synthesizable construct, a_sizeChangedNotAccepted_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:325:14: Non synthesizable construct, a_sourceChangedNotAccepted_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:325:14: Non synthesizable construct, a_maskChangedNotAccepted_S +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:46:29: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:46:41: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:46:40: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:46:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:46:50: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:46:47: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:46:49: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:46:47: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:46:49: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:46:47: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:32: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:49:49: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:39: Non synthesizable construct, @@ -6300,9 +6386,13 @@ var_select 882 [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:43: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:35: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_ip_hmac_0.1/rtl/hmac.sv:520:22: Non synthesizable construct, wmask_bytealign_p +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_ip_hmac_0.1/rtl/hmac.sv:520:22: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_ip_hmac_0.1/rtl/hmac.sv:520:22: Non synthesizable construct, wmask_bytealign_p +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_ip_hmac_0.1/rtl/hmac.sv:520:22: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_ip_hmac_0.1/rtl/hmac.sv:520:22: Non synthesizable construct, wmask_bytealign_p +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_ip_hmac_0.1/rtl/hmac.sv:520:22: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_ip_hmac_0.1/rtl/hmac.sv:520:22: Non synthesizable construct, wmask_bytealign_p +[LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_ip_hmac_0.1/rtl/hmac.sv:520:22: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:33: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:33: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/IncompTitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert_standard_macros.svh:31:33: Non synthesizable construct, diff --git a/third_party/tests/Opentitan/Opentitan.log b/third_party/tests/Opentitan/Opentitan.log index 8a930b97ca..6237eab598 100644 --- a/third_party/tests/Opentitan/Opentitan.log +++ b/third_party/tests/Opentitan/Opentitan.log @@ -7723,7 +7723,33 @@ while_stmt 353 [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:32: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:137:31: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/hmac/rtl/hmac.sv:498:7: Non synthesizable construct, -[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv:535:3: Non synthesizable construct, hmac +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/hmac/rtl/hmac.sv:497:14: Non synthesizable construct, wmask_bytealign_p +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:38: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:42: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:44: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:48: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:48: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:40: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:40: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:137:42: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:137:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:137:47: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:137:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:137:46: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:43: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:47: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:53: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:46: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:43: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:49: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:29: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:29: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:31: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:32: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:137:31: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:40: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:34: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:34: Non synthesizable construct, @@ -7789,6 +7815,8 @@ while_stmt 353 [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:40: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:39: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:39: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:31: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:39: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:39: Non synthesizable construct, @@ -7881,13 +7909,50 @@ while_stmt 353 [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:32: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:137:31: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, -[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:8:1: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:93:12: Non synthesizable construct, h2d_pre_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:98:12: Non synthesizable construct, legalAOpcode_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:105:12: Non synthesizable construct, legalAParam_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:115:60: Non synthesizable construct, $countones +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:114:12: Non synthesizable construct, sizeGTEMask_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:121:28: Non synthesizable construct, $countones +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:119:12: Non synthesizable construct, sizeMatchesMask_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:125:12: Non synthesizable construct, pendingReqPerSrc_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:130:12: Non synthesizable construct, addrSizeAligned_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:138:12: Non synthesizable construct, contigMask_pre_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:143:5: Non synthesizable construct, $countones +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:142:12: Non synthesizable construct, contigMask_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:147:12: Non synthesizable construct, aDataKnown_pre_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:153:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:154:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:155:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:156:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:157:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:158:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:159:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:160:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:151:12: Non synthesizable construct, aDataKnown_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:167:12: Non synthesizable construct, d2h_pre_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:172:12: Non synthesizable construct, respOpcode_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:177:12: Non synthesizable construct, legalDParam_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:182:12: Non synthesizable construct, respSzEqReqSz_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:187:12: Non synthesizable construct, respMustHaveReq_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:192:12: Non synthesizable construct, dDataKnown_pre_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:198:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:199:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:200:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:201:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:202:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:203:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:204:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:205:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:196:12: Non synthesizable construct, dDataKnown_S [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:40: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:88:39: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:40: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:88:39: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:35: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:34: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:35: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:31: Non synthesizable construct, @@ -7910,8 +7975,630 @@ while_stmt 353 [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:31: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:32: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:137:31: Non synthesizable construct, -[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert_multiple.sv:21:5: Non synthesizable construct, tlul_assert -[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert_multiple.sv:21:5: Non synthesizable construct, tlul_assert +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:93:12: Non synthesizable construct, h2d_pre_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:98:12: Non synthesizable construct, legalAOpcode_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:105:12: Non synthesizable construct, legalAParam_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:115:60: Non synthesizable construct, $countones +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:114:12: Non synthesizable construct, sizeGTEMask_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:121:28: Non synthesizable construct, $countones +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:119:12: Non synthesizable construct, sizeMatchesMask_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:125:12: Non synthesizable construct, pendingReqPerSrc_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:130:12: Non synthesizable construct, addrSizeAligned_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:138:12: Non synthesizable construct, contigMask_pre_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:143:5: Non synthesizable construct, $countones +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:142:12: Non synthesizable construct, contigMask_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:147:12: Non synthesizable construct, aDataKnown_pre_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:153:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:154:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:155:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:156:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:157:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:158:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:159:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:160:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:151:12: Non synthesizable construct, aDataKnown_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:167:12: Non synthesizable construct, d2h_pre_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:172:12: Non synthesizable construct, respOpcode_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:177:12: Non synthesizable construct, legalDParam_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:182:12: Non synthesizable construct, respSzEqReqSz_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:187:12: Non synthesizable construct, respMustHaveReq_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:192:12: Non synthesizable construct, dDataKnown_pre_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:198:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:199:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:200:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:201:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:202:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:203:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:204:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:205:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:196:12: Non synthesizable construct, dDataKnown_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:40: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:88:39: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:40: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:88:39: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:137:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:137:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:137:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:137:39: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:137:40: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:137:39: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:137:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:137:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:37: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:39: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:93:12: Non synthesizable construct, h2d_pre_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:98:12: Non synthesizable construct, legalAOpcode_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:105:12: Non synthesizable construct, legalAParam_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:115:60: Non synthesizable construct, $countones +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:114:12: Non synthesizable construct, sizeGTEMask_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:121:28: Non synthesizable construct, $countones +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:119:12: Non synthesizable construct, sizeMatchesMask_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:125:12: Non synthesizable construct, pendingReqPerSrc_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:130:12: Non synthesizable construct, addrSizeAligned_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:138:12: Non synthesizable construct, contigMask_pre_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:143:5: Non synthesizable construct, $countones +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:142:12: Non synthesizable construct, contigMask_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:147:12: Non synthesizable construct, aDataKnown_pre_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:153:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:154:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:155:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:156:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:157:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:158:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:159:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:160:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:151:12: Non synthesizable construct, aDataKnown_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:167:12: Non synthesizable construct, d2h_pre_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:172:12: Non synthesizable construct, respOpcode_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:177:12: Non synthesizable construct, legalDParam_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:182:12: Non synthesizable construct, respSzEqReqSz_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:187:12: Non synthesizable construct, respMustHaveReq_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:192:12: Non synthesizable construct, dDataKnown_pre_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:198:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:199:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:200:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:201:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:202:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:203:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:204:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:205:37: Non synthesizable construct, $isunknown +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/tlul/rtl/tlul_assert.sv:196:12: Non synthesizable construct, dDataKnown_S +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:40: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:88:39: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:40: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:88:39: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:137:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:137:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:137:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:137:39: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:137:40: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:137:39: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:137:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:137:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:37: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:39: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:68:3: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:44: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:47: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:34: Non synthesizable construct, @@ -8355,6 +9042,120 @@ while_stmt 353 [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:34: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:36: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:42: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/hmac/rtl/hmac.sv:497:14: Non synthesizable construct, wmask_bytealign_p +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:38: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:42: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:44: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:48: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:48: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:40: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:40: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:33: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:51: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:44: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:47: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:37: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:37: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:33: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:51: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:33: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:51: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:137:42: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:137:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:137:47: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:137:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:137:46: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:43: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:47: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:53: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:46: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:43: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:49: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:29: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:29: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:31: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:32: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:137:31: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:33: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:33: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:33: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:33: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:33: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:33: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:31: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:40: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:40: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:39: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:39: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:33: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:33: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:40: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:40: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:39: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:39: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:33: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:33: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:35: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:34: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:33: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:36: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/prim/rtl/prim_assert.sv:77:30: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/hmac/rtl/hmac.sv:503:24: Non synthesizable construct, wmask_bytealign_p +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/hmac/rtl/hmac.sv:503:24: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/hmac/rtl/hmac.sv:503:24: Non synthesizable construct, wmask_bytealign_p +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/hmac/rtl/hmac.sv:503:24: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/hmac/rtl/hmac.sv:503:24: Non synthesizable construct, wmask_bytealign_p +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/hmac/rtl/hmac.sv:503:24: Non synthesizable construct, +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/hmac/rtl/hmac.sv:503:24: Non synthesizable construct, wmask_bytealign_p +[LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/ip/hmac/rtl/hmac.sv:503:24: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:34: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:37: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Opentitan/hw/vendor/lowrisc_ibex/shared/rtl/prim_assert.sv:77:38: Non synthesizable construct,