diff --git a/src/DesignCompile/CompileExpression.cpp b/src/DesignCompile/CompileExpression.cpp index 30b929d882..4bf62897df 100644 --- a/src/DesignCompile/CompileExpression.cpp +++ b/src/DesignCompile/CompileExpression.cpp @@ -1269,6 +1269,7 @@ UHDM::any *CompileHelper::compileSelectExpression( ref_obj *r2 = s.MakeRef_obj(); r2->VpiName(fC->SymName(Bit_select)); r2->VpiFullName(fC->SymName(Bit_select)); + r2->VpiParent(path); elems->push_back(r2); hname.append(".").append(fC->SymName(Bit_select)); } @@ -1797,6 +1798,7 @@ UHDM::any *CompileHelper::compileExpression( NodeId Identifier = fC->Sibling(child); ref_obj *ref = s.MakeRef_obj(); ref->VpiName(fC->SymName(Identifier)); + ref->VpiParent(pexpr); fC->populateCoreMembers(Identifier, Identifier, ref); result = ref; break; @@ -2927,6 +2929,7 @@ UHDM::any *CompileHelper::compileExpression( "::", fC->SymName(Class_scope_name)); ref_obj *ref = s.MakeRef_obj(); ref->VpiName(name); + ref->VpiParent(pexpr); fC->populateCoreMembers(child, child, ref); result = ref; break; @@ -3686,6 +3689,7 @@ UHDM::any *CompileHelper::compilePartSelectRange( UHDM::ref_obj *ref = s.MakeRef_obj(); ref->VpiName(name); ref->VpiDefName(name); + ref->VpiParent(pexpr); part_select->VpiParent(ref); } part_select->VpiConstantSelect(true); @@ -3795,6 +3799,7 @@ UHDM::any *CompileHelper::compilePartSelectRange( UHDM::ref_obj *ref = s.MakeRef_obj(); ref->VpiName(name); ref->VpiDefName(name); + ref->VpiParent(pexpr); part_select->VpiParent(ref); } part_select->VpiConstantSelect(true); @@ -4547,11 +4552,13 @@ UHDM::any *CompileHelper::compileComplexFuncCall( elems->push_back(ref); ref->VpiName("$root"); ref->VpiFullName("$root"); + ref->VpiParent(path); std::string name = StrCat("$root.", fC->SymName(nameId)); ref = s.MakeRef_obj(); elems->push_back(ref); ref->VpiName(fC->SymName(nameId)); ref->VpiFullName(fC->SymName(nameId)); + ref->VpiParent(path); nameId = fC->Sibling(nameId); while (nameId) { if (fC->Type(nameId) == VObjectType::slStringConst) { @@ -4560,6 +4567,7 @@ UHDM::any *CompileHelper::compileComplexFuncCall( elems->push_back(ref); ref->VpiName(fC->SymName(nameId)); ref->VpiFullName(fC->SymName(nameId)); + ref->VpiParent(path); } else if (fC->Type(nameId) == VObjectType::slConstant_expression) { NodeId Constant_expresion = fC->Child(nameId); if (Constant_expresion) { @@ -4670,6 +4678,7 @@ UHDM::any *CompileHelper::compileComplexFuncCall( nameId = fC->Child(Method); } r->VpiName(fC->SymName(nameId)); + r->VpiParent(path); fullName.append(".").append(fC->SymName(nameId)); elems->push_back(r); Method = fC->Sibling(Method); @@ -4992,6 +5001,7 @@ UHDM::any *CompileHelper::compileComplexFuncCall( bit_select *select = s.MakeBit_select(); elems->push_back(select); ref_obj *ref = s.MakeRef_obj(); + ref->VpiName(tmpName); ref->VpiParent(path); if (!tmpName.empty()) select->VpiParent(ref); select->VpiIndex(index); @@ -5007,6 +5017,7 @@ UHDM::any *CompileHelper::compileComplexFuncCall( elems->push_back(ref); ref->VpiName(tmpName); ref->VpiFullName(tmpName); + ref->VpiParent(path); fC->populateCoreMembers(name, name, ref); } tmpName.clear(); @@ -5223,6 +5234,7 @@ UHDM::any *CompileHelper::compileComplexFuncCall( ref_obj *ref = s.MakeRef_obj(); ref->VpiName(the_name); ref->VpiFullName(the_name); + ref->VpiParent(pexpr); result = ref; } return result; diff --git a/src/DesignCompile/CompileHelper.cpp b/src/DesignCompile/CompileHelper.cpp index d28819bab8..3ed73c26f5 100644 --- a/src/DesignCompile/CompileHelper.cpp +++ b/src/DesignCompile/CompileHelper.cpp @@ -2726,11 +2726,12 @@ UHDM::atomic_stmt* CompileHelper::compileProceduralTimingControlStmt( NodeId IntConst = fC->Child(Delay_control); const std::string_view value = fC->SymName(IntConst); UHDM::delay_control* dc = s.MakeDelay_control(); - if (value[0] == '#') + if (value[0] == '#') { dc->VpiDelay(value); - else { + } else { ref_obj* ref = s.MakeRef_obj(); ref->VpiName(value); + ref->VpiParent(pstmt); dc->Delay(ref); } fC->populateCoreMembers(Delay_control, Delay_control, dc); @@ -3705,6 +3706,7 @@ UHDM::any* CompileHelper::compileTfCall(DesignComponent* component, fcall->VpiName(mname); ref_obj* prefix = s.MakeRef_obj(); prefix->VpiName(name); + prefix->VpiParent(fcall); fC->populateCoreMembers(dollar_or_string, dollar_or_string, prefix); fcall->Prefix(prefix); call = fcall; diff --git a/src/DesignCompile/CompileType.cpp b/src/DesignCompile/CompileType.cpp index 7f0286e691..9ae07df05a 100644 --- a/src/DesignCompile/CompileType.cpp +++ b/src/DesignCompile/CompileType.cpp @@ -238,6 +238,7 @@ UHDM::any* CompileHelper::compileVariable( std::string fullName(fC->SymName(variable)); ref_obj* obj = s.MakeRef_obj(); obj->VpiName(fullName); + obj->VpiParent(path); elems->push_back(obj); while (fC->Type(Packed_dimension) == VObjectType::slStringConst) { ref_obj* obj = s.MakeRef_obj(); @@ -1551,6 +1552,7 @@ UHDM::typespec* CompileHelper::compileTypespec( path->Path_elems(s.MakeAnyVec()); ref_obj* ref = s.MakeRef_obj(); ref->VpiName(typeName); + ref->VpiParent(path); path->Path_elems()->push_back(ref); } if (path) { diff --git a/tests/ArianeElab/ArianeElab.log b/tests/ArianeElab/ArianeElab.log index 1487c7cb0e..219e441606 100644 --- a/tests/ArianeElab/ArianeElab.log +++ b/tests/ArianeElab/ArianeElab.log @@ -93485,6 +93485,8 @@ design: (work@top) \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: \_ref_obj: (RASDepth), line:734:20, endln:734:28 + |vpiParent: + \_hier_path: (Cfg.RASDepth), line:734:16, endln:734:28 |vpiName:RASDepth |vpiOperand: \_constant: , line:734:31, endln:734:32 @@ -93522,6 +93524,8 @@ design: (work@top) \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: \_ref_obj: (BTBEntries), line:735:30, endln:735:40 + |vpiParent: + \_hier_path: (Cfg.BTBEntries), line:735:26, endln:735:40 |vpiName:BTBEntries |vpiName:$clog2 |vpiOperand: @@ -93538,6 +93542,8 @@ design: (work@top) \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: \_ref_obj: (BTBEntries), line:735:50, endln:735:60 + |vpiParent: + \_hier_path: (Cfg.BTBEntries), line:735:46, endln:735:60 |vpiName:BTBEntries |vpiStmt: \_immediate_assert: , line:736:9, endln:736:62 @@ -93573,6 +93579,8 @@ design: (work@top) \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: \_ref_obj: (BHTEntries), line:736:30, endln:736:40 + |vpiParent: + \_hier_path: (Cfg.BHTEntries), line:736:26, endln:736:40 |vpiName:BHTEntries |vpiName:$clog2 |vpiOperand: @@ -93589,6 +93597,8 @@ design: (work@top) \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: \_ref_obj: (BHTEntries), line:736:50, endln:736:60 + |vpiParent: + \_hier_path: (Cfg.BHTEntries), line:736:46, endln:736:60 |vpiName:BHTEntries |vpiStmt: \_immediate_assert: , line:737:9, endln:737:56 @@ -93613,6 +93623,8 @@ design: (work@top) \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: \_ref_obj: (NrNonIdempotentRules), line:737:20, endln:737:40 + |vpiParent: + \_hier_path: (Cfg.NrNonIdempotentRules), line:737:16, endln:737:40 |vpiName:NrNonIdempotentRules |vpiOperand: \_ref_obj: (ariane_pkg::check_cfg::NrMaxRules), line:737:44, endln:737:54 @@ -93645,6 +93657,8 @@ design: (work@top) \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: \_ref_obj: (NrExecuteRegionRules), line:738:20, endln:738:40 + |vpiParent: + \_hier_path: (Cfg.NrExecuteRegionRules), line:738:16, endln:738:40 |vpiName:NrExecuteRegionRules |vpiOperand: \_ref_obj: (ariane_pkg::check_cfg::NrMaxRules), line:738:44, endln:738:54 @@ -93677,6 +93691,8 @@ design: (work@top) \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: \_ref_obj: (NrCachedRegionRules), line:739:20, endln:739:39 + |vpiParent: + \_hier_path: (Cfg.NrCachedRegionRules), line:739:16, endln:739:39 |vpiName:NrCachedRegionRules |vpiOperand: \_ref_obj: (ariane_pkg::check_cfg::NrMaxRules), line:739:44, endln:739:54 @@ -93709,6 +93725,8 @@ design: (work@top) \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: \_ref_obj: (NrPMPEntries), line:740:20, endln:740:32 + |vpiParent: + \_hier_path: (Cfg.NrPMPEntries), line:740:16, endln:740:32 |vpiName:NrPMPEntries |vpiOperand: \_constant: , line:740:36, endln:740:38 @@ -93924,6 +93942,8 @@ design: (work@top) \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: \_ref_obj: (NrNonIdempotentRules), line:753:40, endln:753:60 + |vpiParent: + \_hier_path: (Cfg.NrNonIdempotentRules), line:753:36, endln:753:60 |vpiName:NrNonIdempotentRules |vpiStmt: \_begin: (ariane_pkg::is_inside_nonidempotent_regions), line:753:67, endln:755:10 @@ -94160,6 +94180,8 @@ design: (work@top) \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: \_ref_obj: (NrExecuteRegionRules), line:763:40, endln:763:60 + |vpiParent: + \_hier_path: (Cfg.NrExecuteRegionRules), line:763:36, endln:763:60 |vpiName:NrExecuteRegionRules |vpiStmt: \_begin: (ariane_pkg::is_inside_execute_regions), line:763:67, endln:765:10 @@ -94396,6 +94418,8 @@ design: (work@top) \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: \_ref_obj: (NrCachedRegionRules), line:772:40, endln:772:59 + |vpiParent: + \_hier_path: (Cfg.NrCachedRegionRules), line:772:36, endln:772:59 |vpiName:NrCachedRegionRules |vpiStmt: \_begin: (ariane_pkg::is_inside_cacheable_regions), line:772:66, endln:774:10 @@ -95843,8 +95867,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1401:50, endln:1401:71 |vpiParent: - \_ref_obj: data (data), line:1401:50, endln:1401:54 + \_ref_obj: data (ariane_pkg::data_align::data), line:1401:50, endln:1401:54 + |vpiParent: + \_case_item: , line:1401:13, endln:1401:73 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -95899,8 +95926,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1402:50, endln:1402:71 |vpiParent: - \_ref_obj: data (data), line:1402:50, endln:1402:54 + \_ref_obj: data (ariane_pkg::data_align::data), line:1402:50, endln:1402:54 + |vpiParent: + \_case_item: , line:1402:13, endln:1402:109 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -95917,8 +95947,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1402:74, endln:1402:107 |vpiParent: - \_ref_obj: data (data), line:1402:74, endln:1402:78 + \_ref_obj: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:78 + |vpiParent: + \_case_item: , line:1402:13, endln:1402:109 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -95980,8 +96013,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1403:50, endln:1403:72 |vpiParent: - \_ref_obj: data (data), line:1403:50, endln:1403:54 + \_ref_obj: data (ariane_pkg::data_align::data), line:1403:50, endln:1403:54 + |vpiParent: + \_case_item: , line:1403:13, endln:1403:110 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -95998,8 +96034,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1403:74, endln:1403:108 |vpiParent: - \_ref_obj: data (data), line:1403:74, endln:1403:78 + \_ref_obj: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:78 + |vpiParent: + \_case_item: , line:1403:13, endln:1403:110 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96061,8 +96100,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1404:50, endln:1404:72 |vpiParent: - \_ref_obj: data (data), line:1404:50, endln:1404:54 + \_ref_obj: data (ariane_pkg::data_align::data), line:1404:50, endln:1404:54 + |vpiParent: + \_case_item: , line:1404:13, endln:1404:110 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96079,8 +96121,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1404:74, endln:1404:108 |vpiParent: - \_ref_obj: data (data), line:1404:74, endln:1404:78 + \_ref_obj: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:78 + |vpiParent: + \_case_item: , line:1404:13, endln:1404:110 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96142,8 +96187,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1405:33, endln:1405:43 |vpiParent: - \_ref_obj: data (data), line:1405:33, endln:1405:37 + \_ref_obj: data (ariane_pkg::data_align::data), line:1405:33, endln:1405:37 + |vpiParent: + \_case_item: , line:1405:13, endln:1405:58 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96153,8 +96201,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1405:45, endln:1405:56 |vpiParent: - \_ref_obj: data (data), line:1405:45, endln:1405:49 + \_ref_obj: data (ariane_pkg::data_align::data), line:1405:45, endln:1405:49 + |vpiParent: + \_case_item: , line:1405:13, endln:1405:58 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96189,8 +96240,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1406:33, endln:1406:43 |vpiParent: - \_ref_obj: data (data), line:1406:33, endln:1406:37 + \_ref_obj: data (ariane_pkg::data_align::data), line:1406:33, endln:1406:37 + |vpiParent: + \_case_item: , line:1406:13, endln:1406:58 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96200,8 +96254,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1406:45, endln:1406:56 |vpiParent: - \_ref_obj: data (data), line:1406:45, endln:1406:49 + \_ref_obj: data (ariane_pkg::data_align::data), line:1406:45, endln:1406:49 + |vpiParent: + \_case_item: , line:1406:13, endln:1406:58 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96236,8 +96293,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1407:33, endln:1407:43 |vpiParent: - \_ref_obj: data (data), line:1407:33, endln:1407:37 + \_ref_obj: data (ariane_pkg::data_align::data), line:1407:33, endln:1407:37 + |vpiParent: + \_case_item: , line:1407:13, endln:1407:58 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96247,8 +96307,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1407:45, endln:1407:56 |vpiParent: - \_ref_obj: data (data), line:1407:45, endln:1407:49 + \_ref_obj: data (ariane_pkg::data_align::data), line:1407:45, endln:1407:49 + |vpiParent: + \_case_item: , line:1407:13, endln:1407:58 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96283,8 +96346,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1408:33, endln:1408:42 |vpiParent: - \_ref_obj: data (data), line:1408:33, endln:1408:37 + \_ref_obj: data (ariane_pkg::data_align::data), line:1408:33, endln:1408:37 + |vpiParent: + \_case_item: , line:1408:13, endln:1408:57 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96294,8 +96360,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1408:45, endln:1408:55 |vpiParent: - \_ref_obj: data (data), line:1408:45, endln:1408:49 + \_ref_obj: data (ariane_pkg::data_align::data), line:1408:45, endln:1408:49 + |vpiParent: + \_case_item: , line:1408:13, endln:1408:57 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -102690,6 +102759,8 @@ design: (work@top) |vpiName:Features |vpiActual: \_ref_obj: (Width) + |vpiParent: + \_hier_path: (Features.Width), line:1964:42, endln:1964:56 |vpiName:Width |vpiLhs: \_parameter: (work@fpnew_top.WIDTH), line:1964:27, endln:1964:32 diff --git a/tests/ArianeElab2/ArianeElab2.log b/tests/ArianeElab2/ArianeElab2.log index 88712b16a7..ecd529d7f8 100644 --- a/tests/ArianeElab2/ArianeElab2.log +++ b/tests/ArianeElab2/ArianeElab2.log @@ -94117,6 +94117,8 @@ design: (work@top) \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: \_ref_obj: (RASDepth), line:734:20, endln:734:28 + |vpiParent: + \_hier_path: (Cfg.RASDepth), line:734:16, endln:734:28 |vpiName:RASDepth |vpiOperand: \_constant: , line:734:31, endln:734:32 @@ -94154,6 +94156,8 @@ design: (work@top) \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: \_ref_obj: (BTBEntries), line:735:30, endln:735:40 + |vpiParent: + \_hier_path: (Cfg.BTBEntries), line:735:26, endln:735:40 |vpiName:BTBEntries |vpiName:$clog2 |vpiOperand: @@ -94170,6 +94174,8 @@ design: (work@top) \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: \_ref_obj: (BTBEntries), line:735:50, endln:735:60 + |vpiParent: + \_hier_path: (Cfg.BTBEntries), line:735:46, endln:735:60 |vpiName:BTBEntries |vpiStmt: \_immediate_assert: , line:736:9, endln:736:62 @@ -94205,6 +94211,8 @@ design: (work@top) \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: \_ref_obj: (BHTEntries), line:736:30, endln:736:40 + |vpiParent: + \_hier_path: (Cfg.BHTEntries), line:736:26, endln:736:40 |vpiName:BHTEntries |vpiName:$clog2 |vpiOperand: @@ -94221,6 +94229,8 @@ design: (work@top) \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: \_ref_obj: (BHTEntries), line:736:50, endln:736:60 + |vpiParent: + \_hier_path: (Cfg.BHTEntries), line:736:46, endln:736:60 |vpiName:BHTEntries |vpiStmt: \_immediate_assert: , line:737:9, endln:737:56 @@ -94245,6 +94255,8 @@ design: (work@top) \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: \_ref_obj: (NrNonIdempotentRules), line:737:20, endln:737:40 + |vpiParent: + \_hier_path: (Cfg.NrNonIdempotentRules), line:737:16, endln:737:40 |vpiName:NrNonIdempotentRules |vpiOperand: \_ref_obj: (ariane_pkg::check_cfg::NrMaxRules), line:737:44, endln:737:54 @@ -94277,6 +94289,8 @@ design: (work@top) \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: \_ref_obj: (NrExecuteRegionRules), line:738:20, endln:738:40 + |vpiParent: + \_hier_path: (Cfg.NrExecuteRegionRules), line:738:16, endln:738:40 |vpiName:NrExecuteRegionRules |vpiOperand: \_ref_obj: (ariane_pkg::check_cfg::NrMaxRules), line:738:44, endln:738:54 @@ -94309,6 +94323,8 @@ design: (work@top) \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: \_ref_obj: (NrCachedRegionRules), line:739:20, endln:739:39 + |vpiParent: + \_hier_path: (Cfg.NrCachedRegionRules), line:739:16, endln:739:39 |vpiName:NrCachedRegionRules |vpiOperand: \_ref_obj: (ariane_pkg::check_cfg::NrMaxRules), line:739:44, endln:739:54 @@ -94341,6 +94357,8 @@ design: (work@top) \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: \_ref_obj: (NrPMPEntries), line:740:20, endln:740:32 + |vpiParent: + \_hier_path: (Cfg.NrPMPEntries), line:740:16, endln:740:32 |vpiName:NrPMPEntries |vpiOperand: \_constant: , line:740:36, endln:740:38 @@ -94556,6 +94574,8 @@ design: (work@top) \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: \_ref_obj: (NrNonIdempotentRules), line:753:40, endln:753:60 + |vpiParent: + \_hier_path: (Cfg.NrNonIdempotentRules), line:753:36, endln:753:60 |vpiName:NrNonIdempotentRules |vpiStmt: \_begin: (ariane_pkg::is_inside_nonidempotent_regions), line:753:67, endln:755:10 @@ -94792,6 +94812,8 @@ design: (work@top) \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: \_ref_obj: (NrExecuteRegionRules), line:763:40, endln:763:60 + |vpiParent: + \_hier_path: (Cfg.NrExecuteRegionRules), line:763:36, endln:763:60 |vpiName:NrExecuteRegionRules |vpiStmt: \_begin: (ariane_pkg::is_inside_execute_regions), line:763:67, endln:765:10 @@ -95028,6 +95050,8 @@ design: (work@top) \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: \_ref_obj: (NrCachedRegionRules), line:772:40, endln:772:59 + |vpiParent: + \_hier_path: (Cfg.NrCachedRegionRules), line:772:36, endln:772:59 |vpiName:NrCachedRegionRules |vpiStmt: \_begin: (ariane_pkg::is_inside_cacheable_regions), line:772:66, endln:774:10 @@ -96475,8 +96499,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1401:50, endln:1401:71 |vpiParent: - \_ref_obj: data (data), line:1401:50, endln:1401:54 + \_ref_obj: data (ariane_pkg::data_align::data), line:1401:50, endln:1401:54 + |vpiParent: + \_case_item: , line:1401:13, endln:1401:73 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96531,8 +96558,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1402:50, endln:1402:71 |vpiParent: - \_ref_obj: data (data), line:1402:50, endln:1402:54 + \_ref_obj: data (ariane_pkg::data_align::data), line:1402:50, endln:1402:54 + |vpiParent: + \_case_item: , line:1402:13, endln:1402:109 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96549,8 +96579,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1402:74, endln:1402:107 |vpiParent: - \_ref_obj: data (data), line:1402:74, endln:1402:78 + \_ref_obj: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:78 + |vpiParent: + \_case_item: , line:1402:13, endln:1402:109 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96612,8 +96645,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1403:50, endln:1403:72 |vpiParent: - \_ref_obj: data (data), line:1403:50, endln:1403:54 + \_ref_obj: data (ariane_pkg::data_align::data), line:1403:50, endln:1403:54 + |vpiParent: + \_case_item: , line:1403:13, endln:1403:110 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96630,8 +96666,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1403:74, endln:1403:108 |vpiParent: - \_ref_obj: data (data), line:1403:74, endln:1403:78 + \_ref_obj: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:78 + |vpiParent: + \_case_item: , line:1403:13, endln:1403:110 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96693,8 +96732,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1404:50, endln:1404:72 |vpiParent: - \_ref_obj: data (data), line:1404:50, endln:1404:54 + \_ref_obj: data (ariane_pkg::data_align::data), line:1404:50, endln:1404:54 + |vpiParent: + \_case_item: , line:1404:13, endln:1404:110 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96711,8 +96753,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1404:74, endln:1404:108 |vpiParent: - \_ref_obj: data (data), line:1404:74, endln:1404:78 + \_ref_obj: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:78 + |vpiParent: + \_case_item: , line:1404:13, endln:1404:110 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96774,8 +96819,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1405:33, endln:1405:43 |vpiParent: - \_ref_obj: data (data), line:1405:33, endln:1405:37 + \_ref_obj: data (ariane_pkg::data_align::data), line:1405:33, endln:1405:37 + |vpiParent: + \_case_item: , line:1405:13, endln:1405:58 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96785,8 +96833,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1405:45, endln:1405:56 |vpiParent: - \_ref_obj: data (data), line:1405:45, endln:1405:49 + \_ref_obj: data (ariane_pkg::data_align::data), line:1405:45, endln:1405:49 + |vpiParent: + \_case_item: , line:1405:13, endln:1405:58 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96821,8 +96872,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1406:33, endln:1406:43 |vpiParent: - \_ref_obj: data (data), line:1406:33, endln:1406:37 + \_ref_obj: data (ariane_pkg::data_align::data), line:1406:33, endln:1406:37 + |vpiParent: + \_case_item: , line:1406:13, endln:1406:58 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96832,8 +96886,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1406:45, endln:1406:56 |vpiParent: - \_ref_obj: data (data), line:1406:45, endln:1406:49 + \_ref_obj: data (ariane_pkg::data_align::data), line:1406:45, endln:1406:49 + |vpiParent: + \_case_item: , line:1406:13, endln:1406:58 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96868,8 +96925,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1407:33, endln:1407:43 |vpiParent: - \_ref_obj: data (data), line:1407:33, endln:1407:37 + \_ref_obj: data (ariane_pkg::data_align::data), line:1407:33, endln:1407:37 + |vpiParent: + \_case_item: , line:1407:13, endln:1407:58 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96879,8 +96939,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1407:45, endln:1407:56 |vpiParent: - \_ref_obj: data (data), line:1407:45, endln:1407:49 + \_ref_obj: data (ariane_pkg::data_align::data), line:1407:45, endln:1407:49 + |vpiParent: + \_case_item: , line:1407:13, endln:1407:58 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96915,8 +96978,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1408:33, endln:1408:42 |vpiParent: - \_ref_obj: data (data), line:1408:33, endln:1408:37 + \_ref_obj: data (ariane_pkg::data_align::data), line:1408:33, endln:1408:37 + |vpiParent: + \_case_item: , line:1408:13, endln:1408:57 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -96926,8 +96992,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:1408:45, endln:1408:55 |vpiParent: - \_ref_obj: data (data), line:1408:45, endln:1408:49 + \_ref_obj: data (ariane_pkg::data_align::data), line:1408:45, endln:1408:49 + |vpiParent: + \_case_item: , line:1408:13, endln:1408:57 |vpiName:data + |vpiFullName:ariane_pkg::data_align::data |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: @@ -103599,6 +103668,8 @@ design: (work@top) |vpiName:Features |vpiActual: \_ref_obj: (Width) + |vpiParent: + \_hier_path: (Features.Width), line:2012:42, endln:2012:56 |vpiName:Width |vpiLhs: \_parameter: (work@fpnew_top.WIDTH), line:2012:27, endln:2012:32 diff --git a/tests/AssumeProp/AssumeProp.log b/tests/AssumeProp/AssumeProp.log index 3643ccf37c..f6ce35736c 100644 --- a/tests/AssumeProp/AssumeProp.log +++ b/tests/AssumeProp/AssumeProp.log @@ -221,6 +221,8 @@ design: (work@dut) |vpiName:slv_req_i |vpiActual: \_ref_obj: (aw_valid), line:4:61, endln:4:69 + |vpiParent: + \_hier_path: (slv_req_i.aw_valid), line:4:51, endln:4:69 |vpiName:aw_valid |vpiOperand: \_operation: , line:5:51, endln:5:79 diff --git a/tests/BitsOp/BitsOp.log b/tests/BitsOp/BitsOp.log index d7bf7e75b0..e4dd09cebc 100644 --- a/tests/BitsOp/BitsOp.log +++ b/tests/BitsOp/BitsOp.log @@ -2434,8 +2434,11 @@ design: (work@dut) |vpiOperand: \_part_select: , line:121:26, endln:121:47 |vpiParent: - \_ref_obj: dr_q (dr_q), line:121:26, endln:121:30 + \_ref_obj: dr_q (work@dmi_jtag.p_shift.dr_q), line:121:26, endln:121:30 + |vpiParent: + \_begin: (work@dmi_jtag.p_shift), line:120:23, endln:122:10 |vpiName:dr_q + |vpiFullName:work@dmi_jtag.p_shift.dr_q |vpiDefName:dr_q |vpiConstantSelect:1 |vpiLeftRange: diff --git a/tests/BlackBox/BlackBox.log b/tests/BlackBox/BlackBox.log index fe806f274e..1cf0b45339 100644 --- a/tests/BlackBox/BlackBox.log +++ b/tests/BlackBox/BlackBox.log @@ -267,6 +267,8 @@ design: (work@top) |vpiName:core |vpiActual: \_ref_obj: (wb_writeback_en), line:31:39, endln:31:54 + |vpiParent: + \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:wb_writeback_en |vpiLhs: \_ref_obj: (work@top.o), line:31:12, endln:31:13 diff --git a/tests/BlackBox/BlackBoxInst.log b/tests/BlackBox/BlackBoxInst.log index 618fb81cfc..dbb099f8f7 100644 --- a/tests/BlackBox/BlackBoxInst.log +++ b/tests/BlackBox/BlackBoxInst.log @@ -265,6 +265,8 @@ design: (work@top) |vpiName:core |vpiActual: \_ref_obj: (wb_writeback_en), line:31:39, endln:31:54 + |vpiParent: + \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:wb_writeback_en |vpiLhs: \_ref_obj: (work@top.o), line:31:12, endln:31:13 diff --git a/tests/BlackBox/BlackBoxSubMod.log b/tests/BlackBox/BlackBoxSubMod.log index 4bc37296e0..f4eb6ba1b8 100644 --- a/tests/BlackBox/BlackBoxSubMod.log +++ b/tests/BlackBox/BlackBoxSubMod.log @@ -257,6 +257,8 @@ design: (work@top) |vpiName:core |vpiActual: \_ref_obj: (wb_writeback_en), line:31:39, endln:31:54 + |vpiParent: + \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:wb_writeback_en |vpiLhs: \_ref_obj: (work@top.o), line:31:12, endln:31:13 diff --git a/tests/BlackParrotConf/BlackParrotConf.log b/tests/BlackParrotConf/BlackParrotConf.log index 438dc47524..d1c49d0fd1 100644 --- a/tests/BlackParrotConf/BlackParrotConf.log +++ b/tests/BlackParrotConf/BlackParrotConf.log @@ -82993,6 +82993,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (multicore) + |vpiParent: + \_hier_path: (proc_param_lp.multicore), line:5684:30, endln:5684:53 |vpiName:multicore |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.multicore_p), line:5684:16, endln:5684:27 @@ -83010,6 +83012,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (cc_x_dim) + |vpiParent: + \_hier_path: (proc_param_lp.cc_x_dim), line:5686:30, endln:5686:52 |vpiName:cc_x_dim |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.cc_x_dim_p), line:5686:16, endln:5686:26 @@ -83027,6 +83031,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (cc_y_dim) + |vpiParent: + \_hier_path: (proc_param_lp.cc_y_dim), line:5687:30, endln:5687:52 |vpiName:cc_y_dim |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.cc_y_dim_p), line:5687:16, endln:5687:26 @@ -83053,6 +83059,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (ic_y_dim) + |vpiParent: + \_hier_path: (proc_param_lp.ic_y_dim), line:5690:29, endln:5690:51 |vpiName:ic_y_dim |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.ic_y_dim_p), line:5690:16, endln:5690:26 @@ -83079,6 +83087,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (mc_y_dim) + |vpiParent: + \_hier_path: (proc_param_lp.mc_y_dim), line:5692:29, endln:5692:51 |vpiName:mc_y_dim |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.mc_y_dim_p), line:5692:16, endln:5692:26 @@ -83096,6 +83106,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (cac_x_dim) + |vpiParent: + \_hier_path: (proc_param_lp.cac_x_dim), line:5693:30, endln:5693:53 |vpiName:cac_x_dim |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.cac_x_dim_p), line:5693:16, endln:5693:27 @@ -83122,6 +83134,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (sac_x_dim) + |vpiParent: + \_hier_path: (proc_param_lp.sac_x_dim), line:5695:30, endln:5695:53 |vpiName:sac_x_dim |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.sac_x_dim_p), line:5695:16, endln:5695:27 @@ -83148,6 +83162,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (cacc_type) + |vpiParent: + \_hier_path: (proc_param_lp.cacc_type), line:5697:30, endln:5697:53 |vpiName:cacc_type |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.cacc_type_p), line:5697:16, endln:5697:27 @@ -83165,6 +83181,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (sacc_type) + |vpiParent: + \_hier_path: (proc_param_lp.sacc_type), line:5698:30, endln:5698:53 |vpiName:sacc_type |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.sacc_type_p), line:5698:16, endln:5698:27 @@ -83277,6 +83295,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (num_cce) + |vpiParent: + \_hier_path: (proc_param_lp.num_cce), line:5706:28, endln:5706:49 |vpiName:num_cce |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.num_cce_p), line:5706:16, endln:5706:25 @@ -83294,6 +83314,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (num_lce) + |vpiParent: + \_hier_path: (proc_param_lp.num_lce), line:5707:28, endln:5707:49 |vpiName:num_lce |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.num_lce_p), line:5707:16, endln:5707:25 @@ -83714,6 +83736,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (vaddr_width) + |vpiParent: + \_hier_path: (proc_param_lp.vaddr_width), line:5713:32, endln:5713:57 |vpiName:vaddr_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.vaddr_width_p), line:5713:16, endln:5713:29 @@ -83731,6 +83755,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (paddr_width) + |vpiParent: + \_hier_path: (proc_param_lp.paddr_width), line:5714:32, endln:5714:57 |vpiName:paddr_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.paddr_width_p), line:5714:16, endln:5714:29 @@ -83748,6 +83774,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (asid_width) + |vpiParent: + \_hier_path: (proc_param_lp.asid_width), line:5715:32, endln:5715:56 |vpiName:asid_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.asid_width_p), line:5715:16, endln:5715:28 @@ -83765,6 +83793,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (boot_pc) + |vpiParent: + \_hier_path: (proc_param_lp.boot_pc), line:5717:34, endln:5717:55 |vpiName:boot_pc |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.boot_pc_p), line:5717:16, endln:5717:25 @@ -83782,6 +83812,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (boot_in_debug) + |vpiParent: + \_hier_path: (proc_param_lp.boot_in_debug), line:5718:34, endln:5718:61 |vpiName:boot_in_debug |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.boot_in_debug_p), line:5718:16, endln:5718:31 @@ -83799,6 +83831,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (branch_metadata_fwd_width) + |vpiParent: + \_hier_path: (proc_param_lp.branch_metadata_fwd_width), line:5720:46, endln:5720:85 |vpiName:branch_metadata_fwd_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.branch_metadata_fwd_width_p), line:5720:16, endln:5720:43 @@ -83816,6 +83850,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (btb_tag_width) + |vpiParent: + \_hier_path: (proc_param_lp.btb_tag_width), line:5721:46, endln:5721:73 |vpiName:btb_tag_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.btb_tag_width_p), line:5721:16, endln:5721:31 @@ -83833,6 +83869,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (btb_idx_width) + |vpiParent: + \_hier_path: (proc_param_lp.btb_idx_width), line:5722:46, endln:5722:73 |vpiName:btb_idx_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.btb_idx_width_p), line:5722:16, endln:5722:31 @@ -83850,6 +83888,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (bht_idx_width) + |vpiParent: + \_hier_path: (proc_param_lp.bht_idx_width), line:5723:46, endln:5723:73 |vpiName:bht_idx_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.bht_idx_width_p), line:5723:16, endln:5723:31 @@ -83867,6 +83907,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (ghist_width) + |vpiParent: + \_hier_path: (proc_param_lp.ghist_width), line:5724:46, endln:5724:71 |vpiName:ghist_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.ghist_width_p), line:5724:16, endln:5724:29 @@ -83884,6 +83926,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (itlb_els) + |vpiParent: + \_hier_path: (proc_param_lp.itlb_els), line:5726:42, endln:5726:64 |vpiName:itlb_els |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.itlb_els_p), line:5726:16, endln:5726:26 @@ -83901,6 +83945,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (dtlb_els) + |vpiParent: + \_hier_path: (proc_param_lp.dtlb_els), line:5727:42, endln:5727:64 |vpiName:dtlb_els |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.dtlb_els_p), line:5727:16, endln:5727:26 @@ -83918,6 +83964,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (lr_sc) + |vpiParent: + \_hier_path: (proc_param_lp.lr_sc), line:5729:45, endln:5729:64 |vpiName:lr_sc |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.lr_sc_p), line:5729:16, endln:5729:23 @@ -83935,6 +83983,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (amo_swap) + |vpiParent: + \_hier_path: (proc_param_lp.amo_swap), line:5730:45, endln:5730:67 |vpiName:amo_swap |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.amo_swap_p), line:5730:16, endln:5730:26 @@ -83952,6 +84002,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (amo_fetch_logic) + |vpiParent: + \_hier_path: (proc_param_lp.amo_fetch_logic), line:5731:45, endln:5731:74 |vpiName:amo_fetch_logic |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.amo_fetch_logic_p), line:5731:16, endln:5731:33 @@ -83969,6 +84021,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (amo_fetch_arithmetic) + |vpiParent: + \_hier_path: (proc_param_lp.amo_fetch_arithmetic), line:5732:45, endln:5732:79 |vpiName:amo_fetch_arithmetic |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.amo_fetch_arithmetic_p), line:5732:16, endln:5732:38 @@ -83986,6 +84040,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (l1_coherent) + |vpiParent: + \_hier_path: (proc_param_lp.l1_coherent), line:5734:45, endln:5734:70 |vpiName:l1_coherent |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.l1_coherent_p), line:5734:16, endln:5734:29 @@ -84003,6 +84059,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (l1_writethrough) + |vpiParent: + \_hier_path: (proc_param_lp.l1_writethrough), line:5735:45, endln:5735:74 |vpiName:l1_writethrough |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.l1_writethrough_p), line:5735:16, endln:5735:33 @@ -84020,6 +84078,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (dcache_sets) + |vpiParent: + \_hier_path: (proc_param_lp.dcache_sets), line:5736:45, endln:5736:70 |vpiName:dcache_sets |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.dcache_sets_p), line:5736:16, endln:5736:29 @@ -84037,6 +84097,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (dcache_assoc) + |vpiParent: + \_hier_path: (proc_param_lp.dcache_assoc), line:5737:45, endln:5737:71 |vpiName:dcache_assoc |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.dcache_assoc_p), line:5737:16, endln:5737:30 @@ -84054,6 +84116,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (dcache_block_width) + |vpiParent: + \_hier_path: (proc_param_lp.dcache_block_width), line:5738:45, endln:5738:77 |vpiName:dcache_block_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.dcache_block_width_p), line:5738:16, endln:5738:36 @@ -84071,6 +84135,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (dcache_fill_width) + |vpiParent: + \_hier_path: (proc_param_lp.dcache_fill_width), line:5739:45, endln:5739:76 |vpiName:dcache_fill_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.dcache_fill_width_p), line:5739:16, endln:5739:35 @@ -84088,6 +84154,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (icache_sets) + |vpiParent: + \_hier_path: (proc_param_lp.icache_sets), line:5740:45, endln:5740:70 |vpiName:icache_sets |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.icache_sets_p), line:5740:16, endln:5740:29 @@ -84105,6 +84173,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (icache_assoc) + |vpiParent: + \_hier_path: (proc_param_lp.icache_assoc), line:5741:45, endln:5741:71 |vpiName:icache_assoc |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.icache_assoc_p), line:5741:16, endln:5741:30 @@ -84122,6 +84192,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (icache_block_width) + |vpiParent: + \_hier_path: (proc_param_lp.icache_block_width), line:5742:45, endln:5742:77 |vpiName:icache_block_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.icache_block_width_p), line:5742:16, endln:5742:36 @@ -84139,6 +84211,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (icache_fill_width) + |vpiParent: + \_hier_path: (proc_param_lp.icache_fill_width), line:5743:45, endln:5743:76 |vpiName:icache_fill_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.icache_fill_width_p), line:5743:16, endln:5743:35 @@ -84156,6 +84230,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (acache_sets) + |vpiParent: + \_hier_path: (proc_param_lp.acache_sets), line:5744:45, endln:5744:70 |vpiName:acache_sets |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.acache_sets_p), line:5744:16, endln:5744:29 @@ -84173,6 +84249,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (acache_assoc) + |vpiParent: + \_hier_path: (proc_param_lp.acache_assoc), line:5745:45, endln:5745:71 |vpiName:acache_assoc |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.acache_assoc_p), line:5745:16, endln:5745:30 @@ -84190,6 +84268,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (acache_block_width) + |vpiParent: + \_hier_path: (proc_param_lp.acache_block_width), line:5746:45, endln:5746:77 |vpiName:acache_block_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.acache_block_width_p), line:5746:16, endln:5746:36 @@ -84207,6 +84287,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (acache_fill_width) + |vpiParent: + \_hier_path: (proc_param_lp.acache_fill_width), line:5747:45, endln:5747:76 |vpiName:acache_fill_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.acache_fill_width_p), line:5747:16, endln:5747:35 @@ -84566,6 +84648,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (cce_pc_width) + |vpiParent: + \_hier_path: (proc_param_lp.cce_pc_width), line:5771:45, endln:5771:71 |vpiName:cce_pc_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.cce_pc_width_p), line:5771:16, endln:5771:30 @@ -84653,6 +84737,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (cce_ucode) + |vpiParent: + \_hier_path: (proc_param_lp.cce_ucode), line:5775:45, endln:5775:68 |vpiName:cce_ucode |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.cce_ucode_p), line:5775:16, endln:5775:27 @@ -84670,6 +84756,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (l2_en) + |vpiParent: + \_hier_path: (proc_param_lp.l2_en), line:5777:29, endln:5777:48 |vpiName:l2_en |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.l2_en_p), line:5777:16, endln:5777:23 @@ -84687,6 +84775,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (l2_sets) + |vpiParent: + \_hier_path: (proc_param_lp.l2_sets), line:5778:29, endln:5778:50 |vpiName:l2_sets |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.l2_sets_p), line:5778:16, endln:5778:25 @@ -84704,6 +84794,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (l2_assoc) + |vpiParent: + \_hier_path: (proc_param_lp.l2_assoc), line:5779:29, endln:5779:51 |vpiName:l2_assoc |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.l2_assoc_p), line:5779:16, endln:5779:26 @@ -84721,6 +84813,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (l2_outstanding_reqs) + |vpiParent: + \_hier_path: (proc_param_lp.l2_outstanding_reqs), line:5780:40, endln:5780:73 |vpiName:l2_outstanding_reqs |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.l2_outstanding_reqs_p), line:5780:16, endln:5780:37 @@ -84738,6 +84832,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (fe_queue_fifo_els) + |vpiParent: + \_hier_path: (proc_param_lp.fe_queue_fifo_els), line:5782:38, endln:5782:69 |vpiName:fe_queue_fifo_els |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.fe_queue_fifo_els_p), line:5782:16, endln:5782:35 @@ -84755,6 +84851,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (fe_cmd_fifo_els) + |vpiParent: + \_hier_path: (proc_param_lp.fe_cmd_fifo_els), line:5783:38, endln:5783:67 |vpiName:fe_cmd_fifo_els |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.fe_cmd_fifo_els_p), line:5783:16, endln:5783:33 @@ -84772,6 +84870,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (async_coh_clk) + |vpiParent: + \_hier_path: (proc_param_lp.async_coh_clk), line:5785:41, endln:5785:68 |vpiName:async_coh_clk |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.async_coh_clk_p), line:5785:16, endln:5785:31 @@ -84789,6 +84889,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (coh_noc_max_credits) + |vpiParent: + \_hier_path: (proc_param_lp.coh_noc_max_credits), line:5786:41, endln:5786:74 |vpiName:coh_noc_max_credits |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.coh_noc_max_credits_p), line:5786:16, endln:5786:37 @@ -84806,6 +84908,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (coh_noc_flit_width) + |vpiParent: + \_hier_path: (proc_param_lp.coh_noc_flit_width), line:5787:41, endln:5787:73 |vpiName:coh_noc_flit_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.coh_noc_flit_width_p), line:5787:16, endln:5787:36 @@ -84823,6 +84927,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (coh_noc_cid_width) + |vpiParent: + \_hier_path: (proc_param_lp.coh_noc_cid_width), line:5788:41, endln:5788:72 |vpiName:coh_noc_cid_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.coh_noc_cid_width_p), line:5788:16, endln:5788:35 @@ -84840,6 +84946,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (coh_noc_len_width) + |vpiParent: + \_hier_path: (proc_param_lp.coh_noc_len_width), line:5789:41, endln:5789:72 |vpiName:coh_noc_len_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.coh_noc_len_width_p), line:5789:16, endln:5789:35 @@ -85236,6 +85344,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (async_mem_clk) + |vpiParent: + \_hier_path: (proc_param_lp.async_mem_clk), line:5800:44, endln:5800:71 |vpiName:async_mem_clk |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.async_mem_clk_p), line:5800:16, endln:5800:31 @@ -85253,6 +85363,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (mem_noc_max_credits) + |vpiParent: + \_hier_path: (proc_param_lp.mem_noc_max_credits), line:5801:44, endln:5801:77 |vpiName:mem_noc_max_credits |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.mem_noc_max_credits_p), line:5801:16, endln:5801:37 @@ -85270,6 +85382,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (mem_noc_flit_width) + |vpiParent: + \_hier_path: (proc_param_lp.mem_noc_flit_width), line:5802:44, endln:5802:76 |vpiName:mem_noc_flit_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.mem_noc_flit_width_p), line:5802:16, endln:5802:36 @@ -85287,6 +85401,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (mem_noc_cid_width) + |vpiParent: + \_hier_path: (proc_param_lp.mem_noc_cid_width), line:5803:44, endln:5803:75 |vpiName:mem_noc_cid_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.mem_noc_cid_width_p), line:5803:16, endln:5803:35 @@ -85304,6 +85420,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (mem_noc_len_width) + |vpiParent: + \_hier_path: (proc_param_lp.mem_noc_len_width), line:5804:44, endln:5804:75 |vpiName:mem_noc_len_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.mem_noc_len_width_p), line:5804:16, endln:5804:35 @@ -85617,6 +85735,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (async_io_clk) + |vpiParent: + \_hier_path: (proc_param_lp.async_io_clk), line:5816:43, endln:5816:69 |vpiName:async_io_clk |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.async_io_clk_p), line:5816:16, endln:5816:30 @@ -85634,6 +85754,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (io_noc_max_credits) + |vpiParent: + \_hier_path: (proc_param_lp.io_noc_max_credits), line:5817:43, endln:5817:75 |vpiName:io_noc_max_credits |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.io_noc_max_credits_p), line:5817:16, endln:5817:36 @@ -85651,6 +85773,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (io_noc_did_width) + |vpiParent: + \_hier_path: (proc_param_lp.io_noc_did_width), line:5818:43, endln:5818:73 |vpiName:io_noc_did_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.io_noc_did_width_p), line:5818:16, endln:5818:34 @@ -85668,6 +85792,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (io_noc_flit_width) + |vpiParent: + \_hier_path: (proc_param_lp.io_noc_flit_width), line:5819:43, endln:5819:74 |vpiName:io_noc_flit_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.io_noc_flit_width_p), line:5819:16, endln:5819:35 @@ -85685,6 +85811,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (io_noc_cid_width) + |vpiParent: + \_hier_path: (proc_param_lp.io_noc_cid_width), line:5820:43, endln:5820:73 |vpiName:io_noc_cid_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.io_noc_cid_width_p), line:5820:16, endln:5820:34 @@ -85702,6 +85830,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (io_noc_len_width) + |vpiParent: + \_hier_path: (proc_param_lp.io_noc_len_width), line:5821:43, endln:5821:73 |vpiName:io_noc_len_width |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.io_noc_len_width_p), line:5821:16, endln:5821:34 @@ -86002,6 +86132,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (vaddr_width) + |vpiParent: + \_hier_path: (proc_param_lp.vaddr_width), line:5840:32, endln:5840:57 |vpiName:vaddr_width |vpiOperand: \_ref_obj: (page_offset_width_p), line:5840:60, endln:5840:79 @@ -86029,6 +86161,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (paddr_width) + |vpiParent: + \_hier_path: (proc_param_lp.paddr_width), line:5841:32, endln:5841:57 |vpiName:paddr_width |vpiOperand: \_ref_obj: (page_offset_width_p), line:5841:60, endln:5841:79 @@ -88767,6 +88901,8 @@ design: (work@testbench) |vpiName:lce_req_payload |vpiActual: \_ref_obj: (src_id), line:6045:32, endln:6045:38 + |vpiParent: + \_hier_path: (lce_req_payload.src_id), line:6045:16, endln:6045:38 |vpiName:src_id |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.lce_id_i), line:6045:42, endln:6045:50 @@ -88822,6 +88958,8 @@ design: (work@testbench) |vpiName:lce_req_payload |vpiActual: \_ref_obj: (src_id), line:6047:44, endln:6047:50 + |vpiParent: + \_hier_path: (lce_req_payload.src_id), line:6047:28, endln:6047:50 |vpiName:src_id |vpiArgument: \_hier_path: (lce_req.header.addr), line:6047:52, endln:6047:71 @@ -88840,6 +88978,8 @@ design: (work@testbench) |vpiName:header |vpiActual: \_ref_obj: (addr), line:6047:67, endln:6047:71 + |vpiParent: + \_hier_path: (lce_req.header.addr), line:6047:52, endln:6047:71 |vpiName:addr |vpiArgument: \_hier_path: (lce_req_payload.dst_id), line:6047:73, endln:6047:95 @@ -88853,6 +88993,8 @@ design: (work@testbench) |vpiName:lce_req_payload |vpiActual: \_ref_obj: (dst_id), line:6047:89, endln:6047:95 + |vpiParent: + \_hier_path: (lce_req_payload.dst_id), line:6047:73, endln:6047:95 |vpiName:dst_id |vpiArgument: \_hier_path: (lce_req.header.msg_type), line:6047:97, endln:6047:120 @@ -88871,6 +89013,8 @@ design: (work@testbench) |vpiName:header |vpiActual: \_ref_obj: (msg_type), line:6047:112, endln:6047:120 + |vpiParent: + \_hier_path: (lce_req.header.msg_type), line:6047:97, endln:6047:120 |vpiName:msg_type |vpiArgument: \_hier_path: (lce_req_payload.non_exclusive), line:6048:21, endln:6048:50 @@ -88884,6 +89028,8 @@ design: (work@testbench) |vpiName:lce_req_payload |vpiActual: \_ref_obj: (non_exclusive), line:6048:37, endln:6048:50 + |vpiParent: + \_hier_path: (lce_req_payload.non_exclusive), line:6048:21, endln:6048:50 |vpiName:non_exclusive |vpiArgument: \_hier_path: (lce_req_payload.lru_way_id), line:6048:52, endln:6048:78 @@ -88897,6 +89043,8 @@ design: (work@testbench) |vpiName:lce_req_payload |vpiActual: \_ref_obj: (lru_way_id), line:6048:68, endln:6048:78 + |vpiParent: + \_hier_path: (lce_req_payload.lru_way_id), line:6048:52, endln:6048:78 |vpiName:lru_way_id |vpiArgument: \_hier_path: (lce_req.header.size), line:6049:21, endln:6049:40 @@ -88915,6 +89063,8 @@ design: (work@testbench) |vpiName:header |vpiActual: \_ref_obj: (size), line:6049:36, endln:6049:40 + |vpiParent: + \_hier_path: (lce_req.header.size), line:6049:21, endln:6049:40 |vpiName:size |vpiArgument: \_hier_path: (lce_req.data), line:6049:42, endln:6049:54 @@ -88928,6 +89078,8 @@ design: (work@testbench) |vpiName:lce_req |vpiActual: \_ref_obj: (data), line:6049:50, endln:6049:54 + |vpiParent: + \_hier_path: (lce_req.data), line:6049:42, endln:6049:54 |vpiName:data |vpiName:$fdisplay |vpiStmt: @@ -88977,6 +89129,8 @@ design: (work@testbench) |vpiName:lce_resp_payload |vpiActual: \_ref_obj: (src_id), line:6055:33, endln:6055:39 + |vpiParent: + \_hier_path: (lce_resp_payload.src_id), line:6055:16, endln:6055:39 |vpiName:src_id |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.lce_id_i), line:6055:43, endln:6055:51 @@ -89032,6 +89186,8 @@ design: (work@testbench) |vpiName:lce_resp_payload |vpiActual: \_ref_obj: (src_id), line:6057:45, endln:6057:51 + |vpiParent: + \_hier_path: (lce_resp_payload.src_id), line:6057:28, endln:6057:51 |vpiName:src_id |vpiArgument: \_hier_path: (lce_resp.header.addr), line:6057:53, endln:6057:73 @@ -89050,6 +89206,8 @@ design: (work@testbench) |vpiName:header |vpiActual: \_ref_obj: (addr), line:6057:69, endln:6057:73 + |vpiParent: + \_hier_path: (lce_resp.header.addr), line:6057:53, endln:6057:73 |vpiName:addr |vpiArgument: \_hier_path: (lce_resp_payload.dst_id), line:6057:75, endln:6057:98 @@ -89063,6 +89221,8 @@ design: (work@testbench) |vpiName:lce_resp_payload |vpiActual: \_ref_obj: (dst_id), line:6057:92, endln:6057:98 + |vpiParent: + \_hier_path: (lce_resp_payload.dst_id), line:6057:75, endln:6057:98 |vpiName:dst_id |vpiArgument: \_hier_path: (lce_resp.header.msg_type), line:6057:100, endln:6057:124 @@ -89081,6 +89241,8 @@ design: (work@testbench) |vpiName:header |vpiActual: \_ref_obj: (msg_type), line:6057:116, endln:6057:124 + |vpiParent: + \_hier_path: (lce_resp.header.msg_type), line:6057:100, endln:6057:124 |vpiName:msg_type |vpiArgument: \_hier_path: (lce_resp.header.size), line:6058:21, endln:6058:41 @@ -89099,6 +89261,8 @@ design: (work@testbench) |vpiName:header |vpiActual: \_ref_obj: (size), line:6058:37, endln:6058:41 + |vpiParent: + \_hier_path: (lce_resp.header.size), line:6058:21, endln:6058:41 |vpiName:size |vpiArgument: \_hier_path: (lce_resp.data), line:6058:43, endln:6058:56 @@ -89112,6 +89276,8 @@ design: (work@testbench) |vpiName:lce_resp |vpiActual: \_ref_obj: (data), line:6058:52, endln:6058:56 + |vpiParent: + \_hier_path: (lce_resp.data), line:6058:43, endln:6058:56 |vpiName:data |vpiName:$fdisplay |vpiStmt: @@ -89161,6 +89327,8 @@ design: (work@testbench) |vpiName:lce_cmd_payload |vpiActual: \_ref_obj: (dst_id), line:6064:32, endln:6064:38 + |vpiParent: + \_hier_path: (lce_cmd_payload.dst_id), line:6064:16, endln:6064:38 |vpiName:dst_id |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.lce_id_i), line:6064:42, endln:6064:50 @@ -89216,6 +89384,8 @@ design: (work@testbench) |vpiName:lce_cmd_payload |vpiActual: \_ref_obj: (dst_id), line:6066:44, endln:6066:50 + |vpiParent: + \_hier_path: (lce_cmd_payload.dst_id), line:6066:28, endln:6066:50 |vpiName:dst_id |vpiArgument: \_hier_path: (lce_cmd.header.addr), line:6066:52, endln:6066:71 @@ -89234,6 +89404,8 @@ design: (work@testbench) |vpiName:header |vpiActual: \_ref_obj: (addr), line:6066:67, endln:6066:71 + |vpiParent: + \_hier_path: (lce_cmd.header.addr), line:6066:52, endln:6066:71 |vpiName:addr |vpiArgument: \_hier_path: (lce_cmd_payload.src_id), line:6066:73, endln:6066:95 @@ -89247,6 +89419,8 @@ design: (work@testbench) |vpiName:lce_cmd_payload |vpiActual: \_ref_obj: (src_id), line:6066:89, endln:6066:95 + |vpiParent: + \_hier_path: (lce_cmd_payload.src_id), line:6066:73, endln:6066:95 |vpiName:src_id |vpiArgument: \_hier_path: (lce_cmd.header.msg_type), line:6066:97, endln:6066:120 @@ -89265,6 +89439,8 @@ design: (work@testbench) |vpiName:header |vpiActual: \_ref_obj: (msg_type), line:6066:112, endln:6066:120 + |vpiParent: + \_hier_path: (lce_cmd.header.msg_type), line:6066:97, endln:6066:120 |vpiName:msg_type |vpiArgument: \_hier_path: (lce_cmd.header.addr[+:]), line:6067:21, endln:6067:74 @@ -89306,6 +89482,8 @@ design: (work@testbench) |vpiName:lce_cmd_payload |vpiActual: \_ref_obj: (way_id), line:6067:92, endln:6067:98 + |vpiParent: + \_hier_path: (lce_cmd_payload.way_id), line:6067:76, endln:6067:98 |vpiName:way_id |vpiArgument: \_hier_path: (lce_cmd_payload.state), line:6067:100, endln:6067:121 @@ -89319,6 +89497,8 @@ design: (work@testbench) |vpiName:lce_cmd_payload |vpiActual: \_ref_obj: (state), line:6067:116, endln:6067:121 + |vpiParent: + \_hier_path: (lce_cmd_payload.state), line:6067:100, endln:6067:121 |vpiName:state |vpiArgument: \_hier_path: (lce_cmd_payload.target), line:6067:123, endln:6067:145 @@ -89332,6 +89512,8 @@ design: (work@testbench) |vpiName:lce_cmd_payload |vpiActual: \_ref_obj: (target), line:6067:139, endln:6067:145 + |vpiParent: + \_hier_path: (lce_cmd_payload.target), line:6067:123, endln:6067:145 |vpiName:target |vpiArgument: \_hier_path: (lce_cmd_payload.target_way_id), line:6068:21, endln:6068:50 @@ -89345,6 +89527,8 @@ design: (work@testbench) |vpiName:lce_cmd_payload |vpiActual: \_ref_obj: (target_way_id), line:6068:37, endln:6068:50 + |vpiParent: + \_hier_path: (lce_cmd_payload.target_way_id), line:6068:21, endln:6068:50 |vpiName:target_way_id |vpiArgument: \_hier_path: (lce_cmd.header.size), line:6068:52, endln:6068:71 @@ -89363,6 +89547,8 @@ design: (work@testbench) |vpiName:header |vpiActual: \_ref_obj: (size), line:6068:67, endln:6068:71 + |vpiParent: + \_hier_path: (lce_cmd.header.size), line:6068:52, endln:6068:71 |vpiName:size |vpiArgument: \_hier_path: (lce_cmd.data), line:6068:73, endln:6068:85 @@ -89376,6 +89562,8 @@ design: (work@testbench) |vpiName:lce_cmd |vpiActual: \_ref_obj: (data), line:6068:81, endln:6068:85 + |vpiParent: + \_hier_path: (lce_cmd.data), line:6068:73, endln:6068:85 |vpiName:data |vpiName:$fdisplay |vpiStmt: @@ -89445,6 +89633,8 @@ design: (work@testbench) |vpiName:lce_cmd_lo_payload |vpiActual: \_ref_obj: (dst_id), line:6075:57, endln:6075:63 + |vpiParent: + \_hier_path: (lce_cmd_lo_payload.dst_id), line:6075:38, endln:6075:63 |vpiName:dst_id |vpiArgument: \_hier_path: (lce_cmd_lo.header.addr), line:6075:65, endln:6075:87 @@ -89463,6 +89653,8 @@ design: (work@testbench) |vpiName:header |vpiActual: \_ref_obj: (addr), line:6075:83, endln:6075:87 + |vpiParent: + \_hier_path: (lce_cmd_lo.header.addr), line:6075:65, endln:6075:87 |vpiName:addr |vpiArgument: \_hier_path: (lce_cmd_lo_payload.src_id), line:6075:89, endln:6075:114 @@ -89476,6 +89668,8 @@ design: (work@testbench) |vpiName:lce_cmd_lo_payload |vpiActual: \_ref_obj: (src_id), line:6075:108, endln:6075:114 + |vpiParent: + \_hier_path: (lce_cmd_lo_payload.src_id), line:6075:89, endln:6075:114 |vpiName:src_id |vpiArgument: \_hier_path: (lce_cmd_lo.header.msg_type), line:6075:116, endln:6075:142 @@ -89494,6 +89688,8 @@ design: (work@testbench) |vpiName:header |vpiActual: \_ref_obj: (msg_type), line:6075:134, endln:6075:142 + |vpiParent: + \_hier_path: (lce_cmd_lo.header.msg_type), line:6075:116, endln:6075:142 |vpiName:msg_type |vpiArgument: \_hier_path: (lce_cmd_lo_payload.way_id), line:6076:21, endln:6076:46 @@ -89507,6 +89703,8 @@ design: (work@testbench) |vpiName:lce_cmd_lo_payload |vpiActual: \_ref_obj: (way_id), line:6076:40, endln:6076:46 + |vpiParent: + \_hier_path: (lce_cmd_lo_payload.way_id), line:6076:21, endln:6076:46 |vpiName:way_id |vpiArgument: \_hier_path: (lce_cmd_lo_payload.state), line:6076:48, endln:6076:72 @@ -89520,6 +89718,8 @@ design: (work@testbench) |vpiName:lce_cmd_lo_payload |vpiActual: \_ref_obj: (state), line:6076:67, endln:6076:72 + |vpiParent: + \_hier_path: (lce_cmd_lo_payload.state), line:6076:48, endln:6076:72 |vpiName:state |vpiArgument: \_hier_path: (lce_cmd_lo_payload.target), line:6076:74, endln:6076:99 @@ -89533,6 +89733,8 @@ design: (work@testbench) |vpiName:lce_cmd_lo_payload |vpiActual: \_ref_obj: (target), line:6076:93, endln:6076:99 + |vpiParent: + \_hier_path: (lce_cmd_lo_payload.target), line:6076:74, endln:6076:99 |vpiName:target |vpiArgument: \_hier_path: (lce_cmd_lo_payload.target_way_id), line:6076:101, endln:6076:133 @@ -89546,6 +89748,8 @@ design: (work@testbench) |vpiName:lce_cmd_lo_payload |vpiActual: \_ref_obj: (target_way_id), line:6076:120, endln:6076:133 + |vpiParent: + \_hier_path: (lce_cmd_lo_payload.target_way_id), line:6076:101, endln:6076:133 |vpiName:target_way_id |vpiArgument: \_hier_path: (lce_cmd_lo.header.size), line:6077:21, endln:6077:43 @@ -89564,6 +89768,8 @@ design: (work@testbench) |vpiName:header |vpiActual: \_ref_obj: (size), line:6077:39, endln:6077:43 + |vpiParent: + \_hier_path: (lce_cmd_lo.header.size), line:6077:21, endln:6077:43 |vpiName:size |vpiArgument: \_hier_path: (lce_cmd_lo.data), line:6077:45, endln:6077:60 @@ -89577,6 +89783,8 @@ design: (work@testbench) |vpiName:lce_cmd_lo |vpiActual: \_ref_obj: (data), line:6077:56, endln:6077:60 + |vpiParent: + \_hier_path: (lce_cmd_lo.data), line:6077:45, endln:6077:60 |vpiName:data |vpiName:$fdisplay |vpiAlwaysType:3 @@ -89665,6 +89873,8 @@ design: (work@testbench) |vpiName:header |vpiActual: \_ref_obj: (payload), line:6025:43, endln:6025:50 + |vpiParent: + \_hier_path: (lce_req.header.payload), line:6025:28, endln:6025:50 |vpiName:payload |vpiLhs: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.lce_req_payload), line:6025:10, endln:6025:25 @@ -89693,6 +89903,8 @@ design: (work@testbench) |vpiName:header |vpiActual: \_ref_obj: (payload), line:6026:45, endln:6026:52 + |vpiParent: + \_hier_path: (lce_resp.header.payload), line:6026:29, endln:6026:52 |vpiName:payload |vpiLhs: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.lce_resp_payload), line:6026:10, endln:6026:26 @@ -89721,6 +89933,8 @@ design: (work@testbench) |vpiName:header |vpiActual: \_ref_obj: (payload), line:6027:43, endln:6027:50 + |vpiParent: + \_hier_path: (lce_cmd.header.payload), line:6027:28, endln:6027:50 |vpiName:payload |vpiLhs: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.lce_cmd_payload), line:6027:10, endln:6027:25 @@ -89749,6 +89963,8 @@ design: (work@testbench) |vpiName:header |vpiActual: \_ref_obj: (payload), line:6028:49, endln:6028:56 + |vpiParent: + \_hier_path: (lce_cmd_lo.header.payload), line:6028:31, endln:6028:56 |vpiName:payload |vpiLhs: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.lce_cmd_lo_payload), line:6028:10, endln:6028:28 @@ -111471,6 +111687,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (multicore) + |vpiParent: + \_hier_path: (proc_param_lp.multicore), line:6096:30, endln:6096:53 |vpiName:multicore |vpiLhs: \_parameter: (work@testbench.multicore_p), line:6096:16, endln:6096:27 @@ -111488,6 +111706,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (cc_x_dim) + |vpiParent: + \_hier_path: (proc_param_lp.cc_x_dim), line:6098:30, endln:6098:52 |vpiName:cc_x_dim |vpiLhs: \_parameter: (work@testbench.cc_x_dim_p), line:6098:16, endln:6098:26 @@ -111505,6 +111725,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (cc_y_dim) + |vpiParent: + \_hier_path: (proc_param_lp.cc_y_dim), line:6099:30, endln:6099:52 |vpiName:cc_y_dim |vpiLhs: \_parameter: (work@testbench.cc_y_dim_p), line:6099:16, endln:6099:26 @@ -111531,6 +111753,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (ic_y_dim) + |vpiParent: + \_hier_path: (proc_param_lp.ic_y_dim), line:6102:29, endln:6102:51 |vpiName:ic_y_dim |vpiLhs: \_parameter: (work@testbench.ic_y_dim_p), line:6102:16, endln:6102:26 @@ -111557,6 +111781,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (mc_y_dim) + |vpiParent: + \_hier_path: (proc_param_lp.mc_y_dim), line:6104:29, endln:6104:51 |vpiName:mc_y_dim |vpiLhs: \_parameter: (work@testbench.mc_y_dim_p), line:6104:16, endln:6104:26 @@ -111574,6 +111800,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (cac_x_dim) + |vpiParent: + \_hier_path: (proc_param_lp.cac_x_dim), line:6105:30, endln:6105:53 |vpiName:cac_x_dim |vpiLhs: \_parameter: (work@testbench.cac_x_dim_p), line:6105:16, endln:6105:27 @@ -111600,6 +111828,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (sac_x_dim) + |vpiParent: + \_hier_path: (proc_param_lp.sac_x_dim), line:6107:30, endln:6107:53 |vpiName:sac_x_dim |vpiLhs: \_parameter: (work@testbench.sac_x_dim_p), line:6107:16, endln:6107:27 @@ -111626,6 +111856,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (cacc_type) + |vpiParent: + \_hier_path: (proc_param_lp.cacc_type), line:6109:30, endln:6109:53 |vpiName:cacc_type |vpiLhs: \_parameter: (work@testbench.cacc_type_p), line:6109:16, endln:6109:27 @@ -111643,6 +111875,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (sacc_type) + |vpiParent: + \_hier_path: (proc_param_lp.sacc_type), line:6110:30, endln:6110:53 |vpiName:sacc_type |vpiLhs: \_parameter: (work@testbench.sacc_type_p), line:6110:16, endln:6110:27 @@ -111755,6 +111989,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (num_cce) + |vpiParent: + \_hier_path: (proc_param_lp.num_cce), line:6118:28, endln:6118:49 |vpiName:num_cce |vpiLhs: \_parameter: (work@testbench.num_cce_p), line:6118:16, endln:6118:25 @@ -111772,6 +112008,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (num_lce) + |vpiParent: + \_hier_path: (proc_param_lp.num_lce), line:6119:28, endln:6119:49 |vpiName:num_lce |vpiLhs: \_parameter: (work@testbench.num_lce_p), line:6119:16, endln:6119:25 @@ -112192,6 +112430,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (vaddr_width) + |vpiParent: + \_hier_path: (proc_param_lp.vaddr_width), line:6125:32, endln:6125:57 |vpiName:vaddr_width |vpiLhs: \_parameter: (work@testbench.vaddr_width_p), line:6125:16, endln:6125:29 @@ -112209,6 +112449,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (paddr_width) + |vpiParent: + \_hier_path: (proc_param_lp.paddr_width), line:6126:32, endln:6126:57 |vpiName:paddr_width |vpiLhs: \_parameter: (work@testbench.paddr_width_p), line:6126:16, endln:6126:29 @@ -112226,6 +112468,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (asid_width) + |vpiParent: + \_hier_path: (proc_param_lp.asid_width), line:6127:32, endln:6127:56 |vpiName:asid_width |vpiLhs: \_parameter: (work@testbench.asid_width_p), line:6127:16, endln:6127:28 @@ -112243,6 +112487,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (boot_pc) + |vpiParent: + \_hier_path: (proc_param_lp.boot_pc), line:6129:34, endln:6129:55 |vpiName:boot_pc |vpiLhs: \_parameter: (work@testbench.boot_pc_p), line:6129:16, endln:6129:25 @@ -112260,6 +112506,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (boot_in_debug) + |vpiParent: + \_hier_path: (proc_param_lp.boot_in_debug), line:6130:34, endln:6130:61 |vpiName:boot_in_debug |vpiLhs: \_parameter: (work@testbench.boot_in_debug_p), line:6130:16, endln:6130:31 @@ -112277,6 +112525,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (branch_metadata_fwd_width) + |vpiParent: + \_hier_path: (proc_param_lp.branch_metadata_fwd_width), line:6132:46, endln:6132:85 |vpiName:branch_metadata_fwd_width |vpiLhs: \_parameter: (work@testbench.branch_metadata_fwd_width_p), line:6132:16, endln:6132:43 @@ -112294,6 +112544,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (btb_tag_width) + |vpiParent: + \_hier_path: (proc_param_lp.btb_tag_width), line:6133:46, endln:6133:73 |vpiName:btb_tag_width |vpiLhs: \_parameter: (work@testbench.btb_tag_width_p), line:6133:16, endln:6133:31 @@ -112311,6 +112563,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (btb_idx_width) + |vpiParent: + \_hier_path: (proc_param_lp.btb_idx_width), line:6134:46, endln:6134:73 |vpiName:btb_idx_width |vpiLhs: \_parameter: (work@testbench.btb_idx_width_p), line:6134:16, endln:6134:31 @@ -112328,6 +112582,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (bht_idx_width) + |vpiParent: + \_hier_path: (proc_param_lp.bht_idx_width), line:6135:46, endln:6135:73 |vpiName:bht_idx_width |vpiLhs: \_parameter: (work@testbench.bht_idx_width_p), line:6135:16, endln:6135:31 @@ -112345,6 +112601,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (ghist_width) + |vpiParent: + \_hier_path: (proc_param_lp.ghist_width), line:6136:46, endln:6136:71 |vpiName:ghist_width |vpiLhs: \_parameter: (work@testbench.ghist_width_p), line:6136:16, endln:6136:29 @@ -112362,6 +112620,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (itlb_els) + |vpiParent: + \_hier_path: (proc_param_lp.itlb_els), line:6138:42, endln:6138:64 |vpiName:itlb_els |vpiLhs: \_parameter: (work@testbench.itlb_els_p), line:6138:16, endln:6138:26 @@ -112379,6 +112639,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (dtlb_els) + |vpiParent: + \_hier_path: (proc_param_lp.dtlb_els), line:6139:42, endln:6139:64 |vpiName:dtlb_els |vpiLhs: \_parameter: (work@testbench.dtlb_els_p), line:6139:16, endln:6139:26 @@ -112396,6 +112658,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (lr_sc) + |vpiParent: + \_hier_path: (proc_param_lp.lr_sc), line:6141:45, endln:6141:64 |vpiName:lr_sc |vpiLhs: \_parameter: (work@testbench.lr_sc_p), line:6141:16, endln:6141:23 @@ -112413,6 +112677,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (amo_swap) + |vpiParent: + \_hier_path: (proc_param_lp.amo_swap), line:6142:45, endln:6142:67 |vpiName:amo_swap |vpiLhs: \_parameter: (work@testbench.amo_swap_p), line:6142:16, endln:6142:26 @@ -112430,6 +112696,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (amo_fetch_logic) + |vpiParent: + \_hier_path: (proc_param_lp.amo_fetch_logic), line:6143:45, endln:6143:74 |vpiName:amo_fetch_logic |vpiLhs: \_parameter: (work@testbench.amo_fetch_logic_p), line:6143:16, endln:6143:33 @@ -112447,6 +112715,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (amo_fetch_arithmetic) + |vpiParent: + \_hier_path: (proc_param_lp.amo_fetch_arithmetic), line:6144:45, endln:6144:79 |vpiName:amo_fetch_arithmetic |vpiLhs: \_parameter: (work@testbench.amo_fetch_arithmetic_p), line:6144:16, endln:6144:38 @@ -112464,6 +112734,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (l1_coherent) + |vpiParent: + \_hier_path: (proc_param_lp.l1_coherent), line:6146:45, endln:6146:70 |vpiName:l1_coherent |vpiLhs: \_parameter: (work@testbench.l1_coherent_p), line:6146:16, endln:6146:29 @@ -112481,6 +112753,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (l1_writethrough) + |vpiParent: + \_hier_path: (proc_param_lp.l1_writethrough), line:6147:45, endln:6147:74 |vpiName:l1_writethrough |vpiLhs: \_parameter: (work@testbench.l1_writethrough_p), line:6147:16, endln:6147:33 @@ -112498,6 +112772,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (dcache_sets) + |vpiParent: + \_hier_path: (proc_param_lp.dcache_sets), line:6148:45, endln:6148:70 |vpiName:dcache_sets |vpiLhs: \_parameter: (work@testbench.dcache_sets_p), line:6148:16, endln:6148:29 @@ -112515,6 +112791,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (dcache_assoc) + |vpiParent: + \_hier_path: (proc_param_lp.dcache_assoc), line:6149:45, endln:6149:71 |vpiName:dcache_assoc |vpiLhs: \_parameter: (work@testbench.dcache_assoc_p), line:6149:16, endln:6149:30 @@ -112532,6 +112810,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (dcache_block_width) + |vpiParent: + \_hier_path: (proc_param_lp.dcache_block_width), line:6150:45, endln:6150:77 |vpiName:dcache_block_width |vpiLhs: \_parameter: (work@testbench.dcache_block_width_p), line:6150:16, endln:6150:36 @@ -112549,6 +112829,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (dcache_fill_width) + |vpiParent: + \_hier_path: (proc_param_lp.dcache_fill_width), line:6151:45, endln:6151:76 |vpiName:dcache_fill_width |vpiLhs: \_parameter: (work@testbench.dcache_fill_width_p), line:6151:16, endln:6151:35 @@ -112566,6 +112848,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (icache_sets) + |vpiParent: + \_hier_path: (proc_param_lp.icache_sets), line:6152:45, endln:6152:70 |vpiName:icache_sets |vpiLhs: \_parameter: (work@testbench.icache_sets_p), line:6152:16, endln:6152:29 @@ -112583,6 +112867,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (icache_assoc) + |vpiParent: + \_hier_path: (proc_param_lp.icache_assoc), line:6153:45, endln:6153:71 |vpiName:icache_assoc |vpiLhs: \_parameter: (work@testbench.icache_assoc_p), line:6153:16, endln:6153:30 @@ -112600,6 +112886,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (icache_block_width) + |vpiParent: + \_hier_path: (proc_param_lp.icache_block_width), line:6154:45, endln:6154:77 |vpiName:icache_block_width |vpiLhs: \_parameter: (work@testbench.icache_block_width_p), line:6154:16, endln:6154:36 @@ -112617,6 +112905,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (icache_fill_width) + |vpiParent: + \_hier_path: (proc_param_lp.icache_fill_width), line:6155:45, endln:6155:76 |vpiName:icache_fill_width |vpiLhs: \_parameter: (work@testbench.icache_fill_width_p), line:6155:16, endln:6155:35 @@ -112634,6 +112924,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (acache_sets) + |vpiParent: + \_hier_path: (proc_param_lp.acache_sets), line:6156:45, endln:6156:70 |vpiName:acache_sets |vpiLhs: \_parameter: (work@testbench.acache_sets_p), line:6156:16, endln:6156:29 @@ -112651,6 +112943,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (acache_assoc) + |vpiParent: + \_hier_path: (proc_param_lp.acache_assoc), line:6157:45, endln:6157:71 |vpiName:acache_assoc |vpiLhs: \_parameter: (work@testbench.acache_assoc_p), line:6157:16, endln:6157:30 @@ -112668,6 +112962,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (acache_block_width) + |vpiParent: + \_hier_path: (proc_param_lp.acache_block_width), line:6158:45, endln:6158:77 |vpiName:acache_block_width |vpiLhs: \_parameter: (work@testbench.acache_block_width_p), line:6158:16, endln:6158:36 @@ -112685,6 +112981,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (acache_fill_width) + |vpiParent: + \_hier_path: (proc_param_lp.acache_fill_width), line:6159:45, endln:6159:76 |vpiName:acache_fill_width |vpiLhs: \_parameter: (work@testbench.acache_fill_width_p), line:6159:16, endln:6159:35 @@ -113044,6 +113342,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (cce_pc_width) + |vpiParent: + \_hier_path: (proc_param_lp.cce_pc_width), line:6183:45, endln:6183:71 |vpiName:cce_pc_width |vpiLhs: \_parameter: (work@testbench.cce_pc_width_p), line:6183:16, endln:6183:30 @@ -113131,6 +113431,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (cce_ucode) + |vpiParent: + \_hier_path: (proc_param_lp.cce_ucode), line:6187:45, endln:6187:68 |vpiName:cce_ucode |vpiLhs: \_parameter: (work@testbench.cce_ucode_p), line:6187:16, endln:6187:27 @@ -113148,6 +113450,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (l2_en) + |vpiParent: + \_hier_path: (proc_param_lp.l2_en), line:6189:29, endln:6189:48 |vpiName:l2_en |vpiLhs: \_parameter: (work@testbench.l2_en_p), line:6189:16, endln:6189:23 @@ -113165,6 +113469,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (l2_sets) + |vpiParent: + \_hier_path: (proc_param_lp.l2_sets), line:6190:29, endln:6190:50 |vpiName:l2_sets |vpiLhs: \_parameter: (work@testbench.l2_sets_p), line:6190:16, endln:6190:25 @@ -113182,6 +113488,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (l2_assoc) + |vpiParent: + \_hier_path: (proc_param_lp.l2_assoc), line:6191:29, endln:6191:51 |vpiName:l2_assoc |vpiLhs: \_parameter: (work@testbench.l2_assoc_p), line:6191:16, endln:6191:26 @@ -113199,6 +113507,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (l2_outstanding_reqs) + |vpiParent: + \_hier_path: (proc_param_lp.l2_outstanding_reqs), line:6192:40, endln:6192:73 |vpiName:l2_outstanding_reqs |vpiLhs: \_parameter: (work@testbench.l2_outstanding_reqs_p), line:6192:16, endln:6192:37 @@ -113216,6 +113526,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (fe_queue_fifo_els) + |vpiParent: + \_hier_path: (proc_param_lp.fe_queue_fifo_els), line:6194:38, endln:6194:69 |vpiName:fe_queue_fifo_els |vpiLhs: \_parameter: (work@testbench.fe_queue_fifo_els_p), line:6194:16, endln:6194:35 @@ -113233,6 +113545,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (fe_cmd_fifo_els) + |vpiParent: + \_hier_path: (proc_param_lp.fe_cmd_fifo_els), line:6195:38, endln:6195:67 |vpiName:fe_cmd_fifo_els |vpiLhs: \_parameter: (work@testbench.fe_cmd_fifo_els_p), line:6195:16, endln:6195:33 @@ -113250,6 +113564,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (async_coh_clk) + |vpiParent: + \_hier_path: (proc_param_lp.async_coh_clk), line:6197:41, endln:6197:68 |vpiName:async_coh_clk |vpiLhs: \_parameter: (work@testbench.async_coh_clk_p), line:6197:16, endln:6197:31 @@ -113267,6 +113583,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (coh_noc_max_credits) + |vpiParent: + \_hier_path: (proc_param_lp.coh_noc_max_credits), line:6198:41, endln:6198:74 |vpiName:coh_noc_max_credits |vpiLhs: \_parameter: (work@testbench.coh_noc_max_credits_p), line:6198:16, endln:6198:37 @@ -113284,6 +113602,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (coh_noc_flit_width) + |vpiParent: + \_hier_path: (proc_param_lp.coh_noc_flit_width), line:6199:41, endln:6199:73 |vpiName:coh_noc_flit_width |vpiLhs: \_parameter: (work@testbench.coh_noc_flit_width_p), line:6199:16, endln:6199:36 @@ -113301,6 +113621,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (coh_noc_cid_width) + |vpiParent: + \_hier_path: (proc_param_lp.coh_noc_cid_width), line:6200:41, endln:6200:72 |vpiName:coh_noc_cid_width |vpiLhs: \_parameter: (work@testbench.coh_noc_cid_width_p), line:6200:16, endln:6200:35 @@ -113318,6 +113640,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (coh_noc_len_width) + |vpiParent: + \_hier_path: (proc_param_lp.coh_noc_len_width), line:6201:41, endln:6201:72 |vpiName:coh_noc_len_width |vpiLhs: \_parameter: (work@testbench.coh_noc_len_width_p), line:6201:16, endln:6201:35 @@ -113714,6 +114038,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (async_mem_clk) + |vpiParent: + \_hier_path: (proc_param_lp.async_mem_clk), line:6212:44, endln:6212:71 |vpiName:async_mem_clk |vpiLhs: \_parameter: (work@testbench.async_mem_clk_p), line:6212:16, endln:6212:31 @@ -113731,6 +114057,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (mem_noc_max_credits) + |vpiParent: + \_hier_path: (proc_param_lp.mem_noc_max_credits), line:6213:44, endln:6213:77 |vpiName:mem_noc_max_credits |vpiLhs: \_parameter: (work@testbench.mem_noc_max_credits_p), line:6213:16, endln:6213:37 @@ -113748,6 +114076,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (mem_noc_flit_width) + |vpiParent: + \_hier_path: (proc_param_lp.mem_noc_flit_width), line:6214:44, endln:6214:76 |vpiName:mem_noc_flit_width |vpiLhs: \_parameter: (work@testbench.mem_noc_flit_width_p), line:6214:16, endln:6214:36 @@ -113765,6 +114095,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (mem_noc_cid_width) + |vpiParent: + \_hier_path: (proc_param_lp.mem_noc_cid_width), line:6215:44, endln:6215:75 |vpiName:mem_noc_cid_width |vpiLhs: \_parameter: (work@testbench.mem_noc_cid_width_p), line:6215:16, endln:6215:35 @@ -113782,6 +114114,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (mem_noc_len_width) + |vpiParent: + \_hier_path: (proc_param_lp.mem_noc_len_width), line:6216:44, endln:6216:75 |vpiName:mem_noc_len_width |vpiLhs: \_parameter: (work@testbench.mem_noc_len_width_p), line:6216:16, endln:6216:35 @@ -114095,6 +114429,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (async_io_clk) + |vpiParent: + \_hier_path: (proc_param_lp.async_io_clk), line:6228:43, endln:6228:69 |vpiName:async_io_clk |vpiLhs: \_parameter: (work@testbench.async_io_clk_p), line:6228:16, endln:6228:30 @@ -114112,6 +114448,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (io_noc_max_credits) + |vpiParent: + \_hier_path: (proc_param_lp.io_noc_max_credits), line:6229:43, endln:6229:75 |vpiName:io_noc_max_credits |vpiLhs: \_parameter: (work@testbench.io_noc_max_credits_p), line:6229:16, endln:6229:36 @@ -114129,6 +114467,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (io_noc_did_width) + |vpiParent: + \_hier_path: (proc_param_lp.io_noc_did_width), line:6230:43, endln:6230:73 |vpiName:io_noc_did_width |vpiLhs: \_parameter: (work@testbench.io_noc_did_width_p), line:6230:16, endln:6230:34 @@ -114146,6 +114486,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (io_noc_flit_width) + |vpiParent: + \_hier_path: (proc_param_lp.io_noc_flit_width), line:6231:43, endln:6231:74 |vpiName:io_noc_flit_width |vpiLhs: \_parameter: (work@testbench.io_noc_flit_width_p), line:6231:16, endln:6231:35 @@ -114163,6 +114505,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (io_noc_cid_width) + |vpiParent: + \_hier_path: (proc_param_lp.io_noc_cid_width), line:6232:43, endln:6232:73 |vpiName:io_noc_cid_width |vpiLhs: \_parameter: (work@testbench.io_noc_cid_width_p), line:6232:16, endln:6232:34 @@ -114180,6 +114524,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (io_noc_len_width) + |vpiParent: + \_hier_path: (proc_param_lp.io_noc_len_width), line:6233:43, endln:6233:73 |vpiName:io_noc_len_width |vpiLhs: \_parameter: (work@testbench.io_noc_len_width_p), line:6233:16, endln:6233:34 @@ -114480,6 +114826,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (vaddr_width) + |vpiParent: + \_hier_path: (proc_param_lp.vaddr_width), line:6252:32, endln:6252:57 |vpiName:vaddr_width |vpiOperand: \_ref_obj: (page_offset_width_p), line:6252:60, endln:6252:79 @@ -114507,6 +114855,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (paddr_width) + |vpiParent: + \_hier_path: (proc_param_lp.paddr_width), line:6253:32, endln:6253:57 |vpiName:paddr_width |vpiOperand: \_ref_obj: (page_offset_width_p), line:6253:60, endln:6253:79 @@ -125493,6 +125843,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (multicore) + |vpiParent: + \_hier_path: (proc_param_lp.multicore), line:6096:30, endln:6096:53 |vpiName:multicore |vpiLhs: \_parameter: (work@testbench.multicore_p), line:6096:16, endln:6096:27 @@ -125512,6 +125864,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (cc_x_dim) + |vpiParent: + \_hier_path: (proc_param_lp.cc_x_dim), line:6098:30, endln:6098:52 |vpiName:cc_x_dim |vpiLhs: \_parameter: (work@testbench.cc_x_dim_p), line:6098:16, endln:6098:26 @@ -125531,6 +125885,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (cc_y_dim) + |vpiParent: + \_hier_path: (proc_param_lp.cc_y_dim), line:6099:30, endln:6099:52 |vpiName:cc_y_dim |vpiLhs: \_parameter: (work@testbench.cc_y_dim_p), line:6099:16, endln:6099:26 @@ -125571,6 +125927,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (ic_y_dim) + |vpiParent: + \_hier_path: (proc_param_lp.ic_y_dim), line:6102:29, endln:6102:51 |vpiName:ic_y_dim |vpiLhs: \_parameter: (work@testbench.ic_y_dim_p), line:6102:16, endln:6102:26 @@ -125611,6 +125969,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (mc_y_dim) + |vpiParent: + \_hier_path: (proc_param_lp.mc_y_dim), line:6104:29, endln:6104:51 |vpiName:mc_y_dim |vpiLhs: \_parameter: (work@testbench.mc_y_dim_p), line:6104:16, endln:6104:26 @@ -125630,6 +125990,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (cac_x_dim) + |vpiParent: + \_hier_path: (proc_param_lp.cac_x_dim), line:6105:30, endln:6105:53 |vpiName:cac_x_dim |vpiLhs: \_parameter: (work@testbench.cac_x_dim_p), line:6105:16, endln:6105:27 @@ -125670,6 +126032,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (sac_x_dim) + |vpiParent: + \_hier_path: (proc_param_lp.sac_x_dim), line:6107:30, endln:6107:53 |vpiName:sac_x_dim |vpiLhs: \_parameter: (work@testbench.sac_x_dim_p), line:6107:16, endln:6107:27 @@ -125710,6 +126074,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (cacc_type) + |vpiParent: + \_hier_path: (proc_param_lp.cacc_type), line:6109:30, endln:6109:53 |vpiName:cacc_type |vpiLhs: \_parameter: (work@testbench.cacc_type_p), line:6109:16, endln:6109:27 @@ -125729,6 +126095,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (sacc_type) + |vpiParent: + \_hier_path: (proc_param_lp.sacc_type), line:6110:30, endln:6110:53 |vpiName:sacc_type |vpiLhs: \_parameter: (work@testbench.sacc_type_p), line:6110:16, endln:6110:27 @@ -125963,6 +126331,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (num_cce) + |vpiParent: + \_hier_path: (proc_param_lp.num_cce), line:6118:28, endln:6118:49 |vpiName:num_cce |vpiLhs: \_parameter: (work@testbench.num_cce_p), line:6118:16, endln:6118:25 @@ -125982,6 +126352,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (num_lce) + |vpiParent: + \_hier_path: (proc_param_lp.num_lce), line:6119:28, endln:6119:49 |vpiName:num_lce |vpiLhs: \_parameter: (work@testbench.num_lce_p), line:6119:16, endln:6119:25 @@ -126550,6 +126922,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (vaddr_width) + |vpiParent: + \_hier_path: (proc_param_lp.vaddr_width), line:6125:32, endln:6125:57 |vpiName:vaddr_width |vpiLhs: \_parameter: (work@testbench.vaddr_width_p), line:6125:16, endln:6125:29 @@ -126569,6 +126943,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (paddr_width) + |vpiParent: + \_hier_path: (proc_param_lp.paddr_width), line:6126:32, endln:6126:57 |vpiName:paddr_width |vpiLhs: \_parameter: (work@testbench.paddr_width_p), line:6126:16, endln:6126:29 @@ -126588,6 +126964,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (asid_width) + |vpiParent: + \_hier_path: (proc_param_lp.asid_width), line:6127:32, endln:6127:56 |vpiName:asid_width |vpiLhs: \_parameter: (work@testbench.asid_width_p), line:6127:16, endln:6127:28 @@ -126607,6 +126985,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (boot_pc) + |vpiParent: + \_hier_path: (proc_param_lp.boot_pc), line:6129:34, endln:6129:55 |vpiName:boot_pc |vpiLhs: \_parameter: (work@testbench.boot_pc_p), line:6129:16, endln:6129:25 @@ -126626,6 +127006,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (boot_in_debug) + |vpiParent: + \_hier_path: (proc_param_lp.boot_in_debug), line:6130:34, endln:6130:61 |vpiName:boot_in_debug |vpiLhs: \_parameter: (work@testbench.boot_in_debug_p), line:6130:16, endln:6130:31 @@ -126645,6 +127027,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (branch_metadata_fwd_width) + |vpiParent: + \_hier_path: (proc_param_lp.branch_metadata_fwd_width), line:6132:46, endln:6132:85 |vpiName:branch_metadata_fwd_width |vpiLhs: \_parameter: (work@testbench.branch_metadata_fwd_width_p), line:6132:16, endln:6132:43 @@ -126664,6 +127048,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (btb_tag_width) + |vpiParent: + \_hier_path: (proc_param_lp.btb_tag_width), line:6133:46, endln:6133:73 |vpiName:btb_tag_width |vpiLhs: \_parameter: (work@testbench.btb_tag_width_p), line:6133:16, endln:6133:31 @@ -126683,6 +127069,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (btb_idx_width) + |vpiParent: + \_hier_path: (proc_param_lp.btb_idx_width), line:6134:46, endln:6134:73 |vpiName:btb_idx_width |vpiLhs: \_parameter: (work@testbench.btb_idx_width_p), line:6134:16, endln:6134:31 @@ -126702,6 +127090,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (bht_idx_width) + |vpiParent: + \_hier_path: (proc_param_lp.bht_idx_width), line:6135:46, endln:6135:73 |vpiName:bht_idx_width |vpiLhs: \_parameter: (work@testbench.bht_idx_width_p), line:6135:16, endln:6135:31 @@ -126721,6 +127111,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (ghist_width) + |vpiParent: + \_hier_path: (proc_param_lp.ghist_width), line:6136:46, endln:6136:71 |vpiName:ghist_width |vpiLhs: \_parameter: (work@testbench.ghist_width_p), line:6136:16, endln:6136:29 @@ -126740,6 +127132,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (itlb_els) + |vpiParent: + \_hier_path: (proc_param_lp.itlb_els), line:6138:42, endln:6138:64 |vpiName:itlb_els |vpiLhs: \_parameter: (work@testbench.itlb_els_p), line:6138:16, endln:6138:26 @@ -126759,6 +127153,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (dtlb_els) + |vpiParent: + \_hier_path: (proc_param_lp.dtlb_els), line:6139:42, endln:6139:64 |vpiName:dtlb_els |vpiLhs: \_parameter: (work@testbench.dtlb_els_p), line:6139:16, endln:6139:26 @@ -126778,6 +127174,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (lr_sc) + |vpiParent: + \_hier_path: (proc_param_lp.lr_sc), line:6141:45, endln:6141:64 |vpiName:lr_sc |vpiLhs: \_parameter: (work@testbench.lr_sc_p), line:6141:16, endln:6141:23 @@ -126797,6 +127195,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (amo_swap) + |vpiParent: + \_hier_path: (proc_param_lp.amo_swap), line:6142:45, endln:6142:67 |vpiName:amo_swap |vpiLhs: \_parameter: (work@testbench.amo_swap_p), line:6142:16, endln:6142:26 @@ -126816,6 +127216,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (amo_fetch_logic) + |vpiParent: + \_hier_path: (proc_param_lp.amo_fetch_logic), line:6143:45, endln:6143:74 |vpiName:amo_fetch_logic |vpiLhs: \_parameter: (work@testbench.amo_fetch_logic_p), line:6143:16, endln:6143:33 @@ -126835,6 +127237,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (amo_fetch_arithmetic) + |vpiParent: + \_hier_path: (proc_param_lp.amo_fetch_arithmetic), line:6144:45, endln:6144:79 |vpiName:amo_fetch_arithmetic |vpiLhs: \_parameter: (work@testbench.amo_fetch_arithmetic_p), line:6144:16, endln:6144:38 @@ -126854,6 +127258,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (l1_coherent) + |vpiParent: + \_hier_path: (proc_param_lp.l1_coherent), line:6146:45, endln:6146:70 |vpiName:l1_coherent |vpiLhs: \_parameter: (work@testbench.l1_coherent_p), line:6146:16, endln:6146:29 @@ -126873,6 +127279,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (l1_writethrough) + |vpiParent: + \_hier_path: (proc_param_lp.l1_writethrough), line:6147:45, endln:6147:74 |vpiName:l1_writethrough |vpiLhs: \_parameter: (work@testbench.l1_writethrough_p), line:6147:16, endln:6147:33 @@ -126892,6 +127300,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (dcache_sets) + |vpiParent: + \_hier_path: (proc_param_lp.dcache_sets), line:6148:45, endln:6148:70 |vpiName:dcache_sets |vpiLhs: \_parameter: (work@testbench.dcache_sets_p), line:6148:16, endln:6148:29 @@ -126911,6 +127321,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (dcache_assoc) + |vpiParent: + \_hier_path: (proc_param_lp.dcache_assoc), line:6149:45, endln:6149:71 |vpiName:dcache_assoc |vpiLhs: \_parameter: (work@testbench.dcache_assoc_p), line:6149:16, endln:6149:30 @@ -126930,6 +127342,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (dcache_block_width) + |vpiParent: + \_hier_path: (proc_param_lp.dcache_block_width), line:6150:45, endln:6150:77 |vpiName:dcache_block_width |vpiLhs: \_parameter: (work@testbench.dcache_block_width_p), line:6150:16, endln:6150:36 @@ -126949,6 +127363,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (dcache_fill_width) + |vpiParent: + \_hier_path: (proc_param_lp.dcache_fill_width), line:6151:45, endln:6151:76 |vpiName:dcache_fill_width |vpiLhs: \_parameter: (work@testbench.dcache_fill_width_p), line:6151:16, endln:6151:35 @@ -126968,6 +127384,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (icache_sets) + |vpiParent: + \_hier_path: (proc_param_lp.icache_sets), line:6152:45, endln:6152:70 |vpiName:icache_sets |vpiLhs: \_parameter: (work@testbench.icache_sets_p), line:6152:16, endln:6152:29 @@ -126987,6 +127405,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (icache_assoc) + |vpiParent: + \_hier_path: (proc_param_lp.icache_assoc), line:6153:45, endln:6153:71 |vpiName:icache_assoc |vpiLhs: \_parameter: (work@testbench.icache_assoc_p), line:6153:16, endln:6153:30 @@ -127006,6 +127426,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (icache_block_width) + |vpiParent: + \_hier_path: (proc_param_lp.icache_block_width), line:6154:45, endln:6154:77 |vpiName:icache_block_width |vpiLhs: \_parameter: (work@testbench.icache_block_width_p), line:6154:16, endln:6154:36 @@ -127025,6 +127447,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (icache_fill_width) + |vpiParent: + \_hier_path: (proc_param_lp.icache_fill_width), line:6155:45, endln:6155:76 |vpiName:icache_fill_width |vpiLhs: \_parameter: (work@testbench.icache_fill_width_p), line:6155:16, endln:6155:35 @@ -127044,6 +127468,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (acache_sets) + |vpiParent: + \_hier_path: (proc_param_lp.acache_sets), line:6156:45, endln:6156:70 |vpiName:acache_sets |vpiLhs: \_parameter: (work@testbench.acache_sets_p), line:6156:16, endln:6156:29 @@ -127063,6 +127489,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (acache_assoc) + |vpiParent: + \_hier_path: (proc_param_lp.acache_assoc), line:6157:45, endln:6157:71 |vpiName:acache_assoc |vpiLhs: \_parameter: (work@testbench.acache_assoc_p), line:6157:16, endln:6157:30 @@ -127082,6 +127510,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (acache_block_width) + |vpiParent: + \_hier_path: (proc_param_lp.acache_block_width), line:6158:45, endln:6158:77 |vpiName:acache_block_width |vpiLhs: \_parameter: (work@testbench.acache_block_width_p), line:6158:16, endln:6158:36 @@ -127101,6 +127531,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (acache_fill_width) + |vpiParent: + \_hier_path: (proc_param_lp.acache_fill_width), line:6159:45, endln:6159:76 |vpiName:acache_fill_width |vpiLhs: \_parameter: (work@testbench.acache_fill_width_p), line:6159:16, endln:6159:35 @@ -127816,6 +128248,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (cce_pc_width) + |vpiParent: + \_hier_path: (proc_param_lp.cce_pc_width), line:6183:45, endln:6183:71 |vpiName:cce_pc_width |vpiLhs: \_parameter: (work@testbench.cce_pc_width_p), line:6183:16, endln:6183:30 @@ -127965,6 +128399,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (cce_ucode) + |vpiParent: + \_hier_path: (proc_param_lp.cce_ucode), line:6187:45, endln:6187:68 |vpiName:cce_ucode |vpiLhs: \_parameter: (work@testbench.cce_ucode_p), line:6187:16, endln:6187:27 @@ -127984,6 +128420,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (l2_en) + |vpiParent: + \_hier_path: (proc_param_lp.l2_en), line:6189:29, endln:6189:48 |vpiName:l2_en |vpiLhs: \_parameter: (work@testbench.l2_en_p), line:6189:16, endln:6189:23 @@ -128003,6 +128441,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (l2_sets) + |vpiParent: + \_hier_path: (proc_param_lp.l2_sets), line:6190:29, endln:6190:50 |vpiName:l2_sets |vpiLhs: \_parameter: (work@testbench.l2_sets_p), line:6190:16, endln:6190:25 @@ -128022,6 +128462,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (l2_assoc) + |vpiParent: + \_hier_path: (proc_param_lp.l2_assoc), line:6191:29, endln:6191:51 |vpiName:l2_assoc |vpiLhs: \_parameter: (work@testbench.l2_assoc_p), line:6191:16, endln:6191:26 @@ -128041,6 +128483,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (l2_outstanding_reqs) + |vpiParent: + \_hier_path: (proc_param_lp.l2_outstanding_reqs), line:6192:40, endln:6192:73 |vpiName:l2_outstanding_reqs |vpiLhs: \_parameter: (work@testbench.l2_outstanding_reqs_p), line:6192:16, endln:6192:37 @@ -128060,6 +128504,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (fe_queue_fifo_els) + |vpiParent: + \_hier_path: (proc_param_lp.fe_queue_fifo_els), line:6194:38, endln:6194:69 |vpiName:fe_queue_fifo_els |vpiLhs: \_parameter: (work@testbench.fe_queue_fifo_els_p), line:6194:16, endln:6194:35 @@ -128079,6 +128525,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (fe_cmd_fifo_els) + |vpiParent: + \_hier_path: (proc_param_lp.fe_cmd_fifo_els), line:6195:38, endln:6195:67 |vpiName:fe_cmd_fifo_els |vpiLhs: \_parameter: (work@testbench.fe_cmd_fifo_els_p), line:6195:16, endln:6195:33 @@ -128098,6 +128546,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (async_coh_clk) + |vpiParent: + \_hier_path: (proc_param_lp.async_coh_clk), line:6197:41, endln:6197:68 |vpiName:async_coh_clk |vpiLhs: \_parameter: (work@testbench.async_coh_clk_p), line:6197:16, endln:6197:31 @@ -128117,6 +128567,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (coh_noc_max_credits) + |vpiParent: + \_hier_path: (proc_param_lp.coh_noc_max_credits), line:6198:41, endln:6198:74 |vpiName:coh_noc_max_credits |vpiLhs: \_parameter: (work@testbench.coh_noc_max_credits_p), line:6198:16, endln:6198:37 @@ -128136,6 +128588,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (coh_noc_flit_width) + |vpiParent: + \_hier_path: (proc_param_lp.coh_noc_flit_width), line:6199:41, endln:6199:73 |vpiName:coh_noc_flit_width |vpiLhs: \_parameter: (work@testbench.coh_noc_flit_width_p), line:6199:16, endln:6199:36 @@ -128155,6 +128609,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (coh_noc_cid_width) + |vpiParent: + \_hier_path: (proc_param_lp.coh_noc_cid_width), line:6200:41, endln:6200:72 |vpiName:coh_noc_cid_width |vpiLhs: \_parameter: (work@testbench.coh_noc_cid_width_p), line:6200:16, endln:6200:35 @@ -128174,6 +128630,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (coh_noc_len_width) + |vpiParent: + \_hier_path: (proc_param_lp.coh_noc_len_width), line:6201:41, endln:6201:72 |vpiName:coh_noc_len_width |vpiLhs: \_parameter: (work@testbench.coh_noc_len_width_p), line:6201:16, endln:6201:35 @@ -129182,6 +129640,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (async_mem_clk) + |vpiParent: + \_hier_path: (proc_param_lp.async_mem_clk), line:6212:44, endln:6212:71 |vpiName:async_mem_clk |vpiLhs: \_parameter: (work@testbench.async_mem_clk_p), line:6212:16, endln:6212:31 @@ -129201,6 +129661,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (mem_noc_max_credits) + |vpiParent: + \_hier_path: (proc_param_lp.mem_noc_max_credits), line:6213:44, endln:6213:77 |vpiName:mem_noc_max_credits |vpiLhs: \_parameter: (work@testbench.mem_noc_max_credits_p), line:6213:16, endln:6213:37 @@ -129220,6 +129682,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (mem_noc_flit_width) + |vpiParent: + \_hier_path: (proc_param_lp.mem_noc_flit_width), line:6214:44, endln:6214:76 |vpiName:mem_noc_flit_width |vpiLhs: \_parameter: (work@testbench.mem_noc_flit_width_p), line:6214:16, endln:6214:36 @@ -129239,6 +129703,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (mem_noc_cid_width) + |vpiParent: + \_hier_path: (proc_param_lp.mem_noc_cid_width), line:6215:44, endln:6215:75 |vpiName:mem_noc_cid_width |vpiLhs: \_parameter: (work@testbench.mem_noc_cid_width_p), line:6215:16, endln:6215:35 @@ -129258,6 +129724,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (mem_noc_len_width) + |vpiParent: + \_hier_path: (proc_param_lp.mem_noc_len_width), line:6216:44, endln:6216:75 |vpiName:mem_noc_len_width |vpiLhs: \_parameter: (work@testbench.mem_noc_len_width_p), line:6216:16, endln:6216:35 @@ -129931,6 +130399,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (async_io_clk) + |vpiParent: + \_hier_path: (proc_param_lp.async_io_clk), line:6228:43, endln:6228:69 |vpiName:async_io_clk |vpiLhs: \_parameter: (work@testbench.async_io_clk_p), line:6228:16, endln:6228:30 @@ -129950,6 +130420,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (io_noc_max_credits) + |vpiParent: + \_hier_path: (proc_param_lp.io_noc_max_credits), line:6229:43, endln:6229:75 |vpiName:io_noc_max_credits |vpiLhs: \_parameter: (work@testbench.io_noc_max_credits_p), line:6229:16, endln:6229:36 @@ -129969,6 +130441,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (io_noc_did_width) + |vpiParent: + \_hier_path: (proc_param_lp.io_noc_did_width), line:6230:43, endln:6230:73 |vpiName:io_noc_did_width |vpiLhs: \_parameter: (work@testbench.io_noc_did_width_p), line:6230:16, endln:6230:34 @@ -129988,6 +130462,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (io_noc_flit_width) + |vpiParent: + \_hier_path: (proc_param_lp.io_noc_flit_width), line:6231:43, endln:6231:74 |vpiName:io_noc_flit_width |vpiLhs: \_parameter: (work@testbench.io_noc_flit_width_p), line:6231:16, endln:6231:35 @@ -130007,6 +130483,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (io_noc_cid_width) + |vpiParent: + \_hier_path: (proc_param_lp.io_noc_cid_width), line:6232:43, endln:6232:73 |vpiName:io_noc_cid_width |vpiLhs: \_parameter: (work@testbench.io_noc_cid_width_p), line:6232:16, endln:6232:34 @@ -130026,6 +130504,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (io_noc_len_width) + |vpiParent: + \_hier_path: (proc_param_lp.io_noc_len_width), line:6233:43, endln:6233:73 |vpiName:io_noc_len_width |vpiLhs: \_parameter: (work@testbench.io_noc_len_width_p), line:6233:16, endln:6233:34 @@ -130313,6 +130793,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (vaddr_width) + |vpiParent: + \_hier_path: (proc_param_lp.vaddr_width), line:6252:32, endln:6252:57 |vpiName:vaddr_width |vpiOperand: \_constant: , line:6252:60, endln:6252:79 @@ -130345,6 +130827,8 @@ design: (work@testbench) \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiActual: \_ref_obj: (paddr_width) + |vpiParent: + \_hier_path: (proc_param_lp.paddr_width), line:6253:32, endln:6253:57 |vpiName:paddr_width |vpiOperand: \_constant: , line:6253:60, endln:6253:79 diff --git a/tests/BlackParrotMuteErrors/BlackParrotMuteErrors.log b/tests/BlackParrotMuteErrors/BlackParrotMuteErrors.log index c910e5a5fe..f3bd4d6d89 100644 --- a/tests/BlackParrotMuteErrors/BlackParrotMuteErrors.log +++ b/tests/BlackParrotMuteErrors/BlackParrotMuteErrors.log @@ -140046,6 +140046,8 @@ design: (work@otp_ctrl) |vpiName:Info |vpiActual: \_ref_obj: (offset) + |vpiParent: + \_hier_path: (Info.offset), line:786:33, endln:786:44 |vpiName:offset |vpiOperand: \_hier_path: (Info.size), line:786:47, endln:786:56 @@ -140059,6 +140061,8 @@ design: (work@otp_ctrl) |vpiName:Info |vpiActual: \_ref_obj: (size) + |vpiParent: + \_hier_path: (Info.size), line:786:47, endln:786:56 |vpiName:size |vpiOperand: \_operation: , line:786:59, endln:786:77 diff --git a/tests/BlackParrotParam/BlackParrotParam.log b/tests/BlackParrotParam/BlackParrotParam.log index 158e0872ff..a5b6c8caeb 100644 --- a/tests/BlackParrotParam/BlackParrotParam.log +++ b/tests/BlackParrotParam/BlackParrotParam.log @@ -59430,6 +59430,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (num_core) + |vpiParent: + \_hier_path: (proc_param_lp.num_core), line:4381:29, endln:4381:51 |vpiName:num_core |vpiLhs: \_parameter: (work@bp_be_ptw.num_core_p), line:4381:16, endln:4381:26 @@ -59447,6 +59449,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (num_cce) + |vpiParent: + \_hier_path: (proc_param_lp.num_cce), line:4382:29, endln:4382:50 |vpiName:num_cce |vpiLhs: \_parameter: (work@bp_be_ptw.num_cce_p), line:4382:16, endln:4382:25 @@ -59464,6 +59468,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (num_lce) + |vpiParent: + \_hier_path: (proc_param_lp.num_lce), line:4383:29, endln:4383:50 |vpiName:num_lce |vpiLhs: \_parameter: (work@bp_be_ptw.num_lce_p), line:4383:16, endln:4383:25 @@ -59481,6 +59487,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (vaddr_width) + |vpiParent: + \_hier_path: (proc_param_lp.vaddr_width), line:4385:32, endln:4385:57 |vpiName:vaddr_width |vpiLhs: \_parameter: (work@bp_be_ptw.vaddr_width_p), line:4385:16, endln:4385:29 @@ -59498,6 +59506,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (paddr_width) + |vpiParent: + \_hier_path: (proc_param_lp.paddr_width), line:4386:32, endln:4386:57 |vpiName:paddr_width |vpiLhs: \_parameter: (work@bp_be_ptw.paddr_width_p), line:4386:16, endln:4386:29 @@ -59515,6 +59525,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (asid_width) + |vpiParent: + \_hier_path: (proc_param_lp.asid_width), line:4387:32, endln:4387:56 |vpiName:asid_width |vpiLhs: \_parameter: (work@bp_be_ptw.asid_width_p), line:4387:16, endln:4387:28 @@ -59532,6 +59544,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (branch_metadata_fwd_width) + |vpiParent: + \_hier_path: (proc_param_lp.branch_metadata_fwd_width), line:4389:46, endln:4389:85 |vpiName:branch_metadata_fwd_width |vpiLhs: \_parameter: (work@bp_be_ptw.branch_metadata_fwd_width_p), line:4389:16, endln:4389:43 @@ -59549,6 +59563,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (btb_tag_width) + |vpiParent: + \_hier_path: (proc_param_lp.btb_tag_width), line:4390:46, endln:4390:73 |vpiName:btb_tag_width |vpiLhs: \_parameter: (work@bp_be_ptw.btb_tag_width_p), line:4390:16, endln:4390:31 @@ -59566,6 +59582,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (btb_idx_width) + |vpiParent: + \_hier_path: (proc_param_lp.btb_idx_width), line:4391:46, endln:4391:73 |vpiName:btb_idx_width |vpiLhs: \_parameter: (work@bp_be_ptw.btb_idx_width_p), line:4391:16, endln:4391:31 @@ -59583,6 +59601,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (bht_idx_width) + |vpiParent: + \_hier_path: (proc_param_lp.bht_idx_width), line:4392:46, endln:4392:73 |vpiName:bht_idx_width |vpiLhs: \_parameter: (work@bp_be_ptw.bht_idx_width_p), line:4392:16, endln:4392:31 @@ -59600,6 +59620,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (ras_idx_width) + |vpiParent: + \_hier_path: (proc_param_lp.ras_idx_width), line:4393:46, endln:4393:73 |vpiName:ras_idx_width |vpiLhs: \_parameter: (work@bp_be_ptw.ras_idx_width_p), line:4393:16, endln:4393:31 @@ -59617,6 +59639,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (itlb_els) + |vpiParent: + \_hier_path: (proc_param_lp.itlb_els), line:4395:42, endln:4395:64 |vpiName:itlb_els |vpiLhs: \_parameter: (work@bp_be_ptw.itlb_els_p), line:4395:16, endln:4395:26 @@ -59634,6 +59658,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (dtlb_els) + |vpiParent: + \_hier_path: (proc_param_lp.dtlb_els), line:4396:42, endln:4396:64 |vpiName:dtlb_els |vpiLhs: \_parameter: (work@bp_be_ptw.dtlb_els_p), line:4396:16, endln:4396:26 @@ -59651,6 +59677,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (lce_sets) + |vpiParent: + \_hier_path: (proc_param_lp.lce_sets), line:4398:42, endln:4398:64 |vpiName:lce_sets |vpiLhs: \_parameter: (work@bp_be_ptw.lce_sets_p), line:4398:16, endln:4398:26 @@ -59668,6 +59696,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (lce_assoc) + |vpiParent: + \_hier_path: (proc_param_lp.lce_assoc), line:4399:42, endln:4399:65 |vpiName:lce_assoc |vpiLhs: \_parameter: (work@bp_be_ptw.lce_assoc_p), line:4399:16, endln:4399:27 @@ -59685,6 +59715,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (cce_block_width) + |vpiParent: + \_hier_path: (proc_param_lp.cce_block_width), line:4400:42, endln:4400:71 |vpiName:cce_block_width |vpiLhs: \_parameter: (work@bp_be_ptw.cce_block_width_p), line:4400:16, endln:4400:33 @@ -59702,6 +59734,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (num_cce_instr_ram_els) + |vpiParent: + \_hier_path: (proc_param_lp.num_cce_instr_ram_els), line:4401:42, endln:4401:77 |vpiName:num_cce_instr_ram_els |vpiLhs: \_parameter: (work@bp_be_ptw.num_cce_instr_ram_els_p), line:4401:16, endln:4401:39 @@ -59719,6 +59753,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (fe_queue_fifo_els) + |vpiParent: + \_hier_path: (proc_param_lp.fe_queue_fifo_els), line:4403:38, endln:4403:69 |vpiName:fe_queue_fifo_els |vpiLhs: \_parameter: (work@bp_be_ptw.fe_queue_fifo_els_p), line:4403:16, endln:4403:35 @@ -59736,6 +59772,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (fe_cmd_fifo_els) + |vpiParent: + \_hier_path: (proc_param_lp.fe_cmd_fifo_els), line:4404:38, endln:4404:67 |vpiName:fe_cmd_fifo_els |vpiLhs: \_parameter: (work@bp_be_ptw.fe_cmd_fifo_els_p), line:4404:16, endln:4404:33 @@ -59753,6 +59791,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (async_coh_clk) + |vpiParent: + \_hier_path: (proc_param_lp.async_coh_clk), line:4406:41, endln:4406:68 |vpiName:async_coh_clk |vpiLhs: \_parameter: (work@bp_be_ptw.async_coh_clk_p), line:4406:16, endln:4406:31 @@ -59770,6 +59810,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (coh_noc_flit_width) + |vpiParent: + \_hier_path: (proc_param_lp.coh_noc_flit_width), line:4407:41, endln:4407:73 |vpiName:coh_noc_flit_width |vpiLhs: \_parameter: (work@bp_be_ptw.coh_noc_flit_width_p), line:4407:16, endln:4407:36 @@ -59787,6 +59829,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (coh_noc_cid_width) + |vpiParent: + \_hier_path: (proc_param_lp.coh_noc_cid_width), line:4408:41, endln:4408:72 |vpiName:coh_noc_cid_width |vpiLhs: \_parameter: (work@bp_be_ptw.coh_noc_cid_width_p), line:4408:16, endln:4408:35 @@ -59804,6 +59848,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (coh_noc_len_width) + |vpiParent: + \_hier_path: (proc_param_lp.coh_noc_len_width), line:4409:41, endln:4409:72 |vpiName:coh_noc_len_width |vpiLhs: \_parameter: (work@bp_be_ptw.coh_noc_len_width_p), line:4409:16, endln:4409:35 @@ -59821,6 +59867,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (coh_noc_y_cord_width) + |vpiParent: + \_hier_path: (proc_param_lp.coh_noc_y_cord_width), line:4410:41, endln:4410:75 |vpiName:coh_noc_y_cord_width |vpiLhs: \_parameter: (work@bp_be_ptw.coh_noc_y_cord_width_p), line:4410:16, endln:4410:38 @@ -59838,6 +59886,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (coh_noc_x_cord_width) + |vpiParent: + \_hier_path: (proc_param_lp.coh_noc_x_cord_width), line:4411:41, endln:4411:75 |vpiName:coh_noc_x_cord_width |vpiLhs: \_parameter: (work@bp_be_ptw.coh_noc_x_cord_width_p), line:4411:16, endln:4411:38 @@ -59855,6 +59905,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (coh_noc_y_dim) + |vpiParent: + \_hier_path: (proc_param_lp.coh_noc_y_dim), line:4412:41, endln:4412:68 |vpiName:coh_noc_y_dim |vpiLhs: \_parameter: (work@bp_be_ptw.coh_noc_y_dim_p), line:4412:16, endln:4412:31 @@ -59872,6 +59924,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (coh_noc_x_dim) + |vpiParent: + \_hier_path: (proc_param_lp.coh_noc_x_dim), line:4413:41, endln:4413:68 |vpiName:coh_noc_x_dim |vpiLhs: \_parameter: (work@bp_be_ptw.coh_noc_x_dim_p), line:4413:16, endln:4413:31 @@ -59982,6 +60036,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (cfg_core_width) + |vpiParent: + \_hier_path: (proc_param_lp.cfg_core_width), line:4420:35, endln:4420:63 |vpiName:cfg_core_width |vpiLhs: \_parameter: (work@bp_be_ptw.cfg_core_width_p), line:4420:16, endln:4420:32 @@ -59999,6 +60055,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (cfg_addr_width) + |vpiParent: + \_hier_path: (proc_param_lp.cfg_addr_width), line:4421:35, endln:4421:63 |vpiName:cfg_addr_width |vpiLhs: \_parameter: (work@bp_be_ptw.cfg_addr_width_p), line:4421:16, endln:4421:32 @@ -60016,6 +60074,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (cfg_data_width) + |vpiParent: + \_hier_path: (proc_param_lp.cfg_data_width), line:4422:35, endln:4422:63 |vpiName:cfg_data_width |vpiLhs: \_parameter: (work@bp_be_ptw.cfg_data_width_p), line:4422:16, endln:4422:32 @@ -60033,6 +60093,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (async_mem_clk) + |vpiParent: + \_hier_path: (proc_param_lp.async_mem_clk), line:4424:44, endln:4424:71 |vpiName:async_mem_clk |vpiLhs: \_parameter: (work@bp_be_ptw.async_mem_clk_p), line:4424:16, endln:4424:31 @@ -60050,6 +60112,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (mem_noc_max_credits) + |vpiParent: + \_hier_path: (proc_param_lp.mem_noc_max_credits), line:4425:44, endln:4425:77 |vpiName:mem_noc_max_credits |vpiLhs: \_parameter: (work@bp_be_ptw.mem_noc_max_credits_p), line:4425:16, endln:4425:37 @@ -60067,6 +60131,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (mem_noc_flit_width) + |vpiParent: + \_hier_path: (proc_param_lp.mem_noc_flit_width), line:4426:44, endln:4426:76 |vpiName:mem_noc_flit_width |vpiLhs: \_parameter: (work@bp_be_ptw.mem_noc_flit_width_p), line:4426:16, endln:4426:36 @@ -60084,6 +60150,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (mem_noc_reserved_width) + |vpiParent: + \_hier_path: (proc_param_lp.mem_noc_reserved_width), line:4427:44, endln:4427:80 |vpiName:mem_noc_reserved_width |vpiLhs: \_parameter: (work@bp_be_ptw.mem_noc_reserved_width_p), line:4427:16, endln:4427:40 @@ -60101,6 +60169,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (mem_noc_cid_width) + |vpiParent: + \_hier_path: (proc_param_lp.mem_noc_cid_width), line:4428:44, endln:4428:75 |vpiName:mem_noc_cid_width |vpiLhs: \_parameter: (work@bp_be_ptw.mem_noc_cid_width_p), line:4428:16, endln:4428:35 @@ -60118,6 +60188,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (mem_noc_len_width) + |vpiParent: + \_hier_path: (proc_param_lp.mem_noc_len_width), line:4429:44, endln:4429:75 |vpiName:mem_noc_len_width |vpiLhs: \_parameter: (work@bp_be_ptw.mem_noc_len_width_p), line:4429:16, endln:4429:35 @@ -60135,6 +60207,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (mem_noc_y_cord_width) + |vpiParent: + \_hier_path: (proc_param_lp.mem_noc_y_cord_width), line:4430:44, endln:4430:78 |vpiName:mem_noc_y_cord_width |vpiLhs: \_parameter: (work@bp_be_ptw.mem_noc_y_cord_width_p), line:4430:16, endln:4430:38 @@ -60152,6 +60226,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (mem_noc_x_cord_width) + |vpiParent: + \_hier_path: (proc_param_lp.mem_noc_x_cord_width), line:4431:44, endln:4431:78 |vpiName:mem_noc_x_cord_width |vpiLhs: \_parameter: (work@bp_be_ptw.mem_noc_x_cord_width_p), line:4431:16, endln:4431:38 @@ -60169,6 +60245,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (mem_noc_y_dim) + |vpiParent: + \_hier_path: (proc_param_lp.mem_noc_y_dim), line:4432:44, endln:4432:71 |vpiName:mem_noc_y_dim |vpiLhs: \_parameter: (work@bp_be_ptw.mem_noc_y_dim_p), line:4432:16, endln:4432:31 @@ -60186,6 +60264,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (mem_noc_x_dim) + |vpiParent: + \_hier_path: (proc_param_lp.mem_noc_x_dim), line:4433:44, endln:4433:71 |vpiName:mem_noc_x_dim |vpiLhs: \_parameter: (work@bp_be_ptw.mem_noc_x_dim_p), line:4433:16, endln:4433:31 @@ -60414,6 +60494,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (vaddr_width) + |vpiParent: + \_hier_path: (proc_param_lp.vaddr_width), line:4448:32, endln:4448:57 |vpiName:vaddr_width |vpiOperand: \_ref_obj: (page_offset_width_p), line:4448:60, endln:4448:79 @@ -60441,6 +60523,8 @@ design: (work@bp_be_ptw) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (paddr_width) + |vpiParent: + \_hier_path: (proc_param_lp.paddr_width), line:4449:32, endln:4449:57 |vpiName:paddr_width |vpiOperand: \_ref_obj: (page_offset_width_p), line:4449:60, endln:4449:79 @@ -61760,6 +61844,8 @@ design: (work@bp_be_ptw) |vpiName:tlb_w_entry |vpiActual: \_ref_obj: (ptag) + |vpiParent: + \_hier_path: (tlb_w_entry.ptag), line:4625:10, endln:4625:26 |vpiName:ptag |uhdmtopModules: \_module_inst: work@bp_be_ptw (work@bp_be_ptw), file:${SURELOG_DIR}/tests/BlackParrotParam/dut.sv, line:4371:1, endln:4628:10 diff --git a/tests/BlackParrotStructParam/BlackParrotStructParam.log b/tests/BlackParrotStructParam/BlackParrotStructParam.log index 476d94bd7c..11bc81804c 100644 --- a/tests/BlackParrotStructParam/BlackParrotStructParam.log +++ b/tests/BlackParrotStructParam/BlackParrotStructParam.log @@ -2471,6 +2471,8 @@ design: (work@top) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (cc_x_dim) + |vpiParent: + \_hier_path: (proc_param_lp.cc_x_dim), line:58:28, endln:58:50 |vpiName:cc_x_dim |vpiLhs: \_parameter: (work@top.cc_x_dim_p), line:58:14, endln:58:24 diff --git a/tests/BuiltInMethod/BuiltInMethod.log b/tests/BuiltInMethod/BuiltInMethod.log index 5394d45f18..48c56c3dd4 100644 --- a/tests/BuiltInMethod/BuiltInMethod.log +++ b/tests/BuiltInMethod/BuiltInMethod.log @@ -302,6 +302,8 @@ design: (work@top) |vpiName:b |vpiActual: \_ref_obj: (b), line:3:14, endln:3:15 + |vpiParent: + \_hier_path: (b), line:3:14, endln:3:19 |vpiName:b |vpiActual: \_array_var: (work@top.b), line:2:10, endln:2:13 @@ -323,6 +325,8 @@ design: (work@top) |vpiName:b |vpiActual: \_ref_obj: (b), line:4:14, endln:4:15 + |vpiParent: + \_hier_path: (b), line:4:14, endln:4:18 |vpiName:b |vpiActual: \_array_var: (work@top.b), line:2:10, endln:2:13 @@ -344,6 +348,8 @@ design: (work@top) |vpiName:b |vpiActual: \_ref_obj: (b), line:5:14, endln:5:15 + |vpiParent: + \_hier_path: (b), line:5:14, endln:5:19 |vpiName:b |vpiActual: \_array_var: (work@top.b), line:2:10, endln:2:13 @@ -365,6 +371,8 @@ design: (work@top) |vpiName:b |vpiActual: \_ref_obj: (b), line:6:14, endln:6:15 + |vpiParent: + \_hier_path: (b), line:6:14, endln:6:22 |vpiName:b |vpiActual: \_array_var: (work@top.b), line:2:10, endln:2:13 diff --git a/tests/CaseInside/CaseInside.log b/tests/CaseInside/CaseInside.log index b76b7d0ff3..6ea5e5aa44 100644 --- a/tests/CaseInside/CaseInside.log +++ b/tests/CaseInside/CaseInside.log @@ -1162,6 +1162,8 @@ design: (work@dm_csrs) |vpiName:dmi_req_i |vpiActual: \_ref_obj: (addr), line:15:37, endln:15:41 + |vpiParent: + \_hier_path: (dmi_req_i.addr), line:15:27, endln:15:41 |vpiName:addr |vpiCaseItem: \_case_item: , line:17:9, endln:21:12 diff --git a/tests/CastEnum/CastEnum.log b/tests/CastEnum/CastEnum.log index a436d1fa08..909e5ff4e5 100644 --- a/tests/CastEnum/CastEnum.log +++ b/tests/CastEnum/CastEnum.log @@ -1070,6 +1070,8 @@ design: (work@dm_csrs) |vpiName:dmi_req_i |vpiActual: \_ref_obj: (op), line:15:43, endln:15:45 + |vpiParent: + \_hier_path: (dmi_req_i.op), line:15:33, endln:15:45 |vpiName:op |vpiLhs: \_ref_obj: (work@dm_csrs.dtm_op), line:15:10, endln:15:16 diff --git a/tests/CastTypespec/CastTypespec.log b/tests/CastTypespec/CastTypespec.log index f215e1b0e9..a0c6ae1487 100644 --- a/tests/CastTypespec/CastTypespec.log +++ b/tests/CastTypespec/CastTypespec.log @@ -2159,6 +2159,8 @@ design: (work@tlul_adapter_host) |vpiName:dmcontrol_q |vpiActual: \_ref_obj: (resumereq), line:38:32, endln:38:41 + |vpiParent: + \_hier_path: (dmcontrol_q.resumereq), line:38:20, endln:38:41 |vpiName:resumereq |vpiLhs: \_ref_obj: (work@top.p_outmux.resumereq_o), line:38:7, endln:38:18 diff --git a/tests/CastUnsigned/CastUnsigned.log b/tests/CastUnsigned/CastUnsigned.log index 720e13e50f..94654d5548 100644 --- a/tests/CastUnsigned/CastUnsigned.log +++ b/tests/CastUnsigned/CastUnsigned.log @@ -1161,6 +1161,8 @@ design: (work@top) |vpiName:hw2reg |vpiActual: \_ref_obj: (stall) + |vpiParent: + \_hier_path: (hw2reg.stall), line:9:9, endln:9:21 |vpiName:stall |vpiAlwaysType:2 |uhdmtopModules: diff --git a/tests/ClassFsm/ClassFsm.log b/tests/ClassFsm/ClassFsm.log index 4bc2eab21f..e1937599fd 100644 --- a/tests/ClassFsm/ClassFsm.log +++ b/tests/ClassFsm/ClassFsm.log @@ -953,8 +953,11 @@ design: (work@fsm_class) |vpiConstType:9 |vpiName:current_state_transition |vpiPrefix: - \_ref_obj: (P), line:83:5, endln:83:6 + \_ref_obj: (work@fsm_class.P), line:83:5, endln:83:6 + |vpiParent: + \_method_func_call: (current_state_transition), line:83:7, endln:83:31 |vpiName:P + |vpiFullName:work@fsm_class.P |vpiAlwaysType:1 |vpiProcess: \_always: , line:85:3, endln:86:15 @@ -970,8 +973,11 @@ design: (work@fsm_class) \_event_control: , line:85:10, endln:85:12 |vpiName:main_comb |vpiPrefix: - \_ref_obj: (P), line:86:3, endln:86:4 + \_ref_obj: (work@fsm_class.P), line:86:3, endln:86:4 + |vpiParent: + \_method_func_call: (main_comb), line:86:5, endln:86:14 |vpiName:P + |vpiFullName:work@fsm_class.P |vpiAlwaysType:1 |uhdmtopModules: \_module_inst: work@fsm_class (work@fsm_class), file:${SURELOG_DIR}/tests/ClassFsm/dut.sv, line:1:1, endln:87:10 diff --git a/tests/ClassMemberRef/ClassMemberRef.log b/tests/ClassMemberRef/ClassMemberRef.log index 2470643687..7286ffcdc5 100644 --- a/tests/ClassMemberRef/ClassMemberRef.log +++ b/tests/ClassMemberRef/ClassMemberRef.log @@ -453,7 +453,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (printer), line:26:5, endln:26:12 |vpiParent: - \_assignment: , line:26:5, endln:26:18 + \_hier_path: (printer) |vpiName:printer |vpiStmt: \_method_func_call: (set_name_enabled), line:27:9, endln:27:25 @@ -469,8 +469,11 @@ design: (work@top) \_logic_net: (en) |vpiName:set_name_enabled |vpiPrefix: - \_ref_obj: (printer), line:27:1, endln:27:8 + \_ref_obj: (work@top.printer), line:27:1, endln:27:8 + |vpiParent: + \_method_func_call: (set_name_enabled), line:27:9, endln:27:25 |vpiName:printer + |vpiFullName:work@top.printer |uhdmtopModules: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ClassMemberRef/dut.sv, line:22:1, endln:29:10 |vpiName:work@top diff --git a/tests/ClassMethodCall/ClassMethodCall.log b/tests/ClassMethodCall/ClassMethodCall.log index b45b26a666..96121fe62d 100644 --- a/tests/ClassMethodCall/ClassMethodCall.log +++ b/tests/ClassMethodCall/ClassMethodCall.log @@ -495,7 +495,7 @@ design: (work@door_mod) |vpiLhs: \_ref_obj: (open), line:47:9, endln:47:13 |vpiParent: - \_assignment: , line:47:9, endln:47:21 + \_hier_path: (open) |vpiName:open |vpiStmt: \_method_func_call: (door_fsm), line:48:14, endln:48:22 @@ -503,16 +503,22 @@ design: (work@door_mod) \_begin: (work@door_mod), line:46:13, endln:50:8 |vpiName:door_fsm |vpiPrefix: - \_ref_obj: (open), line:48:9, endln:48:13 + \_ref_obj: (work@door_mod.open), line:48:9, endln:48:13 + |vpiParent: + \_method_func_call: (door_fsm), line:48:14, endln:48:22 |vpiName:open + |vpiFullName:work@door_mod.open |vpiStmt: \_method_func_call: (f1), line:49:14, endln:49:16 |vpiParent: \_begin: (work@door_mod), line:46:13, endln:50:8 |vpiName:f1 |vpiPrefix: - \_ref_obj: (open), line:49:9, endln:49:13 + \_ref_obj: (work@door_mod.open), line:49:9, endln:49:13 + |vpiParent: + \_method_func_call: (f1), line:49:14, endln:49:16 |vpiName:open + |vpiFullName:work@door_mod.open |uhdmtopModules: \_module_inst: work@door_mod (work@door_mod), file:${SURELOG_DIR}/tests/ClassMethodCall/dut.sv, line:43:1, endln:51:10 |vpiName:work@door_mod diff --git a/tests/ClassMini/ClassMini.log b/tests/ClassMini/ClassMini.log index f1f2fcf850..d43720c0fe 100644 --- a/tests/ClassMini/ClassMini.log +++ b/tests/ClassMini/ClassMini.log @@ -382,7 +382,7 @@ design: (work@door_mod) |vpiLhs: \_ref_obj: (open), line:24:9, endln:24:13 |vpiParent: - \_assignment: , line:24:9, endln:24:21 + \_hier_path: (open) |vpiName:open |vpiStmt: \_method_func_call: (door_fsm), line:25:14, endln:25:22 @@ -390,8 +390,11 @@ design: (work@door_mod) \_begin: (work@door_mod), line:23:13, endln:26:8 |vpiName:door_fsm |vpiPrefix: - \_ref_obj: (open), line:25:9, endln:25:13 + \_ref_obj: (work@door_mod.open), line:25:9, endln:25:13 + |vpiParent: + \_method_func_call: (door_fsm), line:25:14, endln:25:22 |vpiName:open + |vpiFullName:work@door_mod.open |uhdmtopModules: \_module_inst: work@door_mod (work@door_mod), file:${SURELOG_DIR}/tests/ClassMini/dut.sv, line:21:1, endln:27:10 |vpiName:work@door_mod diff --git a/tests/ClassScope/ClassScope.log b/tests/ClassScope/ClassScope.log index fb19cd03be..d1a28dc7b2 100644 --- a/tests/ClassScope/ClassScope.log +++ b/tests/ClassScope/ClassScope.log @@ -10873,8 +10873,11 @@ design: (work@top) |vpiName:$bits |vpiName:$display |vpiDelay: - \_ref_obj: (DELAY) + \_ref_obj: (work@I.DELAY) + |vpiParent: + \_initial: , line:32:5, endln:33:54 |vpiName:DELAY + |vpiFullName:work@I.DELAY |uhdmallModules: \_module_inst: work@M (work@M), file:${SURELOG_DIR}/tests/ClassScope/dut.sv, line:14:1, endln:23:10 |vpiParent: @@ -11000,8 +11003,11 @@ design: (work@top) |vpiName:$bits |vpiName:$display |vpiDelay: - \_ref_obj: (DELAY) + \_ref_obj: (work@M.DELAY) + |vpiParent: + \_initial: , line:21:5, endln:22:54 |vpiName:DELAY + |vpiFullName:work@M.DELAY |uhdmallModules: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ClassScope/dut.sv, line:36:1, endln:74:10 |vpiParent: diff --git a/tests/ClockingBlock/ClockingBlock.log b/tests/ClockingBlock/ClockingBlock.log index 844c86679b..fce5318ef4 100644 --- a/tests/ClockingBlock/ClockingBlock.log +++ b/tests/ClockingBlock/ClockingBlock.log @@ -1041,6 +1041,8 @@ design: (work@top) |vpiName:top |vpiActual: \_ref_obj: (to), line:14:33, endln:14:35 + |vpiParent: + \_hier_path: (top.to), line:14:29, endln:14:35 |vpiName:to |uhdmtopModules: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ClockingBlock/dut.sv, line:1:1, endln:17:10 diff --git a/tests/ClockingDrive/ClockingDrive.log b/tests/ClockingDrive/ClockingDrive.log index d485d648c1..f34c158fbf 100644 --- a/tests/ClockingDrive/ClockingDrive.log +++ b/tests/ClockingDrive/ClockingDrive.log @@ -508,6 +508,8 @@ design: (work@main) |vpiName:cb |vpiActual: \_ref_obj: (v) + |vpiParent: + \_hier_path: (cb.v), line:10:4, endln:10:8 |vpiName:v |vpiProcess: \_initial: , line:12:1, endln:35:8 @@ -543,6 +545,8 @@ design: (work@main) |vpiName:cb |vpiActual: \_ref_obj: (a) + |vpiParent: + \_hier_path: (cb.a), line:13:5, endln:13:9 |vpiName:a |vpiStmt: \_assignment: , line:14:5, endln:14:17 @@ -561,6 +565,8 @@ design: (work@main) |vpiName:cb |vpiActual: \_ref_obj: (a), line:14:16, endln:14:17 + |vpiParent: + \_hier_path: (cb.a), line:14:13, endln:14:17 |vpiName:a |vpiLhs: \_hier_path: (cb.b), line:14:5, endln:14:9 @@ -574,6 +580,8 @@ design: (work@main) |vpiName:cb |vpiActual: \_ref_obj: (b) + |vpiParent: + \_hier_path: (cb.b), line:14:5, endln:14:9 |vpiName:b |vpiStmt: \_assignment: , line:17:5, endln:17:26 @@ -600,6 +608,8 @@ design: (work@main) |vpiName:bus |vpiActual: \_ref_obj: (data) + |vpiParent: + \_hier_path: (bus.data), line:17:5, endln:17:18 |vpiName:data |vpiStmt: \_delay_control: , line:18:5, endln:18:8 @@ -631,6 +641,8 @@ design: (work@main) |vpiName:bus |vpiActual: \_ref_obj: (data) + |vpiParent: + \_hier_path: (bus.data), line:18:9, endln:18:17 |vpiName:data |vpiStmt: \_delay_control: , line:19:5, endln:19:8 @@ -662,6 +674,8 @@ design: (work@main) |vpiName:bus |vpiActual: \_ref_obj: (data) + |vpiParent: + \_hier_path: (bus.data), line:19:10, endln:19:18 |vpiName:data |vpiStmt: \_assignment: , line:20:5, endln:20:22 @@ -688,6 +702,8 @@ design: (work@main) |vpiName:bus |vpiActual: \_ref_obj: (data) + |vpiParent: + \_hier_path: (bus.data), line:20:5, endln:20:13 |vpiName:data |vpiDelayControl: \_delay_control: , line:20:17, endln:20:20 @@ -719,6 +735,8 @@ design: (work@main) |vpiName:bus |vpiActual: \_ref_obj: (data) + |vpiParent: + \_hier_path: (bus.data), line:22:5, endln:22:13 |vpiName:data |vpiDelayControl: \_delay_control: , line:22:17, endln:22:19 @@ -755,6 +773,8 @@ design: (work@main) |vpiName:cb |vpiActual: \_ref_obj: (v) + |vpiParent: + \_hier_path: (cb.v), line:25:5, endln:25:9 |vpiName:v |vpiStmt: \_assignment: , line:26:5, endln:26:22 @@ -781,6 +801,8 @@ design: (work@main) |vpiName:cb |vpiActual: \_ref_obj: (v) + |vpiParent: + \_hier_path: (cb.v), line:26:5, endln:26:9 |vpiName:v |vpiDelayControl: \_delay_control: , line:26:13, endln:26:16 @@ -817,6 +839,8 @@ design: (work@main) |vpiName:cb |vpiActual: \_ref_obj: (v) + |vpiParent: + \_hier_path: (cb.v), line:27:8, endln:27:12 |vpiName:v |vpiDelayControl: \_delay_control: , line:27:16, endln:27:19 @@ -853,6 +877,8 @@ design: (work@main) |vpiName:cb |vpiActual: \_ref_obj: (a) + |vpiParent: + \_hier_path: (cb.a), line:29:1, endln:29:5 |vpiName:a |vpiStmt: \_event_control: , line:30:1, endln:30:5 @@ -891,6 +917,8 @@ design: (work@main) |vpiName:cb |vpiActual: \_ref_obj: (a) + |vpiParent: + \_hier_path: (cb.a), line:31:1, endln:31:5 |vpiName:a |vpiStmt: \_delay_control: , line:32:1, endln:32:4 @@ -922,6 +950,8 @@ design: (work@main) |vpiName:pe |vpiActual: \_ref_obj: (nibble) + |vpiParent: + \_hier_path: (pe.nibble), line:33:1, endln:33:10 |vpiName:nibble |vpiStmt: \_assignment: , line:34:1, endln:34:21 @@ -948,6 +978,8 @@ design: (work@main) |vpiName:pe |vpiActual: \_ref_obj: (nibble) + |vpiParent: + \_hier_path: (pe.nibble), line:34:1, endln:34:10 |vpiName:nibble |uhdmtopModules: \_module_inst: work@main (work@main), file:${SURELOG_DIR}/tests/ClockingDrive/dut.sv, line:3:1, endln:36:10 diff --git a/tests/ClockingSntx/ClockingSntx.log b/tests/ClockingSntx/ClockingSntx.log index 91576ea9ee..e870782955 100644 --- a/tests/ClockingSntx/ClockingSntx.log +++ b/tests/ClockingSntx/ClockingSntx.log @@ -565,6 +565,8 @@ design: (work@top) \_part_select: , line:3:38, endln:3:47 |vpiParent: \_ref_obj: regB (regB), line:3:38, endln:3:42 + |vpiParent: + \_event_control: , line:2:15, endln:2:23 |vpiName:regB |vpiDefName:regB |vpiConstantSelect:1 @@ -626,6 +628,8 @@ design: (work@top) |vpiName:cpu1 |vpiActual: \_ref_obj: (state), line:15:26, endln:15:31 + |vpiParent: + \_hier_path: (top.cpu1.state), line:15:17, endln:15:31 |vpiName:state |vpiClockingBlock: \_clocking_block: (cd2), line:18:2, endln:21:13 diff --git a/tests/ClogParam/ClogParam.log b/tests/ClogParam/ClogParam.log index 663fec41fc..f093ed84b7 100644 --- a/tests/ClogParam/ClogParam.log +++ b/tests/ClogParam/ClogParam.log @@ -440,6 +440,8 @@ design: (work@top) |vpiName:Info |vpiActual: \_ref_obj: (x) + |vpiParent: + \_hier_path: (Info.x), line:13:37, endln:13:43 |vpiName:x |vpiLhs: \_parameter: (work@top.NumScrmblBlocks), line:13:19, endln:13:34 @@ -572,6 +574,8 @@ design: (work@top) \_parameter: (work@top.Info), line:12:26, endln:12:30 |vpiActual: \_ref_obj: (x) + |vpiParent: + \_hier_path: (Info.x), line:13:37, endln:13:43 |vpiName:x |vpiLhs: \_parameter: (work@top.NumScrmblBlocks), line:13:19, endln:13:34 diff --git a/tests/ConcatOrder/ConcatOrder.log b/tests/ConcatOrder/ConcatOrder.log index 3b5c130bdc..dcd46a8bb0 100644 --- a/tests/ConcatOrder/ConcatOrder.log +++ b/tests/ConcatOrder/ConcatOrder.log @@ -1545,6 +1545,8 @@ design: (work@testbench) |vpiName:proc_param_lp |vpiActual: \_ref_obj: (cce_ucode) + |vpiParent: + \_hier_path: (proc_param_lp.cce_ucode), line:44:47, endln:44:70 |vpiName:cce_ucode |vpiLhs: \_parameter: (work@testbench.cce_ucode_p), line:44:18, endln:44:29 diff --git a/tests/CovMacro/CovMacro.log b/tests/CovMacro/CovMacro.log index 0635b21c2e..1e6949187b 100644 --- a/tests/CovMacro/CovMacro.log +++ b/tests/CovMacro/CovMacro.log @@ -1333,9 +1333,13 @@ design: (work@top) |vpiFullName:work@top.$root.top |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@top.$root.top), line:12:42, endln:12:51 |vpiName:$root |vpiActual: \_ref_obj: (top) + |vpiParent: + \_hier_path: (work@top.$root.top), line:12:42, endln:12:51 |vpiName:top |vpiName:$coverage_control |vpiLhs: @@ -1439,12 +1443,18 @@ design: (work@top) |vpiFullName:work@top.$root.top.unit1 |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@top.$root.top.unit1), line:14:42, endln:14:57 |vpiName:$root |vpiActual: \_ref_obj: (top) + |vpiParent: + \_hier_path: (work@top.$root.top.unit1), line:14:42, endln:14:57 |vpiName:top |vpiActual: \_ref_obj: (unit1) + |vpiParent: + \_hier_path: (work@top.$root.top.unit1), line:14:42, endln:14:57 |vpiName:unit1 |vpiName:$coverage_control |vpiLhs: @@ -1497,12 +1507,18 @@ design: (work@top) |vpiFullName:work@top.$root.top.unit2 |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@top.$root.top.unit2), line:15:43, endln:15:58 |vpiName:$root |vpiActual: \_ref_obj: (top) + |vpiParent: + \_hier_path: (work@top.$root.top.unit2), line:15:43, endln:15:58 |vpiName:top |vpiActual: \_ref_obj: (unit2) + |vpiParent: + \_hier_path: (work@top.$root.top.unit2), line:15:43, endln:15:58 |vpiName:unit2 |vpiName:$coverage_control |vpiLhs: @@ -1641,12 +1657,18 @@ design: (work@top) |vpiFullName:work@top.$root.top.unit1 |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@top.$root.top.unit1), line:18:35, endln:18:50 |vpiName:$root |vpiActual: \_ref_obj: (top) + |vpiParent: + \_hier_path: (work@top.$root.top.unit1), line:18:35, endln:18:50 |vpiName:top |vpiActual: \_ref_obj: (unit1) + |vpiParent: + \_hier_path: (work@top.$root.top.unit1), line:18:35, endln:18:50 |vpiName:unit1 |vpiName:$coverage_get |vpiLhs: diff --git a/tests/DollarRoot/DollarRoot.log b/tests/DollarRoot/DollarRoot.log index 322e26c45c..a781b5a910 100644 --- a/tests/DollarRoot/DollarRoot.log +++ b/tests/DollarRoot/DollarRoot.log @@ -8216,6 +8216,8 @@ design: (work@top) \_io_decl: (cmd), line:225:16, endln:225:19 |vpiActual: \_ref_obj: (addr), line:227:53, endln:227:57 + |vpiParent: + \_hier_path: (cmd.addr), line:227:49, endln:227:57 |vpiName:addr |vpiName:$root.tb.dut.master_0.set_command_address |vpiStmt: @@ -8236,6 +8238,8 @@ design: (work@top) \_io_decl: (cmd), line:225:16, endln:225:19 |vpiActual: \_ref_obj: (burstcount), line:228:57, endln:228:67 + |vpiParent: + \_hier_path: (cmd.burstcount), line:228:53, endln:228:67 |vpiName:burstcount |vpiName:$root.tb.dut.master_0.set_command_burst_count |vpiStmt: @@ -8256,6 +8260,8 @@ design: (work@top) \_io_decl: (cmd), line:225:16, endln:225:19 |vpiActual: \_ref_obj: (burstcount), line:229:56, endln:229:66 + |vpiParent: + \_hier_path: (cmd.burstcount), line:229:52, endln:229:66 |vpiName:burstcount |vpiName:$root.tb.dut.master_0.set_command_burst_size |vpiStmt: @@ -8276,6 +8282,8 @@ design: (work@top) \_io_decl: (cmd), line:225:16, endln:225:19 |vpiActual: \_ref_obj: (cmd_delay), line:230:58, endln:230:67 + |vpiParent: + \_hier_path: (cmd.cmd_delay), line:230:54, endln:230:67 |vpiName:cmd_delay |vpiName:$root.tb.dut.master_0.set_command_init_latency |vpiStmt: @@ -8301,6 +8309,8 @@ design: (work@top) \_io_decl: (cmd), line:225:16, endln:225:19 |vpiActual: \_ref_obj: (trans), line:232:15, endln:232:20 + |vpiParent: + \_hier_path: (cmd.trans), line:232:11, endln:232:20 |vpiName:trans |vpiOperand: \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.WRITE), line:232:24, endln:232:29 @@ -8395,6 +8405,8 @@ design: (work@top) \_io_decl: (cmd), line:225:16, endln:225:19 |vpiActual: \_ref_obj: (burstcount), line:234:34, endln:234:44 + |vpiParent: + \_hier_path: (cmd.burstcount), line:234:30, endln:234:44 |vpiName:burstcount |vpiStmt: \_begin: (work@test_program.configure_and_push_command_to_master_0), line:234:51, endln:238:13 @@ -8640,18 +8652,28 @@ design: (work@top) |vpiFullName:work@test_program.get_read_response_from_master_0.$root.tb.dut.master_0.get_response_burst_size |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@test_program.get_read_response_from_master_0.$root.tb.dut.master_0.get_response_burst_size), line:271:27, endln:271:74 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: (work@test_program.get_read_response_from_master_0.$root.tb.dut.master_0.get_response_burst_size), line:271:27, endln:271:74 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: (work@test_program.get_read_response_from_master_0.$root.tb.dut.master_0.get_response_burst_size), line:271:27, endln:271:74 |vpiName:dut |vpiActual: \_ref_obj: (master_0) + |vpiParent: + \_hier_path: (work@test_program.get_read_response_from_master_0.$root.tb.dut.master_0.get_response_burst_size), line:271:27, endln:271:74 |vpiName:master_0 |vpiActual: \_ref_obj: (get_response_burst_size) + |vpiParent: + \_hier_path: (work@test_program.get_read_response_from_master_0.$root.tb.dut.master_0.get_response_burst_size), line:271:27, endln:271:74 |vpiName:get_response_burst_size |vpiLhs: \_hier_path: (rsp.burstcount), line:271:7, endln:271:21 @@ -8667,6 +8689,8 @@ design: (work@top) \_struct_var: (work@test_program.get_read_response_from_master_0.rsp), line:268:16, endln:268:19 |vpiActual: \_ref_obj: (burstcount) + |vpiParent: + \_hier_path: (rsp.burstcount), line:271:7, endln:271:21 |vpiName:burstcount |vpiStmt: \_for_stmt: (work@test_program.get_read_response_from_master_0), line:272:7, endln:272:10 @@ -8735,6 +8759,8 @@ design: (work@top) \_struct_var: (work@test_program.get_read_response_from_master_0.rsp), line:268:16, endln:268:19 |vpiActual: \_ref_obj: (burstcount), line:272:31, endln:272:41 + |vpiParent: + \_hier_path: (rsp.burstcount), line:272:27, endln:272:41 |vpiName:burstcount |vpiStmt: \_begin: (work@test_program.get_read_response_from_master_0), line:272:48, endln:274:10 @@ -8755,18 +8781,28 @@ design: (work@top) |vpiFullName:work@test_program.get_read_response_from_master_0.$root.tb.dut.master_0.get_response_data |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@test_program.get_read_response_from_master_0.$root.tb.dut.master_0.get_response_data), line:273:27, endln:273:69 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: (work@test_program.get_read_response_from_master_0.$root.tb.dut.master_0.get_response_data), line:273:27, endln:273:69 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: (work@test_program.get_read_response_from_master_0.$root.tb.dut.master_0.get_response_data), line:273:27, endln:273:69 |vpiName:dut |vpiActual: \_ref_obj: (master_0) + |vpiParent: + \_hier_path: (work@test_program.get_read_response_from_master_0.$root.tb.dut.master_0.get_response_data), line:273:27, endln:273:69 |vpiName:master_0 |vpiActual: \_ref_obj: (get_response_data) + |vpiParent: + \_hier_path: (work@test_program.get_read_response_from_master_0.$root.tb.dut.master_0.get_response_data), line:273:27, endln:273:69 |vpiName:get_response_data |vpiLhs: \_hier_path: (rsp.data), line:273:10, endln:273:21 @@ -8860,18 +8896,28 @@ design: (work@top) |vpiFullName:work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_burst_count |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_burst_count), line:314:33, endln:314:79 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_burst_count), line:314:33, endln:314:79 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_burst_count), line:314:33, endln:314:79 |vpiName:dut |vpiActual: \_ref_obj: (slave_0) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_burst_count), line:314:33, endln:314:79 |vpiName:slave_0 |vpiActual: \_ref_obj: (get_command_burst_count) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_burst_count), line:314:33, endln:314:79 |vpiName:get_command_burst_count |vpiLhs: \_hier_path: (cmd.burstcount), line:314:7, endln:314:21 @@ -8887,6 +8933,8 @@ design: (work@top) \_struct_var: (work@test_program.get_command_from_slave_0.cmd), line:311:15, endln:311:18 |vpiActual: \_ref_obj: (burstcount) + |vpiParent: + \_hier_path: (cmd.burstcount), line:314:7, endln:314:21 |vpiName:burstcount |vpiStmt: \_assignment: , line:315:7, endln:315:75 @@ -8902,18 +8950,28 @@ design: (work@top) |vpiFullName:work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_address |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_address), line:315:33, endln:315:75 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_address), line:315:33, endln:315:75 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_address), line:315:33, endln:315:75 |vpiName:dut |vpiActual: \_ref_obj: (slave_0) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_address), line:315:33, endln:315:75 |vpiName:slave_0 |vpiActual: \_ref_obj: (get_command_address) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_address), line:315:33, endln:315:75 |vpiName:get_command_address |vpiLhs: \_hier_path: (cmd.addr), line:315:7, endln:315:15 @@ -8929,6 +8987,8 @@ design: (work@top) \_struct_var: (work@test_program.get_command_from_slave_0.cmd), line:311:15, endln:311:18 |vpiActual: \_ref_obj: (addr) + |vpiParent: + \_hier_path: (cmd.addr), line:315:7, endln:315:15 |vpiName:addr |vpiStmt: \_if_else: , line:317:7, endln:325:10 @@ -8947,18 +9007,28 @@ design: (work@top) |vpiFullName:work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_request |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_request), line:317:11, endln:317:53 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_request), line:317:11, endln:317:53 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_request), line:317:11, endln:317:53 |vpiName:dut |vpiActual: \_ref_obj: (slave_0) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_request), line:317:11, endln:317:53 |vpiName:slave_0 |vpiActual: \_ref_obj: (get_command_request) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_request), line:317:11, endln:317:53 |vpiName:get_command_request |vpiOperand: \_ref_obj: (work@test_program.get_command_from_slave_0.REQ_WRITE), line:317:57, endln:317:66 @@ -9001,6 +9071,8 @@ design: (work@top) \_struct_var: (work@test_program.get_command_from_slave_0.cmd), line:311:15, endln:311:18 |vpiActual: \_ref_obj: (trans) + |vpiParent: + \_hier_path: (cmd.trans), line:318:10, endln:318:19 |vpiName:trans |vpiStmt: \_for_stmt: (work@test_program.get_command_from_slave_0), line:319:10, endln:319:13 @@ -9069,6 +9141,8 @@ design: (work@top) \_struct_var: (work@test_program.get_command_from_slave_0.cmd), line:311:15, endln:311:18 |vpiActual: \_ref_obj: (burstcount), line:319:33, endln:319:43 + |vpiParent: + \_hier_path: (cmd.burstcount), line:319:29, endln:319:43 |vpiName:burstcount |vpiStmt: \_begin: (work@test_program.get_command_from_slave_0), line:319:50, endln:322:13 @@ -9089,18 +9163,28 @@ design: (work@top) |vpiFullName:work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_data |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_data), line:320:32, endln:320:72 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_data), line:320:32, endln:320:72 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_data), line:320:32, endln:320:72 |vpiName:dut |vpiActual: \_ref_obj: (slave_0) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_data), line:320:32, endln:320:72 |vpiName:slave_0 |vpiActual: \_ref_obj: (get_command_data) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_data), line:320:32, endln:320:72 |vpiName:get_command_data |vpiLhs: \_hier_path: (cmd.data), line:320:13, endln:320:24 @@ -9146,18 +9230,28 @@ design: (work@top) |vpiFullName:work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_byte_enable |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_byte_enable), line:321:32, endln:321:79 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_byte_enable), line:321:32, endln:321:79 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_byte_enable), line:321:32, endln:321:79 |vpiName:dut |vpiActual: \_ref_obj: (slave_0) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_byte_enable), line:321:32, endln:321:79 |vpiName:slave_0 |vpiActual: \_ref_obj: (get_command_byte_enable) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_0.$root.tb.dut.slave_0.get_command_byte_enable), line:321:32, endln:321:79 |vpiName:get_command_byte_enable |vpiLhs: \_hier_path: (cmd.byteenable), line:321:13, endln:321:30 @@ -9222,6 +9316,8 @@ design: (work@top) \_struct_var: (work@test_program.get_command_from_slave_0.cmd), line:311:15, endln:311:18 |vpiActual: \_ref_obj: (trans) + |vpiParent: + \_hier_path: (cmd.trans), line:324:10, endln:324:19 |vpiName:trans |vpiStmt: \_return_stmt: , line:327:7, endln:327:13 @@ -9301,6 +9397,8 @@ design: (work@top) \_io_decl: (rsp), line:341:16, endln:341:19 |vpiActual: \_ref_obj: (burstcount), line:347:56, endln:347:66 + |vpiParent: + \_hier_path: (rsp.burstcount), line:347:52, endln:347:66 |vpiName:burstcount |vpiName:$root.tb.dut.slave_0.set_response_burst_size |vpiStmt: @@ -9370,6 +9468,8 @@ design: (work@top) \_io_decl: (rsp), line:341:16, endln:341:19 |vpiActual: \_ref_obj: (burstcount), line:348:31, endln:348:41 + |vpiParent: + \_hier_path: (rsp.burstcount), line:348:27, endln:348:41 |vpiName:burstcount |vpiStmt: \_begin: (work@test_program.configure_and_push_response_to_slave_0), line:348:48, endln:359:10 @@ -9705,6 +9805,8 @@ design: (work@top) \_io_decl: (rsp), line:341:16, endln:341:19 |vpiActual: \_ref_obj: (burstcount), line:361:95, endln:361:105 + |vpiParent: + \_hier_path: (rsp.burstcount), line:361:91, endln:361:105 |vpiName:burstcount |vpiOperand: \_constant: , line:361:108, endln:361:109 @@ -9763,6 +9865,8 @@ design: (work@top) \_io_decl: (cmd), line:368:16, endln:368:19 |vpiActual: \_ref_obj: (addr), line:370:53, endln:370:57 + |vpiParent: + \_hier_path: (cmd.addr), line:370:49, endln:370:57 |vpiName:addr |vpiName:$root.tb.dut.master_1.set_command_address |vpiStmt: @@ -9783,6 +9887,8 @@ design: (work@top) \_io_decl: (cmd), line:368:16, endln:368:19 |vpiActual: \_ref_obj: (burstcount), line:371:57, endln:371:67 + |vpiParent: + \_hier_path: (cmd.burstcount), line:371:53, endln:371:67 |vpiName:burstcount |vpiName:$root.tb.dut.master_1.set_command_burst_count |vpiStmt: @@ -9803,6 +9909,8 @@ design: (work@top) \_io_decl: (cmd), line:368:16, endln:368:19 |vpiActual: \_ref_obj: (burstcount), line:372:56, endln:372:66 + |vpiParent: + \_hier_path: (cmd.burstcount), line:372:52, endln:372:66 |vpiName:burstcount |vpiName:$root.tb.dut.master_1.set_command_burst_size |vpiStmt: @@ -9823,6 +9931,8 @@ design: (work@top) \_io_decl: (cmd), line:368:16, endln:368:19 |vpiActual: \_ref_obj: (cmd_delay), line:373:58, endln:373:67 + |vpiParent: + \_hier_path: (cmd.cmd_delay), line:373:54, endln:373:67 |vpiName:cmd_delay |vpiName:$root.tb.dut.master_1.set_command_init_latency |vpiStmt: @@ -9848,6 +9958,8 @@ design: (work@top) \_io_decl: (cmd), line:368:16, endln:368:19 |vpiActual: \_ref_obj: (trans), line:375:15, endln:375:20 + |vpiParent: + \_hier_path: (cmd.trans), line:375:11, endln:375:20 |vpiName:trans |vpiOperand: \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.WRITE), line:375:24, endln:375:29 @@ -9942,6 +10054,8 @@ design: (work@top) \_io_decl: (cmd), line:368:16, endln:368:19 |vpiActual: \_ref_obj: (burstcount), line:377:34, endln:377:44 + |vpiParent: + \_hier_path: (cmd.burstcount), line:377:30, endln:377:44 |vpiName:burstcount |vpiStmt: \_begin: (work@test_program.configure_and_push_command_to_master_1), line:377:51, endln:381:13 @@ -10187,18 +10301,28 @@ design: (work@top) |vpiFullName:work@test_program.get_read_response_from_master_1.$root.tb.dut.master_1.get_response_burst_size |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@test_program.get_read_response_from_master_1.$root.tb.dut.master_1.get_response_burst_size), line:414:27, endln:414:74 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: (work@test_program.get_read_response_from_master_1.$root.tb.dut.master_1.get_response_burst_size), line:414:27, endln:414:74 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: (work@test_program.get_read_response_from_master_1.$root.tb.dut.master_1.get_response_burst_size), line:414:27, endln:414:74 |vpiName:dut |vpiActual: \_ref_obj: (master_1) + |vpiParent: + \_hier_path: (work@test_program.get_read_response_from_master_1.$root.tb.dut.master_1.get_response_burst_size), line:414:27, endln:414:74 |vpiName:master_1 |vpiActual: \_ref_obj: (get_response_burst_size) + |vpiParent: + \_hier_path: (work@test_program.get_read_response_from_master_1.$root.tb.dut.master_1.get_response_burst_size), line:414:27, endln:414:74 |vpiName:get_response_burst_size |vpiLhs: \_hier_path: (rsp.burstcount), line:414:7, endln:414:21 @@ -10214,6 +10338,8 @@ design: (work@top) \_struct_var: (work@test_program.get_read_response_from_master_1.rsp), line:411:16, endln:411:19 |vpiActual: \_ref_obj: (burstcount) + |vpiParent: + \_hier_path: (rsp.burstcount), line:414:7, endln:414:21 |vpiName:burstcount |vpiStmt: \_for_stmt: (work@test_program.get_read_response_from_master_1), line:415:7, endln:415:10 @@ -10282,6 +10408,8 @@ design: (work@top) \_struct_var: (work@test_program.get_read_response_from_master_1.rsp), line:411:16, endln:411:19 |vpiActual: \_ref_obj: (burstcount), line:415:31, endln:415:41 + |vpiParent: + \_hier_path: (rsp.burstcount), line:415:27, endln:415:41 |vpiName:burstcount |vpiStmt: \_begin: (work@test_program.get_read_response_from_master_1), line:415:48, endln:417:10 @@ -10302,18 +10430,28 @@ design: (work@top) |vpiFullName:work@test_program.get_read_response_from_master_1.$root.tb.dut.master_1.get_response_data |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@test_program.get_read_response_from_master_1.$root.tb.dut.master_1.get_response_data), line:416:27, endln:416:69 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: (work@test_program.get_read_response_from_master_1.$root.tb.dut.master_1.get_response_data), line:416:27, endln:416:69 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: (work@test_program.get_read_response_from_master_1.$root.tb.dut.master_1.get_response_data), line:416:27, endln:416:69 |vpiName:dut |vpiActual: \_ref_obj: (master_1) + |vpiParent: + \_hier_path: (work@test_program.get_read_response_from_master_1.$root.tb.dut.master_1.get_response_data), line:416:27, endln:416:69 |vpiName:master_1 |vpiActual: \_ref_obj: (get_response_data) + |vpiParent: + \_hier_path: (work@test_program.get_read_response_from_master_1.$root.tb.dut.master_1.get_response_data), line:416:27, endln:416:69 |vpiName:get_response_data |vpiLhs: \_hier_path: (rsp.data), line:416:10, endln:416:21 @@ -10407,18 +10545,28 @@ design: (work@top) |vpiFullName:work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_burst_count |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_burst_count), line:457:33, endln:457:79 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_burst_count), line:457:33, endln:457:79 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_burst_count), line:457:33, endln:457:79 |vpiName:dut |vpiActual: \_ref_obj: (slave_1) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_burst_count), line:457:33, endln:457:79 |vpiName:slave_1 |vpiActual: \_ref_obj: (get_command_burst_count) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_burst_count), line:457:33, endln:457:79 |vpiName:get_command_burst_count |vpiLhs: \_hier_path: (cmd.burstcount), line:457:7, endln:457:21 @@ -10434,6 +10582,8 @@ design: (work@top) \_struct_var: (work@test_program.get_command_from_slave_1.cmd), line:454:15, endln:454:18 |vpiActual: \_ref_obj: (burstcount) + |vpiParent: + \_hier_path: (cmd.burstcount), line:457:7, endln:457:21 |vpiName:burstcount |vpiStmt: \_assignment: , line:458:7, endln:458:75 @@ -10449,18 +10599,28 @@ design: (work@top) |vpiFullName:work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_address |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_address), line:458:33, endln:458:75 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_address), line:458:33, endln:458:75 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_address), line:458:33, endln:458:75 |vpiName:dut |vpiActual: \_ref_obj: (slave_1) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_address), line:458:33, endln:458:75 |vpiName:slave_1 |vpiActual: \_ref_obj: (get_command_address) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_address), line:458:33, endln:458:75 |vpiName:get_command_address |vpiLhs: \_hier_path: (cmd.addr), line:458:7, endln:458:15 @@ -10476,6 +10636,8 @@ design: (work@top) \_struct_var: (work@test_program.get_command_from_slave_1.cmd), line:454:15, endln:454:18 |vpiActual: \_ref_obj: (addr) + |vpiParent: + \_hier_path: (cmd.addr), line:458:7, endln:458:15 |vpiName:addr |vpiStmt: \_if_else: , line:460:7, endln:468:10 @@ -10494,18 +10656,28 @@ design: (work@top) |vpiFullName:work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_request |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_request), line:460:11, endln:460:53 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_request), line:460:11, endln:460:53 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_request), line:460:11, endln:460:53 |vpiName:dut |vpiActual: \_ref_obj: (slave_1) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_request), line:460:11, endln:460:53 |vpiName:slave_1 |vpiActual: \_ref_obj: (get_command_request) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_request), line:460:11, endln:460:53 |vpiName:get_command_request |vpiOperand: \_ref_obj: (work@test_program.get_command_from_slave_1.REQ_WRITE), line:460:57, endln:460:66 @@ -10548,6 +10720,8 @@ design: (work@top) \_struct_var: (work@test_program.get_command_from_slave_1.cmd), line:454:15, endln:454:18 |vpiActual: \_ref_obj: (trans) + |vpiParent: + \_hier_path: (cmd.trans), line:461:10, endln:461:19 |vpiName:trans |vpiStmt: \_for_stmt: (work@test_program.get_command_from_slave_1), line:462:10, endln:462:13 @@ -10616,6 +10790,8 @@ design: (work@top) \_struct_var: (work@test_program.get_command_from_slave_1.cmd), line:454:15, endln:454:18 |vpiActual: \_ref_obj: (burstcount), line:462:33, endln:462:43 + |vpiParent: + \_hier_path: (cmd.burstcount), line:462:29, endln:462:43 |vpiName:burstcount |vpiStmt: \_begin: (work@test_program.get_command_from_slave_1), line:462:50, endln:465:13 @@ -10636,18 +10812,28 @@ design: (work@top) |vpiFullName:work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_data |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_data), line:463:32, endln:463:72 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_data), line:463:32, endln:463:72 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_data), line:463:32, endln:463:72 |vpiName:dut |vpiActual: \_ref_obj: (slave_1) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_data), line:463:32, endln:463:72 |vpiName:slave_1 |vpiActual: \_ref_obj: (get_command_data) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_data), line:463:32, endln:463:72 |vpiName:get_command_data |vpiLhs: \_hier_path: (cmd.data), line:463:13, endln:463:24 @@ -10693,18 +10879,28 @@ design: (work@top) |vpiFullName:work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_byte_enable |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_byte_enable), line:464:32, endln:464:79 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_byte_enable), line:464:32, endln:464:79 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_byte_enable), line:464:32, endln:464:79 |vpiName:dut |vpiActual: \_ref_obj: (slave_1) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_byte_enable), line:464:32, endln:464:79 |vpiName:slave_1 |vpiActual: \_ref_obj: (get_command_byte_enable) + |vpiParent: + \_hier_path: (work@test_program.get_command_from_slave_1.$root.tb.dut.slave_1.get_command_byte_enable), line:464:32, endln:464:79 |vpiName:get_command_byte_enable |vpiLhs: \_hier_path: (cmd.byteenable), line:464:13, endln:464:30 @@ -10769,6 +10965,8 @@ design: (work@top) \_struct_var: (work@test_program.get_command_from_slave_1.cmd), line:454:15, endln:454:18 |vpiActual: \_ref_obj: (trans) + |vpiParent: + \_hier_path: (cmd.trans), line:467:10, endln:467:19 |vpiName:trans |vpiStmt: \_return_stmt: , line:470:7, endln:470:13 @@ -10848,6 +11046,8 @@ design: (work@top) \_io_decl: (rsp), line:484:16, endln:484:19 |vpiActual: \_ref_obj: (burstcount), line:490:56, endln:490:66 + |vpiParent: + \_hier_path: (rsp.burstcount), line:490:52, endln:490:66 |vpiName:burstcount |vpiName:$root.tb.dut.slave_1.set_response_burst_size |vpiStmt: @@ -10917,6 +11117,8 @@ design: (work@top) \_io_decl: (rsp), line:484:16, endln:484:19 |vpiActual: \_ref_obj: (burstcount), line:491:31, endln:491:41 + |vpiParent: + \_hier_path: (rsp.burstcount), line:491:27, endln:491:41 |vpiName:burstcount |vpiStmt: \_begin: (work@test_program.configure_and_push_response_to_slave_1), line:491:48, endln:502:10 @@ -11252,6 +11454,8 @@ design: (work@top) \_io_decl: (rsp), line:484:16, endln:484:19 |vpiActual: \_ref_obj: (burstcount), line:504:95, endln:504:105 + |vpiParent: + \_hier_path: (rsp.burstcount), line:504:91, endln:504:105 |vpiName:burstcount |vpiOperand: \_constant: , line:504:108, endln:504:109 @@ -11704,6 +11908,8 @@ design: (work@top) \_struct_var: (work@test_program.create_command.cmd), line:576:15, endln:576:18 |vpiActual: \_ref_obj: (burstcount) + |vpiParent: + \_hier_path: (cmd.burstcount), line:579:10, endln:579:24 |vpiName:burstcount |vpiElseStmt: \_begin: (work@test_program.create_command), line:580:16, endln:582:10 @@ -11738,6 +11944,8 @@ design: (work@top) \_struct_var: (work@test_program.create_command.cmd), line:576:15, endln:576:18 |vpiActual: \_ref_obj: (burstcount) + |vpiParent: + \_hier_path: (cmd.burstcount), line:581:10, endln:581:24 |vpiName:burstcount |vpiStmt: \_assignment: , line:584:7, endln:584:41 @@ -11767,6 +11975,8 @@ design: (work@top) \_struct_var: (work@test_program.create_command.cmd), line:576:15, endln:576:18 |vpiActual: \_ref_obj: (trans) + |vpiParent: + \_hier_path: (cmd.trans), line:584:7, endln:584:16 |vpiName:trans |vpiActual: \_io_decl: (trans), line:571:22, endln:571:27 @@ -11805,6 +12015,8 @@ design: (work@top) \_struct_var: (work@test_program.create_command.cmd), line:576:15, endln:576:18 |vpiActual: \_ref_obj: (addr) + |vpiParent: + \_hier_path: (cmd.addr), line:585:7, endln:585:15 |vpiName:addr |vpiStmt: \_assignment: , line:586:7, endln:586:71 @@ -11845,6 +12057,8 @@ design: (work@top) \_struct_var: (work@test_program.create_command.cmd), line:576:15, endln:576:18 |vpiActual: \_ref_obj: (cmd_delay) + |vpiParent: + \_hier_path: (cmd.cmd_delay), line:586:7, endln:586:20 |vpiName:cmd_delay |vpiStmt: \_if_else: , line:588:7, endln:596:10 @@ -11943,6 +12157,8 @@ design: (work@top) \_struct_var: (work@test_program.create_command.cmd), line:576:15, endln:576:18 |vpiActual: \_ref_obj: (burstcount), line:589:34, endln:589:44 + |vpiParent: + \_hier_path: (cmd.burstcount), line:589:30, endln:589:44 |vpiName:burstcount |vpiStmt: \_begin: (work@test_program.create_command), line:589:51, endln:593:13 @@ -12731,6 +12947,8 @@ design: (work@top) \_io_decl: (cmd), line:632:16, endln:632:19 |vpiActual: \_ref_obj: (trans), line:636:18, endln:636:23 + |vpiParent: + \_hier_path: (cmd.trans), line:636:14, endln:636:23 |vpiName:trans |vpiOperand: \_ref_obj: (work@test_program.save_command_master.WRITE), line:636:27, endln:636:32 @@ -12759,8 +12977,11 @@ design: (work@top) \_io_decl: (cmd), line:632:16, endln:632:19 |vpiName:push_back |vpiPrefix: - \_ref_obj: (write_command_queue_master), line:637:13, endln:637:39 + \_ref_obj: (work@test_program.save_command_master.write_command_queue_master), line:637:13, endln:637:39 + |vpiParent: + \_method_func_call: (push_back), line:637:51, endln:637:60 |vpiName:write_command_queue_master + |vpiFullName:work@test_program.save_command_master.write_command_queue_master |vpiElseStmt: \_begin: (work@test_program.save_command_master), line:638:19, endln:640:13 |vpiParent: @@ -12780,8 +13001,11 @@ design: (work@top) \_io_decl: (cmd), line:632:16, endln:632:19 |vpiName:push_back |vpiPrefix: - \_ref_obj: (read_command_queue_master), line:639:13, endln:639:38 + \_ref_obj: (work@test_program.save_command_master.read_command_queue_master), line:639:13, endln:639:38 + |vpiParent: + \_method_func_call: (push_back), line:639:50, endln:639:59 |vpiName:read_command_queue_master + |vpiFullName:work@test_program.save_command_master.read_command_queue_master |vpiInstance: \_module_inst: work@test_program (work@test_program), file:${SURELOG_DIR}/tests/DollarRoot/dut.sv, line:5:1, endln:797:10 |vpiTaskFunc: @@ -12836,6 +13060,8 @@ design: (work@top) \_io_decl: (cmd), line:645:16, endln:645:19 |vpiActual: \_ref_obj: (addr), line:649:56, endln:649:60 + |vpiParent: + \_hier_path: (cmd.addr), line:649:52, endln:649:60 |vpiName:addr |vpiName:translate_master_to_slave_address |vpiFunction: @@ -12854,6 +13080,8 @@ design: (work@top) \_io_decl: (cmd), line:645:16, endln:645:19 |vpiActual: \_ref_obj: (addr) + |vpiParent: + \_hier_path: (cmd.addr), line:649:7, endln:649:15 |vpiName:addr |vpiStmt: \_if_else: , line:650:7, endln:654:10 @@ -12878,6 +13106,8 @@ design: (work@top) \_io_decl: (cmd), line:645:16, endln:645:19 |vpiActual: \_ref_obj: (trans), line:650:15, endln:650:20 + |vpiParent: + \_hier_path: (cmd.trans), line:650:11, endln:650:20 |vpiName:trans |vpiOperand: \_ref_obj: (work@test_program.save_command_slave.WRITE), line:650:24, endln:650:29 @@ -12906,8 +13136,11 @@ design: (work@top) \_io_decl: (cmd), line:645:16, endln:645:19 |vpiName:push_back |vpiPrefix: - \_ref_obj: (write_command_queue_slave), line:651:10, endln:651:35 + \_ref_obj: (work@test_program.save_command_slave.write_command_queue_slave), line:651:10, endln:651:35 + |vpiParent: + \_method_func_call: (push_back), line:651:46, endln:651:55 |vpiName:write_command_queue_slave + |vpiFullName:work@test_program.save_command_slave.write_command_queue_slave |vpiElseStmt: \_begin: (work@test_program.save_command_slave), line:652:16, endln:654:10 |vpiParent: @@ -12927,8 +13160,11 @@ design: (work@top) \_io_decl: (cmd), line:645:16, endln:645:19 |vpiName:push_back |vpiPrefix: - \_ref_obj: (read_command_queue_slave), line:653:10, endln:653:34 + \_ref_obj: (work@test_program.save_command_slave.read_command_queue_slave), line:653:10, endln:653:34 + |vpiParent: + \_method_func_call: (push_back), line:653:45, endln:653:54 |vpiName:read_command_queue_slave + |vpiFullName:work@test_program.save_command_slave.read_command_queue_slave |vpiInstance: \_module_inst: work@test_program (work@test_program), file:${SURELOG_DIR}/tests/DollarRoot/dut.sv, line:5:1, endln:797:10 |vpiTaskFunc: @@ -13438,6 +13674,8 @@ design: (work@top) \_io_decl: (cmd), line:683:15, endln:683:18 |vpiActual: \_ref_obj: (trans), line:690:15, endln:690:20 + |vpiParent: + \_hier_path: (cmd.trans), line:690:11, endln:690:20 |vpiName:trans |vpiOperand: \_ref_obj: (work@test_program.get_expected_command_for_slave.WRITE), line:690:24, endln:690:29 @@ -13573,6 +13811,8 @@ design: (work@top) \_struct_var: (work@test_program.get_expected_command_for_slave.exp_cmd), line:687:15, endln:687:22 |vpiActual: \_ref_obj: (addr), line:693:25, endln:693:29 + |vpiParent: + \_hier_path: (exp_cmd.addr), line:693:17, endln:693:29 |vpiName:addr |vpiOperand: \_hier_path: (cmd.addr), line:693:33, endln:693:41 @@ -13588,6 +13828,8 @@ design: (work@top) \_io_decl: (cmd), line:683:15, endln:683:18 |vpiActual: \_ref_obj: (addr), line:693:37, endln:693:41 + |vpiParent: + \_hier_path: (cmd.addr), line:693:33, endln:693:41 |vpiName:addr |vpiStmt: \_begin: (work@test_program.get_expected_command_for_slave), line:693:43, endln:697:16 @@ -13608,8 +13850,11 @@ design: (work@top) \_int_var: (i), line:691:54, endln:691:55 |vpiName:delete |vpiPrefix: - \_ref_obj: (write_command_queue_slave), line:694:16, endln:694:41 + \_ref_obj: (work@test_program.get_expected_command_for_slave.write_command_queue_slave), line:694:16, endln:694:41 + |vpiParent: + \_method_func_call: (delete), line:694:52, endln:694:58 |vpiName:write_command_queue_slave + |vpiFullName:work@test_program.get_expected_command_for_slave.write_command_queue_slave |vpiStmt: \_assignment: , line:695:16, endln:695:25 |vpiParent: @@ -13831,6 +14076,8 @@ design: (work@top) \_struct_var: (work@test_program.get_expected_command_for_slave.exp_cmd), line:687:15, endln:687:22 |vpiActual: \_ref_obj: (addr), line:705:25, endln:705:29 + |vpiParent: + \_hier_path: (exp_cmd.addr), line:705:17, endln:705:29 |vpiName:addr |vpiOperand: \_hier_path: (cmd.addr), line:705:33, endln:705:41 @@ -13846,6 +14093,8 @@ design: (work@top) \_io_decl: (cmd), line:683:15, endln:683:18 |vpiActual: \_ref_obj: (addr), line:705:37, endln:705:41 + |vpiParent: + \_hier_path: (cmd.addr), line:705:33, endln:705:41 |vpiName:addr |vpiStmt: \_begin: (work@test_program.get_expected_command_for_slave), line:705:43, endln:709:16 @@ -13866,8 +14115,11 @@ design: (work@top) \_int_var: (i), line:703:53, endln:703:54 |vpiName:delete |vpiPrefix: - \_ref_obj: (read_command_queue_slave), line:706:16, endln:706:40 + \_ref_obj: (work@test_program.get_expected_command_for_slave.read_command_queue_slave), line:706:16, endln:706:40 + |vpiParent: + \_method_func_call: (delete), line:706:51, endln:706:57 |vpiName:read_command_queue_slave + |vpiFullName:work@test_program.get_expected_command_for_slave.read_command_queue_slave |vpiStmt: \_assignment: , line:707:16, endln:707:25 |vpiParent: @@ -14030,6 +14282,8 @@ design: (work@top) \_io_decl: (exp_cmd), line:720:27, endln:720:34 |vpiActual: \_ref_obj: (addr), line:723:46, endln:723:50 + |vpiParent: + \_hier_path: (exp_cmd.addr), line:723:38, endln:723:50 |vpiName:addr |vpiArgument: \_hier_path: (actual_cmd.addr), line:723:52, endln:723:67 @@ -14045,6 +14299,8 @@ design: (work@top) \_io_decl: (actual_cmd), line:720:15, endln:720:25 |vpiActual: \_ref_obj: (addr), line:723:63, endln:723:67 + |vpiParent: + \_hier_path: (actual_cmd.addr), line:723:52, endln:723:67 |vpiName:addr |vpiName:assert_equals |vpiTask: @@ -14075,6 +14331,8 @@ design: (work@top) \_io_decl: (exp_cmd), line:720:27, endln:720:34 |vpiActual: \_ref_obj: (burstcount), line:724:49, endln:724:59 + |vpiParent: + \_hier_path: (exp_cmd.burstcount), line:724:41, endln:724:59 |vpiName:burstcount |vpiArgument: \_hier_path: (actual_cmd.burstcount), line:724:61, endln:724:82 @@ -14090,6 +14348,8 @@ design: (work@top) \_io_decl: (actual_cmd), line:720:15, endln:720:25 |vpiActual: \_ref_obj: (burstcount), line:724:72, endln:724:82 + |vpiParent: + \_hier_path: (actual_cmd.burstcount), line:724:61, endln:724:82 |vpiName:burstcount |vpiName:assert_equals |vpiTask: @@ -14117,6 +14377,8 @@ design: (work@top) \_io_decl: (actual_cmd), line:720:15, endln:720:25 |vpiActual: \_ref_obj: (trans), line:726:22, endln:726:27 + |vpiParent: + \_hier_path: (actual_cmd.trans), line:726:11, endln:726:27 |vpiName:trans |vpiOperand: \_ref_obj: (work@test_program.verify_command.WRITE), line:726:31, endln:726:36 @@ -14198,6 +14460,8 @@ design: (work@top) \_io_decl: (actual_cmd), line:720:15, endln:720:25 |vpiActual: \_ref_obj: (burstcount), line:727:41, endln:727:51 + |vpiParent: + \_hier_path: (actual_cmd.burstcount), line:727:30, endln:727:51 |vpiName:burstcount |vpiStmt: \_begin: (work@test_program.verify_command), line:727:58, endln:730:13 @@ -14666,6 +14930,8 @@ design: (work@top) \_struct_var: (work@test_program.create_response.rsp), line:763:16, endln:763:19 |vpiActual: \_ref_obj: (burstcount) + |vpiParent: + \_hier_path: (rsp.burstcount), line:765:7, endln:765:21 |vpiName:burstcount |vpiActual: \_io_decl: (burstcount), line:760:18, endln:760:28 @@ -14915,6 +15181,8 @@ design: (work@top) \_io_decl: (cmd), line:775:15, endln:775:18 |vpiActual: \_ref_obj: (addr), line:779:31, endln:779:35 + |vpiParent: + \_hier_path: (cmd.addr), line:779:27, endln:779:35 |vpiName:addr |vpiOperand: \_ref_obj: (work@test_program.get_expected_read_response.SLAVE_SPAN), line:779:38, endln:779:48 @@ -15030,6 +15298,8 @@ design: (work@top) \_io_decl: (exp_rsp), line:787:28, endln:787:35 |vpiActual: \_ref_obj: (burstcount), line:790:49, endln:790:59 + |vpiParent: + \_hier_path: (exp_rsp.burstcount), line:790:41, endln:790:59 |vpiName:burstcount |vpiArgument: \_hier_path: (actual_rsp.burstcount), line:790:61, endln:790:82 @@ -15045,6 +15315,8 @@ design: (work@top) \_io_decl: (actual_rsp), line:787:16, endln:787:26 |vpiActual: \_ref_obj: (burstcount), line:790:72, endln:790:82 + |vpiParent: + \_hier_path: (actual_rsp.burstcount), line:790:61, endln:790:82 |vpiName:burstcount |vpiName:assert_equals |vpiTask: @@ -15116,6 +15388,8 @@ design: (work@top) \_io_decl: (actual_rsp), line:787:16, endln:787:26 |vpiActual: \_ref_obj: (burstcount), line:791:38, endln:791:48 + |vpiParent: + \_hier_path: (actual_rsp.burstcount), line:791:27, endln:791:48 |vpiName:burstcount |vpiStmt: \_begin: (work@test_program.verify_response), line:791:55, endln:793:10 @@ -15267,18 +15541,28 @@ design: (work@top) |vpiFullName:work@test_program.$root.tb.dut.master_0.signal_read_response_complete |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.master_0.signal_read_response_complete), line:249:13, endln:249:64 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.master_0.signal_read_response_complete), line:249:13, endln:249:64 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.master_0.signal_read_response_complete), line:249:13, endln:249:64 |vpiName:dut |vpiActual: \_ref_obj: (master_0) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.master_0.signal_read_response_complete), line:249:13, endln:249:64 |vpiName:master_0 |vpiActual: \_ref_obj: (signal_read_response_complete) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.master_0.signal_read_response_complete), line:249:13, endln:249:64 |vpiName:signal_read_response_complete |vpiStmt: \_begin: (work@test_program), line:249:66, endln:258:7 @@ -15436,18 +15720,28 @@ design: (work@top) |vpiFullName:work@test_program.$root.tb.dut.master_0.signal_write_response_complete |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.master_0.signal_write_response_complete), line:261:13, endln:261:65 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.master_0.signal_write_response_complete), line:261:13, endln:261:65 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.master_0.signal_write_response_complete), line:261:13, endln:261:65 |vpiName:dut |vpiActual: \_ref_obj: (master_0) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.master_0.signal_write_response_complete), line:261:13, endln:261:65 |vpiName:master_0 |vpiActual: \_ref_obj: (signal_write_response_complete) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.master_0.signal_write_response_complete), line:261:13, endln:261:65 |vpiName:signal_write_response_complete |vpiStmt: \_begin: (work@test_program), line:261:67, endln:263:7 @@ -15476,18 +15770,28 @@ design: (work@top) |vpiFullName:work@test_program.$root.tb.dut.slave_0.signal_command_received |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.slave_0.signal_command_received), line:282:13, endln:282:57 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.slave_0.signal_command_received), line:282:13, endln:282:57 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.slave_0.signal_command_received), line:282:13, endln:282:57 |vpiName:dut |vpiActual: \_ref_obj: (slave_0) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.slave_0.signal_command_received), line:282:13, endln:282:57 |vpiName:slave_0 |vpiActual: \_ref_obj: (signal_command_received) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.slave_0.signal_command_received), line:282:13, endln:282:57 |vpiName:signal_command_received |vpiStmt: \_begin: (work@test_program), line:282:59, endln:305:7 @@ -15751,6 +16055,8 @@ design: (work@top) \_struct_var: (work@test_program.actual_cmd), line:284:19, endln:284:29 |vpiActual: \_ref_obj: (trans), line:300:22, endln:300:27 + |vpiParent: + \_hier_path: (actual_cmd.trans), line:300:11, endln:300:27 |vpiName:trans |vpiOperand: \_ref_obj: (work@test_program.READ), line:300:31, endln:300:35 @@ -15789,6 +16095,8 @@ design: (work@top) \_struct_var: (work@test_program.actual_cmd), line:284:19, endln:284:29 |vpiActual: \_ref_obj: (burstcount), line:301:43, endln:301:53 + |vpiParent: + \_hier_path: (actual_cmd.burstcount), line:301:32, endln:301:53 |vpiName:burstcount |vpiName:create_response |vpiFunction: @@ -15830,8 +16138,11 @@ design: (work@top) \_struct_var: (work@test_program.rsp), line:285:19, endln:285:22 |vpiName:push_back |vpiPrefix: - \_ref_obj: (read_response_queue_slave), line:303:10, endln:303:35 + \_ref_obj: (work@test_program.read_response_queue_slave), line:303:10, endln:303:35 + |vpiParent: + \_method_func_call: (push_back), line:303:39, endln:303:48 |vpiName:read_response_queue_slave + |vpiFullName:work@test_program.read_response_queue_slave |vpiAlwaysType:1 |vpiProcess: \_always: , line:333:4, endln:337:7 @@ -15851,15 +16162,23 @@ design: (work@top) |vpiName:$root.tb.dut.clk_clk |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: ($root.tb.dut.clk_clk), line:333:21, endln:333:41 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: ($root.tb.dut.clk_clk), line:333:21, endln:333:41 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: ($root.tb.dut.clk_clk), line:333:21, endln:333:41 |vpiName:dut |vpiActual: \_ref_obj: (clk_clk) + |vpiParent: + \_hier_path: ($root.tb.dut.clk_clk), line:333:21, endln:333:41 |vpiName:clk_clk |vpiStmt: \_begin: (work@test_program), line:333:43, endln:337:7 @@ -15926,18 +16245,28 @@ design: (work@top) |vpiFullName:work@test_program.$root.tb.dut.master_1.signal_read_response_complete |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.master_1.signal_read_response_complete), line:392:13, endln:392:64 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.master_1.signal_read_response_complete), line:392:13, endln:392:64 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.master_1.signal_read_response_complete), line:392:13, endln:392:64 |vpiName:dut |vpiActual: \_ref_obj: (master_1) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.master_1.signal_read_response_complete), line:392:13, endln:392:64 |vpiName:master_1 |vpiActual: \_ref_obj: (signal_read_response_complete) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.master_1.signal_read_response_complete), line:392:13, endln:392:64 |vpiName:signal_read_response_complete |vpiStmt: \_begin: (work@test_program), line:392:66, endln:401:7 @@ -16095,18 +16424,28 @@ design: (work@top) |vpiFullName:work@test_program.$root.tb.dut.master_1.signal_write_response_complete |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.master_1.signal_write_response_complete), line:404:13, endln:404:65 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.master_1.signal_write_response_complete), line:404:13, endln:404:65 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.master_1.signal_write_response_complete), line:404:13, endln:404:65 |vpiName:dut |vpiActual: \_ref_obj: (master_1) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.master_1.signal_write_response_complete), line:404:13, endln:404:65 |vpiName:master_1 |vpiActual: \_ref_obj: (signal_write_response_complete) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.master_1.signal_write_response_complete), line:404:13, endln:404:65 |vpiName:signal_write_response_complete |vpiStmt: \_begin: (work@test_program), line:404:67, endln:406:7 @@ -16135,18 +16474,28 @@ design: (work@top) |vpiFullName:work@test_program.$root.tb.dut.slave_1.signal_command_received |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.slave_1.signal_command_received), line:425:13, endln:425:57 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.slave_1.signal_command_received), line:425:13, endln:425:57 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.slave_1.signal_command_received), line:425:13, endln:425:57 |vpiName:dut |vpiActual: \_ref_obj: (slave_1) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.slave_1.signal_command_received), line:425:13, endln:425:57 |vpiName:slave_1 |vpiActual: \_ref_obj: (signal_command_received) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.slave_1.signal_command_received), line:425:13, endln:425:57 |vpiName:signal_command_received |vpiStmt: \_begin: (work@test_program), line:425:59, endln:448:7 @@ -16410,6 +16759,8 @@ design: (work@top) \_struct_var: (work@test_program.actual_cmd), line:427:19, endln:427:29 |vpiActual: \_ref_obj: (trans), line:443:22, endln:443:27 + |vpiParent: + \_hier_path: (actual_cmd.trans), line:443:11, endln:443:27 |vpiName:trans |vpiOperand: \_ref_obj: (work@test_program.READ), line:443:31, endln:443:35 @@ -16448,6 +16799,8 @@ design: (work@top) \_struct_var: (work@test_program.actual_cmd), line:427:19, endln:427:29 |vpiActual: \_ref_obj: (burstcount), line:444:43, endln:444:53 + |vpiParent: + \_hier_path: (actual_cmd.burstcount), line:444:32, endln:444:53 |vpiName:burstcount |vpiName:create_response |vpiFunction: @@ -16489,8 +16842,11 @@ design: (work@top) \_struct_var: (work@test_program.rsp), line:428:19, endln:428:22 |vpiName:push_back |vpiPrefix: - \_ref_obj: (read_response_queue_slave), line:446:10, endln:446:35 + \_ref_obj: (work@test_program.read_response_queue_slave), line:446:10, endln:446:35 + |vpiParent: + \_method_func_call: (push_back), line:446:39, endln:446:48 |vpiName:read_response_queue_slave + |vpiFullName:work@test_program.read_response_queue_slave |vpiAlwaysType:1 |vpiProcess: \_always: , line:476:4, endln:480:7 @@ -16510,15 +16866,23 @@ design: (work@top) |vpiName:$root.tb.dut.clk_clk |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: ($root.tb.dut.clk_clk), line:476:21, endln:476:41 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: ($root.tb.dut.clk_clk), line:476:21, endln:476:41 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: ($root.tb.dut.clk_clk), line:476:21, endln:476:41 |vpiName:dut |vpiActual: \_ref_obj: (clk_clk) + |vpiParent: + \_hier_path: ($root.tb.dut.clk_clk), line:476:21, endln:476:41 |vpiName:clk_clk |vpiStmt: \_begin: (work@test_program), line:476:43, endln:480:7 @@ -16608,15 +16972,23 @@ design: (work@top) |vpiFullName:work@test_program.$root.tb.dut.reset_reset_n |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.reset_reset_n), line:526:13, endln:526:39 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.reset_reset_n), line:526:13, endln:526:39 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.reset_reset_n), line:526:13, endln:526:39 |vpiName:dut |vpiActual: \_ref_obj: (reset_reset_n) + |vpiParent: + \_hier_path: (work@test_program.$root.tb.dut.reset_reset_n), line:526:13, endln:526:39 |vpiName:reset_reset_n |vpiOperand: \_constant: , line:526:43, endln:526:44 @@ -16850,15 +17222,23 @@ design: (work@top) |vpiFullName:work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete), line:802:13, endln:802:68 |vpiName:$root |vpiActual: \_ref_obj: (tb) + |vpiParent: + \_hier_path: (work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete), line:802:13, endln:802:68 |vpiName:tb |vpiActual: \_ref_obj: (dut) + |vpiParent: + \_hier_path: (work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete), line:802:13, endln:802:68 |vpiName:dut |vpiActual: \_ref_obj: (master_0) + |vpiParent: + \_hier_path: (work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete), line:802:13, endln:802:68 |vpiName:master_0 |vpiActual: \_bit_select: @@ -16870,6 +17250,8 @@ design: (work@top) |vpiConstType:9 |vpiActual: \_ref_obj: (signal_write_response_complete) + |vpiParent: + \_hier_path: (work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete), line:802:13, endln:802:68 |vpiName:signal_write_response_complete |vpiStmt: \_begin: (work@test_program1), line:802:70, endln:804:7 @@ -16954,12 +17336,18 @@ design: (work@top) |vpiFullName:work@top.$root.top.a |vpiActual: \_ref_obj: ($root) + |vpiParent: + \_hier_path: (work@top.$root.top.a), line:2:11, endln:2:17 |vpiName:$root |vpiActual: \_ref_obj: (top) + |vpiParent: + \_hier_path: (work@top.$root.top.a), line:2:11, endln:2:17 |vpiName:top |vpiActual: \_ref_obj: (a) + |vpiParent: + \_hier_path: (work@top.$root.top.a), line:2:11, endln:2:17 |vpiName:a |uhdmtopModules: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/DollarRoot/dut.sv, line:1:1, endln:3:10 diff --git a/tests/FSMBsp13/FSMBsp13.log b/tests/FSMBsp13/FSMBsp13.log index 8cfc27fedc..dbba803a87 100644 --- a/tests/FSMBsp13/FSMBsp13.log +++ b/tests/FSMBsp13/FSMBsp13.log @@ -15928,6 +15928,8 @@ design: (work@top) |vpiName:top |vpiActual: \_ref_obj: (F2), line:121:21, endln:121:23 + |vpiParent: + \_hier_path: (top.F2), line:121:17, endln:121:23 |vpiName:F2 |vpiName:$vtDumpvars |vpiStmt: diff --git a/tests/FuncDef2/FuncDef2.log b/tests/FuncDef2/FuncDef2.log index d853d091a3..895680a3b3 100644 --- a/tests/FuncDef2/FuncDef2.log +++ b/tests/FuncDef2/FuncDef2.log @@ -15215,6 +15215,8 @@ design: (work@tnoc_vc_splitter) |vpiName:PACKET_CONFIG |vpiActual: \_ref_obj: (virtual_channels) + |vpiParent: + \_hier_path: (PACKET_CONFIG.virtual_channels), line:409:51, endln:409:81 |vpiName:virtual_channels |vpiLhs: \_parameter: (work@tnoc_vc_splitter.CHANNELS), line:409:35, endln:409:43 @@ -15501,6 +15503,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:85:60, endln:85:73 |vpiActual: \_ref_obj: (size_x), line:86:23, endln:86:29 + |vpiParent: + \_hier_path: (packet_config.size_x), line:86:9, endln:86:29 |vpiName:size_x |vpiOperand: \_constant: , line:86:33, endln:86:34 @@ -15531,6 +15535,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:85:60, endln:85:73 |vpiActual: \_ref_obj: (size_x), line:87:39, endln:87:45 + |vpiParent: + \_hier_path: (packet_config.size_x), line:87:25, endln:87:45 |vpiName:size_x |vpiName:tnoc_clog2 |vpiFunction: @@ -15589,6 +15595,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:94:60, endln:94:73 |vpiActual: \_ref_obj: (size_y), line:95:23, endln:95:29 + |vpiParent: + \_hier_path: (packet_config.size_y), line:95:9, endln:95:29 |vpiName:size_y |vpiOperand: \_constant: , line:95:33, endln:95:34 @@ -15619,6 +15627,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:94:60, endln:94:73 |vpiActual: \_ref_obj: (size_y), line:96:39, endln:96:45 + |vpiParent: + \_hier_path: (packet_config.size_y), line:96:25, endln:96:45 |vpiName:size_y |vpiName:tnoc_clog2 |vpiFunction: @@ -15736,6 +15746,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:107:58, endln:107:71 |vpiActual: \_ref_obj: (virtual_channels), line:108:23, endln:108:39 + |vpiParent: + \_hier_path: (packet_config.virtual_channels), line:108:9, endln:108:39 |vpiName:virtual_channels |vpiOperand: \_constant: , line:108:43, endln:108:44 @@ -15766,6 +15778,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:107:58, endln:107:71 |vpiActual: \_ref_obj: (virtual_channels), line:109:39, endln:109:55 + |vpiParent: + \_hier_path: (packet_config.virtual_channels), line:109:25, endln:109:55 |vpiName:virtual_channels |vpiName:tnoc_clog2 |vpiFunction: @@ -15824,6 +15838,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:116:59, endln:116:72 |vpiActual: \_ref_obj: (tags), line:117:23, endln:117:27 + |vpiParent: + \_hier_path: (packet_config.tags), line:117:9, endln:117:27 |vpiName:tags |vpiOperand: \_constant: , line:117:31, endln:117:32 @@ -15854,6 +15870,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:116:59, endln:116:72 |vpiActual: \_ref_obj: (tags), line:118:39, endln:118:43 + |vpiParent: + \_hier_path: (packet_config.tags), line:118:25, endln:118:43 |vpiName:tags |vpiName:tnoc_clog2 |vpiFunction: @@ -15912,6 +15930,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:125:65, endln:125:78 |vpiActual: \_ref_obj: (max_data_width), line:126:23, endln:126:37 + |vpiParent: + \_hier_path: (packet_config.max_data_width), line:126:9, endln:126:37 |vpiName:max_data_width |vpiOperand: \_constant: , line:126:41, endln:126:43 @@ -15956,6 +15976,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:125:65, endln:125:78 |vpiActual: \_ref_obj: (max_data_width), line:127:50, endln:127:64 + |vpiParent: + \_hier_path: (packet_config.max_data_width), line:127:36, endln:127:64 |vpiName:max_data_width |vpiOperand: \_constant: , line:127:67, endln:127:68 @@ -16025,6 +16047,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:134:67, endln:134:80 |vpiActual: \_ref_obj: (max_byte_length), line:135:37, endln:135:52 + |vpiParent: + \_hier_path: (packet_config.max_byte_length), line:135:23, endln:135:52 |vpiName:max_byte_length |vpiOperand: \_constant: , line:135:55, endln:135:56 @@ -16074,6 +16098,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:138:74, endln:138:87 |vpiActual: \_ref_obj: (max_byte_length), line:139:23, endln:139:38 + |vpiParent: + \_hier_path: (packet_config.max_byte_length), line:139:9, endln:139:38 |vpiName:max_byte_length |vpiOperand: \_constant: , line:139:42, endln:139:43 @@ -16104,6 +16130,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:138:74, endln:138:87 |vpiActual: \_ref_obj: (max_byte_length), line:140:39, endln:140:54 + |vpiParent: + \_hier_path: (packet_config.max_byte_length), line:140:25, endln:140:54 |vpiName:max_byte_length |vpiName:tnoc_clog2 |vpiFunction: @@ -16162,6 +16190,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:147:67, endln:147:80 |vpiActual: \_ref_obj: (max_data_width), line:148:23, endln:148:37 + |vpiParent: + \_hier_path: (packet_config.max_data_width), line:148:9, endln:148:37 |vpiName:max_data_width |vpiOperand: \_constant: , line:148:41, endln:148:43 @@ -16197,6 +16227,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:147:67, endln:147:80 |vpiActual: \_ref_obj: (max_data_width), line:149:39, endln:149:53 + |vpiParent: + \_hier_path: (packet_config.max_data_width), line:149:25, endln:149:53 |vpiName:max_data_width |vpiOperand: \_constant: , line:149:56, endln:149:57 @@ -16257,6 +16289,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:156:64, endln:156:77 |vpiActual: \_ref_obj: (data_width), line:157:23, endln:157:33 + |vpiParent: + \_hier_path: (packet_config.data_width), line:157:9, endln:157:33 |vpiName:data_width |vpiOperand: \_constant: , line:157:37, endln:157:39 @@ -16292,6 +16326,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:156:64, endln:156:77 |vpiActual: \_ref_obj: (data_width), line:158:39, endln:158:49 + |vpiParent: + \_hier_path: (packet_config.data_width), line:158:25, endln:158:49 |vpiName:data_width |vpiOperand: \_constant: , line:158:52, endln:158:53 @@ -16370,6 +16406,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:165:68, endln:165:81 |vpiActual: \_ref_obj: (data_width), line:167:33, endln:167:43 + |vpiParent: + \_hier_path: (packet_config.data_width), line:167:19, endln:167:43 |vpiName:data_width |vpiOperand: \_constant: , line:167:46, endln:167:47 @@ -16413,6 +16451,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:165:68, endln:165:81 |vpiActual: \_ref_obj: (max_byte_length), line:168:38, endln:168:53 + |vpiParent: + \_hier_path: (packet_config.max_byte_length), line:168:24, endln:168:53 |vpiName:max_byte_length |vpiOperand: \_ref_obj: (tnoc_pkg::get_burst_length_width::byte_width), line:168:56, endln:168:66 @@ -17230,6 +17270,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:239:70, endln:239:83 |vpiActual: \_ref_obj: (address_width), line:245:28, endln:245:41 + |vpiParent: + \_hier_path: (packet_config.address_width), line:245:14, endln:245:41 |vpiName:address_width |vpiLhs: \_ref_obj: (tnoc_pkg::get_request_header_width::width), line:245:5, endln:245:10 @@ -17702,6 +17744,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:274:71, endln:274:84 |vpiActual: \_ref_obj: (data_width), line:277:28, endln:277:38 + |vpiParent: + \_hier_path: (packet_config.data_width), line:277:14, endln:277:38 |vpiName:data_width |vpiLhs: \_ref_obj: (tnoc_pkg::get_request_payload_width::width), line:277:5, endln:277:10 @@ -17736,6 +17780,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:274:71, endln:274:84 |vpiActual: \_ref_obj: (data_width), line:278:28, endln:278:38 + |vpiParent: + \_hier_path: (packet_config.data_width), line:278:14, endln:278:38 |vpiName:data_width |vpiOperand: \_constant: , line:278:41, endln:278:42 @@ -17831,6 +17877,8 @@ design: (work@tnoc_vc_splitter) \_io_decl: (packet_config), line:282:72, endln:282:85 |vpiActual: \_ref_obj: (data_width), line:285:28, endln:285:38 + |vpiParent: + \_hier_path: (packet_config.data_width), line:285:14, endln:285:38 |vpiName:data_width |vpiLhs: \_ref_obj: (tnoc_pkg::get_response_payload_width::width), line:285:5, endln:285:10 diff --git a/tests/FuncIoTypespec/FuncIoTypespec.log b/tests/FuncIoTypespec/FuncIoTypespec.log index 165d7e54a5..4b14159376 100644 --- a/tests/FuncIoTypespec/FuncIoTypespec.log +++ b/tests/FuncIoTypespec/FuncIoTypespec.log @@ -3243,8 +3243,11 @@ design: (work@top) |vpiArgument: \_part_select: , line:77:26, endln:77:46 |vpiParent: - \_ref_obj: sbit_arg1 (sbit_arg1), line:77:26, endln:77:35 + \_ref_obj: sbit_arg1 (work@shift.fshl_s.sbit_arg1), line:77:26, endln:77:35 + |vpiParent: + \_func_call: (fshr_u), line:77:19, endln:77:60 |vpiName:sbit_arg1 + |vpiFullName:work@shift.fshl_s.sbit_arg1 |vpiDefName:sbit_arg1 |vpiConstantSelect:1 |vpiLeftRange: diff --git a/tests/GenModHierPath/GenModHierPath.log b/tests/GenModHierPath/GenModHierPath.log index 0b7d97c9c3..4a22a3fe76 100644 --- a/tests/GenModHierPath/GenModHierPath.log +++ b/tests/GenModHierPath/GenModHierPath.log @@ -227,6 +227,8 @@ design: (work@InitializedBlockRAM) |vpiName:ram |vpiActual: \_ref_obj: (array), line:17:24, endln:17:29 + |vpiParent: + \_hier_path: (body.ram.array), line:17:15, endln:17:29 |vpiName:array |vpiName:$readmemh |vpiInstance: diff --git a/tests/HierBitSlice/HierBitSlice.log b/tests/HierBitSlice/HierBitSlice.log index d71b9f5267..2a0d35ff9e 100644 --- a/tests/HierBitSlice/HierBitSlice.log +++ b/tests/HierBitSlice/HierBitSlice.log @@ -6088,6 +6088,8 @@ design: (work@int_execute_stage) |vpiName:of_instruction |vpiActual: \_ref_obj: (branch), line:291:31, endln:291:37 + |vpiParent: + \_hier_path: (of_instruction.branch), line:291:16, endln:291:37 |vpiName:branch |vpiOperand: \_operation: , line:292:16, endln:292:36 @@ -6125,6 +6127,8 @@ design: (work@int_execute_stage) |vpiName:of_instruction |vpiActual: \_ref_obj: (branch_type), line:294:41, endln:294:52 + |vpiParent: + \_hier_path: (of_instruction.branch_type), line:294:26, endln:294:52 |vpiName:branch_type |vpiCaseItem: \_case_item: , line:295:17, endln:299:20 @@ -6519,6 +6523,8 @@ design: (work@int_execute_stage) |vpiName:of_instruction |vpiActual: \_ref_obj: (branch_type), line:332:37, endln:332:48 + |vpiParent: + \_hier_path: (of_instruction.branch_type), line:332:22, endln:332:48 |vpiName:branch_type |vpiCaseItem: \_case_item: , line:333:13, endln:334:63 @@ -6640,6 +6646,8 @@ design: (work@int_execute_stage) |vpiName:of_instruction |vpiActual: \_ref_obj: (pc), line:337:50, endln:337:52 + |vpiParent: + \_hier_path: (of_instruction.pc), line:337:35, endln:337:52 |vpiName:pc |vpiOperand: \_hier_path: (of_instruction.immediate_value), line:337:55, endln:337:85 @@ -6653,6 +6661,8 @@ design: (work@int_execute_stage) |vpiName:of_instruction |vpiActual: \_ref_obj: (immediate_value), line:337:70, endln:337:85 + |vpiParent: + \_hier_path: (of_instruction.immediate_value), line:337:55, endln:337:85 |vpiName:immediate_value |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_rollback_pc), line:337:17, endln:337:31 @@ -7167,6 +7177,8 @@ design: (work@int_execute_stage) |vpiName:of_instruction |vpiActual: \_ref_obj: (pipeline_sel), line:279:27, endln:279:39 + |vpiParent: + \_hier_path: (of_instruction.pipeline_sel), line:279:12, endln:279:39 |vpiName:pipeline_sel |vpiOperand: \_ref_obj: (work@int_execute_stage.PIPE_INT_ARITH), line:279:43, endln:279:57 @@ -7218,6 +7230,8 @@ design: (work@int_execute_stage) |vpiName:of_instruction |vpiActual: \_ref_obj: (branch), line:281:27, endln:281:33 + |vpiParent: + \_hier_path: (of_instruction.branch), line:281:12, endln:281:33 |vpiName:branch |vpiOperand: \_operation: , line:282:12, endln:282:53 @@ -7236,6 +7250,8 @@ design: (work@int_execute_stage) |vpiName:of_instruction |vpiActual: \_ref_obj: (branch_type), line:282:27, endln:282:38 + |vpiParent: + \_hier_path: (of_instruction.branch_type), line:282:12, endln:282:38 |vpiName:branch_type |vpiOperand: \_ref_obj: (work@int_execute_stage.BRANCH_ERET), line:282:42, endln:282:53 diff --git a/tests/HierMultiSelect/HierMultiSelect.log b/tests/HierMultiSelect/HierMultiSelect.log index f53be1d593..5a3146e33f 100644 --- a/tests/HierMultiSelect/HierMultiSelect.log +++ b/tests/HierMultiSelect/HierMultiSelect.log @@ -324,6 +324,8 @@ design: (work@dm_csrs) |vpiName:dmi_req_i |vpiActual: \_ref_obj: (addr2), line:2:38, endln:2:43 + |vpiParent: + \_hier_path: (dmi_req_i.addr2), line:2:28, endln:2:43 |vpiName:addr2 |vpiLhs: \_hier_path: (dmi_req_i.addr1), line:2:10, endln:2:25 @@ -337,6 +339,8 @@ design: (work@dm_csrs) |vpiName:dmi_req_i |vpiActual: \_ref_obj: (addr1) + |vpiParent: + \_hier_path: (dmi_req_i.addr1), line:2:10, endln:2:25 |vpiName:addr1 |vpiContAssign: \_cont_assign: , line:3:10, endln:3:58 @@ -595,6 +599,8 @@ design: (work@dm_csrs) |vpiName:b |vpiActual: \_ref_obj: (b), line:7:12, endln:7:13 + |vpiParent: + \_hier_path: (b), line:7:12, endln:7:17 |vpiName:b |vpiActual: \_method_func_call: (and), line:7:14, endln:7:17 diff --git a/tests/HierPathBeginBlock/HierPathBeginBlock.log b/tests/HierPathBeginBlock/HierPathBeginBlock.log index 93e9560dbd..fbaa63d087 100644 --- a/tests/HierPathBeginBlock/HierPathBeginBlock.log +++ b/tests/HierPathBeginBlock/HierPathBeginBlock.log @@ -588,6 +588,8 @@ design: (work@matching_end_labels_top) \_named_begin: (work@matching_end_labels_top.blk1), line:6:9, endln:9:12 |vpiActual: \_ref_obj: (x), line:10:21, endln:10:22 + |vpiParent: + \_hier_path: (blk1.x), line:10:16, endln:10:22 |vpiName:x |vpiLhs: \_ref_obj: (work@matching_end_labels_top.out1), line:10:9, endln:10:13 @@ -653,6 +655,8 @@ design: (work@matching_end_labels_top) \_named_begin: (work@matching_end_labels_top.blk2), line:12:9, endln:15:19 |vpiActual: \_ref_obj: (x), line:16:21, endln:16:22 + |vpiParent: + \_hier_path: (blk2.x), line:16:16, endln:16:22 |vpiName:x |vpiLhs: \_ref_obj: (work@matching_end_labels_top.out2), line:16:9, endln:16:13 diff --git a/tests/HierPathBind/HierPathBind.log b/tests/HierPathBind/HierPathBind.log index ccfe51af2c..673c6132f8 100644 --- a/tests/HierPathBind/HierPathBind.log +++ b/tests/HierPathBind/HierPathBind.log @@ -301,6 +301,8 @@ design: (work@top) |vpiName:alert_rx_i |vpiActual: \_ref_obj: (ping_p), line:14:26, endln:14:32 + |vpiParent: + \_hier_path: (alert_rx_i.ping_p), line:14:15, endln:14:32 |vpiName:ping_p |vpiLhs: \_ref_obj: (work@top.o), line:14:11, endln:14:12 @@ -331,6 +333,8 @@ design: (work@top) |vpiName:alert_rx_i |vpiActual: \_ref_obj: (ping_p), line:12:24, endln:12:30 + |vpiParent: + \_hier_path: (alert_rx_i.ping_p), line:12:13, endln:12:30 |vpiName:ping_p |uhdmtopModules: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/HierPathBind/dut.sv, line:5:1, endln:15:10 diff --git a/tests/HierPathPackedArrayNet/HierPathPackedArrayNet.log b/tests/HierPathPackedArrayNet/HierPathPackedArrayNet.log index 73a63d6bf1..eee13850f9 100644 --- a/tests/HierPathPackedArrayNet/HierPathPackedArrayNet.log +++ b/tests/HierPathPackedArrayNet/HierPathPackedArrayNet.log @@ -676,6 +676,8 @@ design: (work@rvfi_tracer) \_int_var: (work@rvfi_tracer.i), line:17:12, endln:17:13 |vpiActual: \_ref_obj: (trap), line:18:19, endln:18:23 + |vpiParent: + \_hier_path: (rvfi_i[i].trap), line:18:9, endln:18:23 |vpiName:trap |vpiStmt: \_begin: (work@rvfi_tracer), line:18:25, endln:19:8 diff --git a/tests/HierPathPackedVar/HierPathPackedVar.log b/tests/HierPathPackedVar/HierPathPackedVar.log index 75fe4bc588..afba1d5288 100644 --- a/tests/HierPathPackedVar/HierPathPackedVar.log +++ b/tests/HierPathPackedVar/HierPathPackedVar.log @@ -983,6 +983,8 @@ design: (work@axi_adapter_arbiter) \_logic_net: (i) |vpiActual: \_ref_obj: (req), line:22:21, endln:22:24 + |vpiParent: + \_hier_path: (req_i[i].req), line:22:12, endln:22:24 |vpiName:req |vpiOperand: \_constant: , line:22:28, endln:22:32 diff --git a/tests/HierPathStruct/HierPathStruct.log b/tests/HierPathStruct/HierPathStruct.log index 51509e9bad..d3891a1f20 100644 --- a/tests/HierPathStruct/HierPathStruct.log +++ b/tests/HierPathStruct/HierPathStruct.log @@ -394,9 +394,13 @@ design: (work@dut) |vpiName:hw2reg |vpiActual: \_ref_obj: (data_in) + |vpiParent: + \_hier_path: (hw2reg.data_in.de), line:17:8, endln:17:25 |vpiName:data_in |vpiActual: \_ref_obj: (de) + |vpiParent: + \_hier_path: (hw2reg.data_in.de), line:17:8, endln:17:25 |vpiName:de |uhdmtopModules: \_module_inst: work@dut (work@dut), file:${SURELOG_DIR}/tests/HierPathStruct/dut.sv, line:13:1, endln:19:10 diff --git a/tests/InterfBinding/InterfBinding.log b/tests/InterfBinding/InterfBinding.log index 7b64c2a2e1..22acec9cfb 100644 --- a/tests/InterfBinding/InterfBinding.log +++ b/tests/InterfBinding/InterfBinding.log @@ -356,6 +356,8 @@ design: (work@BypassNetwork) |vpiName:ctrl |vpiActual: \_ref_obj: (backEnd), line:33:18, endln:33:25 + |vpiParent: + \_hier_path: (ctrl.backEnd), line:33:13, endln:33:25 |vpiName:backEnd |vpiLhs: \_ref_obj: (work@BypassNetwork.o), line:33:9, endln:33:10 diff --git a/tests/InterfHierPath/InterfHierPath.log b/tests/InterfHierPath/InterfHierPath.log index 47970d04ee..cccb53ea72 100644 --- a/tests/InterfHierPath/InterfHierPath.log +++ b/tests/InterfHierPath/InterfHierPath.log @@ -235,6 +235,8 @@ design: (work@or_ex) |vpiName:lg |vpiActual: \_ref_obj: (a) + |vpiParent: + \_hier_path: (lg.a), line:14:10, endln:14:14 |vpiName:a |vpiRefModule: \_ref_module: work@logic_gate_if (lg), line:12:17, endln:12:19 diff --git a/tests/InterfImport/InterfImport.log b/tests/InterfImport/InterfImport.log index bf5d0b1145..6c5dad95ed 100644 --- a/tests/InterfImport/InterfImport.log +++ b/tests/InterfImport/InterfImport.log @@ -502,6 +502,8 @@ design: (unnamed) |vpiName:PACKET_CONFIG |vpiActual: \_ref_obj: (virtual_channels) + |vpiParent: + \_hier_path: (PACKET_CONFIG.virtual_channels), line:11:31, endln:11:61 |vpiName:virtual_channels |vpiLhs: \_parameter: (work@tnoc_port_control_if.CHANNELS), line:11:19, endln:11:27 diff --git a/tests/InterfInst/InterfInst.log b/tests/InterfInst/InterfInst.log index 5d9106440d..22a38f2311 100644 --- a/tests/InterfInst/InterfInst.log +++ b/tests/InterfInst/InterfInst.log @@ -277,6 +277,8 @@ design: (work@top) |vpiName:ss_if |vpiActual: \_ref_obj: (start_addr), line:7:21, endln:7:31 + |vpiParent: + \_hier_path: (ss_if.start_addr), line:7:15, endln:7:31 |vpiName:start_addr |vpiLhs: \_ref_obj: (work@dut.a), line:7:11, endln:7:12 @@ -335,6 +337,8 @@ design: (work@top) |vpiName:u_sim_sram_if |vpiActual: \_ref_obj: (start_addr) + |vpiParent: + \_hier_path: (u_sim_sram_if.start_addr), line:12:11, endln:12:35 |vpiName:start_addr |vpiRefModule: \_ref_module: work@sim_sram_if (u_sim_sram_if), line:11:16, endln:11:29 diff --git a/tests/InterfaceModExp/InterfaceModExp.log b/tests/InterfaceModExp/InterfaceModExp.log index c42408f6ed..780cf6d1c0 100644 --- a/tests/InterfaceModExp/InterfaceModExp.log +++ b/tests/InterfaceModExp/InterfaceModExp.log @@ -494,6 +494,8 @@ design: (work@top) |vpiName:I |vpiActual: \_ref_obj: (P) + |vpiParent: + \_hier_path: (I.P), line:11:11, endln:11:14 |vpiName:P |uhdmallModules: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/InterfaceModExp/dut.sv, line:14:1, endln:20:10 @@ -534,6 +536,8 @@ design: (work@top) |vpiName:inst |vpiActual: \_ref_obj: (r), line:18:37, endln:18:38 + |vpiParent: + \_hier_path: (inst.r), line:18:32, endln:18:38 |vpiName:r |vpiName:$display |vpiRefModule: @@ -564,6 +568,8 @@ design: (work@top) |vpiName:inst |vpiActual: \_ref_obj: (A), line:16:15, endln:16:16 + |vpiParent: + \_hier_path: (inst.A), line:16:10, endln:16:16 |vpiName:A |uhdmtopModules: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/InterfaceModExp/dut.sv, line:14:1, endln:20:10 diff --git a/tests/InterfaceModPort/InterfaceModPort.log b/tests/InterfaceModPort/InterfaceModPort.log index ceb818af8d..05dfeda895 100644 --- a/tests/InterfaceModPort/InterfaceModPort.log +++ b/tests/InterfaceModPort/InterfaceModPort.log @@ -2052,6 +2052,8 @@ design: (work@interface_modports) |vpiName:tif |vpiActual: \_ref_obj: (reset) + |vpiParent: + \_hier_path: (tif.reset), line:102:7, endln:102:16 |vpiName:reset |vpiStmt: \_delay_control: , line:104:7, endln:104:10 @@ -2292,6 +2294,8 @@ design: (work@interface_modports) |vpiName:mif |vpiActual: \_ref_obj: (clk), line:69:23, endln:69:26 + |vpiParent: + \_hier_path: (mif.clk), line:69:19, endln:69:26 |vpiName:clk |vpiStmt: \_if_stmt: , line:70:2, endln:72:5 @@ -2314,6 +2318,8 @@ design: (work@interface_modports) |vpiName:mif |vpiActual: \_ref_obj: (ce_mem), line:70:10, endln:70:16 + |vpiParent: + \_hier_path: (mif.ce_mem), line:70:6, endln:70:16 |vpiName:ce_mem |vpiOperand: \_hier_path: (mif.we_mem), line:70:20, endln:70:30 @@ -2327,6 +2333,8 @@ design: (work@interface_modports) |vpiName:mif |vpiActual: \_ref_obj: (we_mem), line:70:24, endln:70:30 + |vpiParent: + \_hier_path: (mif.we_mem), line:70:20, endln:70:30 |vpiName:we_mem |vpiStmt: \_begin: (work@memory_model), line:70:32, endln:72:5 @@ -2350,6 +2358,8 @@ design: (work@interface_modports) |vpiName:mif |vpiActual: \_ref_obj: (datai_mem), line:71:29, endln:71:38 + |vpiParent: + \_hier_path: (mif.datai_mem), line:71:25, endln:71:38 |vpiName:datai_mem |vpiLhs: \_bit_select: (work@memory_model.mem), line:71:4, endln:71:21 @@ -2373,6 +2383,8 @@ design: (work@interface_modports) |vpiName:mif |vpiActual: \_ref_obj: (addr_mem), line:71:12, endln:71:20 + |vpiParent: + \_hier_path: (mif.addr_mem), line:71:8, endln:71:20 |vpiName:addr_mem |vpiAlwaysType:1 |vpiProcess: @@ -2400,6 +2412,8 @@ design: (work@interface_modports) |vpiName:mif |vpiActual: \_ref_obj: (clk), line:77:23, endln:77:26 + |vpiParent: + \_hier_path: (mif.clk), line:77:19, endln:77:26 |vpiName:clk |vpiStmt: \_if_stmt: , line:78:2, endln:80:5 @@ -2422,6 +2436,8 @@ design: (work@interface_modports) |vpiName:mif |vpiActual: \_ref_obj: (ce_mem), line:78:10, endln:78:16 + |vpiParent: + \_hier_path: (mif.ce_mem), line:78:6, endln:78:16 |vpiName:ce_mem |vpiOperand: \_operation: , line:78:20, endln:78:31 @@ -2440,6 +2456,8 @@ design: (work@interface_modports) |vpiName:mif |vpiActual: \_ref_obj: (we_mem), line:78:25, endln:78:31 + |vpiParent: + \_hier_path: (mif.we_mem), line:78:21, endln:78:31 |vpiName:we_mem |vpiStmt: \_begin: (work@memory_model), line:78:34, endln:80:5 @@ -2473,6 +2491,8 @@ design: (work@interface_modports) |vpiName:mif |vpiActual: \_ref_obj: (addr_mem), line:79:29, endln:79:37 + |vpiParent: + \_hier_path: (mif.addr_mem), line:79:25, endln:79:37 |vpiName:addr_mem |vpiLhs: \_hier_path: (mif.datao_mem), line:79:4, endln:79:17 @@ -2486,6 +2506,8 @@ design: (work@interface_modports) |vpiName:mif |vpiActual: \_ref_obj: (datao_mem) + |vpiParent: + \_hier_path: (mif.datao_mem), line:79:4, endln:79:17 |vpiName:datao_mem |vpiAlwaysType:1 |uhdmtopModules: diff --git a/tests/LhsHierPath/LhsHierPath.log b/tests/LhsHierPath/LhsHierPath.log index 4487d023d5..74f71ef4bb 100644 --- a/tests/LhsHierPath/LhsHierPath.log +++ b/tests/LhsHierPath/LhsHierPath.log @@ -489,6 +489,8 @@ design: (work@top) |vpiConstType:9 |vpiActual: \_ref_obj: (p), line:16:41, endln:16:42 + |vpiParent: + \_hier_path: (ast_alert_o.alerts_ack[0].p), line:16:15, endln:16:42 |vpiName:p |vpiLhs: \_ref_obj: (work@top.o), line:16:11, endln:16:12 diff --git a/tests/LibraryIntercon/LibraryIntercon.log b/tests/LibraryIntercon/LibraryIntercon.log index 31de67a5c6..5d10892e2d 100644 --- a/tests/LibraryIntercon/LibraryIntercon.log +++ b/tests/LibraryIntercon/LibraryIntercon.log @@ -13,9 +13,9 @@ LIB: realLib ${SURELOG_DIR}/tests/LibraryIntercon/driver.svr LIB: logicLib + ${SURELOG_DIR}/tests/LibraryIntercon/top.sv ${SURELOG_DIR}/tests/LibraryIntercon/driver.sv ${SURELOG_DIR}/tests/LibraryIntercon/cmp.sv - ${SURELOG_DIR}/tests/LibraryIntercon/top.sv [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/nets.pkg". @@ -26,30 +26,30 @@ LIB: logicLib [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/driver.svr". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/top.sv". + [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/driver.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/cmp.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/top.sv". - [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/nets.pkg". [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/cmp.svr". [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/driver.svr". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/top.sv". + [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/driver.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/cmp.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/top.sv". - [WRN:PA0205] ${SURELOG_DIR}/tests/LibraryIntercon/nets.pkg:1:1: No timescale set for "NetsPkg". -[WRN:PA0205] ${SURELOG_DIR}/tests/LibraryIntercon/cmp.sv:2:1: No timescale set for "cmp". - [WRN:PA0205] ${SURELOG_DIR}/tests/LibraryIntercon/top.sv:1:1: No timescale set for "top". +[WRN:PA0205] ${SURELOG_DIR}/tests/LibraryIntercon/cmp.sv:2:1: No timescale set for "cmp". + [INF:CP0300] Compilation... [INF:CP0301] ${SURELOG_DIR}/tests/LibraryIntercon/nets.pkg:1:1: Compile package "NetsPkg". diff --git a/tests/LocalScopeAssign/LocalScopeAssign.log b/tests/LocalScopeAssign/LocalScopeAssign.log index 5ecbe5108c..d945d6e4e2 100644 --- a/tests/LocalScopeAssign/LocalScopeAssign.log +++ b/tests/LocalScopeAssign/LocalScopeAssign.log @@ -229,6 +229,8 @@ design: (work@module_scope_Example) |vpiName:module_scope_Example |vpiActual: \_ref_obj: (o2) + |vpiParent: + \_hier_path: (module_scope_Example.o2), line:7:11, endln:7:34 |vpiName:o2 |uhdmtopModules: \_module_inst: work@module_scope_Example (work@module_scope_Example), file:${SURELOG_DIR}/tests/LocalScopeAssign/dut.sv, line:3:1, endln:8:10 diff --git a/tests/LogicCast/LogicCast.log b/tests/LogicCast/LogicCast.log index 9e66b7a163..80e67b2e8c 100644 --- a/tests/LogicCast/LogicCast.log +++ b/tests/LogicCast/LogicCast.log @@ -977,6 +977,8 @@ design: (work@top) |vpiName:dmstatus |vpiActual: \_ref_obj: (allnonexistent) + |vpiParent: + \_hier_path: (dmstatus.allnonexistent), line:3:3, endln:3:26 |vpiName:allnonexistent |vpiAlwaysType:2 |uhdmtopModules: diff --git a/tests/LoopParamOver/LoopParamOver.win.log b/tests/LoopParamOver/LoopParamOver.win.log index 359edf576c..e0a3bf23e1 100644 --- a/tests/LoopParamOver/LoopParamOver.win.log +++ b/tests/LoopParamOver/LoopParamOver.win.log @@ -312,6 +312,8 @@ design: (work@top) |vpiDefName:work@top |vpiRefModule: \_ref_module: work@Foo (sub), line:12:16, endln:12:19 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}\tests\LoopParamOver\dut.sv, line:8:1, endln:13:10 |vpiName:sub |vpiDefName:work@Foo |vpiActual: diff --git a/tests/MultiIndexBind/MultiIndexBind.log b/tests/MultiIndexBind/MultiIndexBind.log index 50af70fff9..70b6b6ab57 100644 --- a/tests/MultiIndexBind/MultiIndexBind.log +++ b/tests/MultiIndexBind/MultiIndexBind.log @@ -438,6 +438,8 @@ design: (work@PreDecodeStage) |vpiName:intOp |vpiActual: \_ref_obj: (aluCode), line:28:41, endln:28:48 + |vpiParent: + \_hier_path: (microOps[i][1].operand.intOp.aluCode), line:28:12, endln:28:48 |vpiName:aluCode |vpiLhs: \_ref_obj: (work@PreDecodeStage.o), line:28:8, endln:28:9 diff --git a/tests/NameCollisionBind/NameCollisionBind.log b/tests/NameCollisionBind/NameCollisionBind.log index a1f076d5c6..bf85c27bd8 100644 --- a/tests/NameCollisionBind/NameCollisionBind.log +++ b/tests/NameCollisionBind/NameCollisionBind.log @@ -234,6 +234,8 @@ design: (work@CSR_Unit) |vpiName:perfCounter |vpiActual: \_ref_obj: (numLoadMiss), line:25:42, endln:25:53 + |vpiParent: + \_hier_path: (perfCounter.perfCounter.numLoadMiss), line:25:18, endln:25:53 |vpiName:numLoadMiss |vpiLhs: \_ref_obj: (work@CSR_Unit.mshrID), line:25:9, endln:25:15 diff --git a/tests/NetLValue/NetLValue.log b/tests/NetLValue/NetLValue.log index 473c36337b..1e1df323c5 100644 --- a/tests/NetLValue/NetLValue.log +++ b/tests/NetLValue/NetLValue.log @@ -277,6 +277,8 @@ design: (work@t) |vpiConstType:9 |vpiActual: \_ref_obj: (x), line:7:15, endln:7:16 + |vpiParent: + \_hier_path: (s[0].x), line:7:10, endln:7:16 |vpiName:x |vpiLhs: \_ref_obj: (work@t.y), line:7:6, endln:7:7 diff --git a/tests/NetType/NetType.log b/tests/NetType/NetType.log index cb3c9c3b07..9901f25b33 100644 --- a/tests/NetType/NetType.log +++ b/tests/NetType/NetType.log @@ -517,6 +517,8 @@ design: (work@dut) \_struct_var: , line:28:20, endln:28:21 |vpiActual: \_ref_obj: (field1) + |vpiParent: + \_hier_path: (Tsum.field1), line:29:3, endln:29:14 |vpiName:field1 |vpiStmt: \_foreach_stmt: (Tsum), line:30:3, endln:30:10 @@ -572,6 +574,8 @@ design: (work@dut) \_ref_var: (Tsum.i), line:30:19, endln:30:20 |vpiActual: \_ref_obj: (field1), line:31:30, endln:31:36 + |vpiParent: + \_hier_path: (driver[i].field1), line:31:20, endln:31:36 |vpiName:field1 |vpiLhs: \_hier_path: (Tsum.field1), line:31:5, endln:31:16 @@ -587,6 +591,8 @@ design: (work@dut) \_struct_var: , line:28:20, endln:28:21 |vpiActual: \_ref_obj: (field1) + |vpiParent: + \_hier_path: (Tsum.field1), line:31:5, endln:31:16 |vpiName:field1 |vpiTaskFunc: \_function: (my_function), line:3:1, endln:4:12 diff --git a/tests/NonAnsiPort/NonAnsiPort.log b/tests/NonAnsiPort/NonAnsiPort.log index 7a25d30f70..10f172ee21 100644 --- a/tests/NonAnsiPort/NonAnsiPort.log +++ b/tests/NonAnsiPort/NonAnsiPort.log @@ -603,6 +603,8 @@ design: (work@dut) |vpiName:var1 |vpiActual: \_ref_obj: (first) + |vpiParent: + \_hier_path: (var1.first), line:22:12, endln:22:22 |vpiName:first |vpiContAssign: \_cont_assign: , line:23:12, endln:23:29 @@ -628,6 +630,8 @@ design: (work@dut) |vpiName:var2 |vpiActual: \_ref_obj: (second) + |vpiParent: + \_hier_path: (var2.second), line:23:12, endln:23:23 |vpiName:second |vpiContAssign: \_cont_assign: , line:24:12, endln:24:27 @@ -653,6 +657,8 @@ design: (work@dut) |vpiName:var3 |vpiActual: \_ref_obj: (third) + |vpiParent: + \_hier_path: (var3.third), line:24:12, endln:24:22 |vpiName:third |uhdmtopModules: \_module_inst: work@dut (work@dut), file:${SURELOG_DIR}/tests/NonAnsiPort/dut.sv, line:13:1, endln:25:10 diff --git a/tests/OldLibrary/OldLibrary.log b/tests/OldLibrary/OldLibrary.log index 3892e5d00d..cb8f461840 100644 --- a/tests/OldLibrary/OldLibrary.log +++ b/tests/OldLibrary/OldLibrary.log @@ -2,28 +2,28 @@ [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/OldLibrary/top.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL2.v". - [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL1.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/OldLibrary/top.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/OldLibrary/top.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL1.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL3.v". -[WRN:PA0205] ${SURELOG_DIR}/tests/OldLibrary/top.v:1:1: No timescale set for "top". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL2.v". -[WRN:PA0205] ${SURELOG_DIR}/tests/OldLibrary/lib/CELL2.v:1:1: No timescale set for "CELL2". +[WRN:PA0205] ${SURELOG_DIR}/tests/OldLibrary/top.v:1:1: No timescale set for "top". [WRN:PA0205] ${SURELOG_DIR}/tests/OldLibrary/lib/CELL1.v:1:1: No timescale set for "CELL1". [WRN:PA0205] ${SURELOG_DIR}/tests/OldLibrary/lib/CELL3.v:1:1: No timescale set for "CELL3". +[WRN:PA0205] ${SURELOG_DIR}/tests/OldLibrary/lib/CELL2.v:1:1: No timescale set for "CELL2". + [INF:CP0300] Compilation... [INF:CP0303] ${SURELOG_DIR}/tests/OldLibrary/lib/CELL1.v:1:1: Compile module "work@CELL1". diff --git a/tests/OneNetInterf/OneNetInterf.log b/tests/OneNetInterf/OneNetInterf.log index 8986a29d6e..a8fe7a6529 100644 --- a/tests/OneNetInterf/OneNetInterf.log +++ b/tests/OneNetInterf/OneNetInterf.log @@ -602,6 +602,8 @@ design: (work@dut) |vpiName:conn |vpiActual: \_ref_obj: (con_i), line:11:22, endln:11:27 + |vpiParent: + \_hier_path: (conn.con_i), line:11:17, endln:11:27 |vpiName:con_i |vpiPort: \_port: (out), line:11:29, endln:11:45 @@ -616,6 +618,8 @@ design: (work@dut) |vpiName:conn |vpiActual: \_ref_obj: (con_o), line:11:39, endln:11:44 + |vpiParent: + \_hier_path: (conn.con_o), line:11:34, endln:11:44 |vpiName:con_o |uhdmallModules: \_module_inst: work@tb (work@tb), file:${SURELOG_DIR}/tests/OneNetInterf/tb.v, line:14:1, endln:19:10 @@ -697,6 +701,8 @@ design: (work@dut) |vpiName:conntb |vpiActual: \_ref_obj: (con_o), line:18:32, endln:18:37 + |vpiParent: + \_hier_path: (conntb.con_o), line:18:25, endln:18:37 |vpiName:con_o |vpiPort: \_port: (drive), line:18:39, endln:18:59 @@ -711,6 +717,8 @@ design: (work@dut) |vpiName:conntb |vpiActual: \_ref_obj: (con_i), line:18:53, endln:18:58 + |vpiParent: + \_hier_path: (conntb.con_i), line:18:46, endln:18:58 |vpiName:con_i |uhdmtopModules: \_module_inst: work@dut (work@dut), file:${SURELOG_DIR}/tests/OneNetInterf/dut.v, line:2:1, endln:5:10 @@ -920,6 +928,8 @@ design: (work@dut) |vpiName:conn |vpiActual: \_ref_obj: (con_i), line:11:22, endln:11:27 + |vpiParent: + \_hier_path: (conn.con_i), line:11:17, endln:11:27 |vpiName:con_i |vpiExpr: \_ref_obj: (work@dut.middle1.conn), line:4:18, endln:4:24 @@ -949,6 +959,8 @@ design: (work@dut) |vpiName:conn |vpiActual: \_ref_obj: (con_o), line:11:39, endln:11:44 + |vpiParent: + \_hier_path: (conn.con_o), line:11:34, endln:11:44 |vpiName:con_o |vpiExpr: \_ref_obj: (work@dut.middle1.conn), line:4:18, endln:4:24 @@ -1014,6 +1026,8 @@ design: (work@dut) |vpiName:conntb |vpiActual: \_ref_obj: (con_o), line:18:32, endln:18:37 + |vpiParent: + \_hier_path: (conntb.con_o), line:18:25, endln:18:37 |vpiName:con_o |vpiLowConn: \_ref_obj: (work@tb.tb.observe), line:18:17, endln:18:24 @@ -1039,6 +1053,8 @@ design: (work@dut) |vpiName:conntb |vpiActual: \_ref_obj: (con_i), line:18:53, endln:18:58 + |vpiParent: + \_hier_path: (conntb.con_i), line:18:46, endln:18:58 |vpiName:con_i |vpiLowConn: \_ref_obj: (work@tb.tb.drive), line:18:40, endln:18:45 @@ -1223,6 +1239,8 @@ design: (work@dut) |vpiName:conn |vpiActual: \_ref_obj: (con_i), line:11:22, endln:11:27 + |vpiParent: + \_hier_path: (conn.con_i), line:11:17, endln:11:27 |vpiName:con_i |vpiExpr: \_ref_obj: (work@tb.dut1.conn), line:17:15, endln:17:21 @@ -1252,6 +1270,8 @@ design: (work@dut) |vpiName:conn |vpiActual: \_ref_obj: (con_o), line:11:39, endln:11:44 + |vpiParent: + \_hier_path: (conn.con_o), line:11:34, endln:11:44 |vpiName:con_o |vpiExpr: \_ref_obj: (work@tb.dut1.conn), line:17:15, endln:17:21 diff --git a/tests/OneNetModPort/OneNetModPort.log b/tests/OneNetModPort/OneNetModPort.log index c13b51fe1c..7ed6c2abf6 100644 --- a/tests/OneNetModPort/OneNetModPort.log +++ b/tests/OneNetModPort/OneNetModPort.log @@ -188,6 +188,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (drive), line:5:51, endln:5:56 + |vpiParent: + \_hier_path: (intf.drive), line:5:46, endln:5:56 |vpiName:drive |vpiArgument: \_hier_path: (intf.observe), line:5:58, endln:5:70 @@ -201,6 +203,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (observe), line:5:63, endln:5:70 + |vpiParent: + \_hier_path: (intf.observe), line:5:58, endln:5:70 |vpiName:observe |vpiName:$monitor |vpiStmt: @@ -229,6 +233,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (drive) + |vpiParent: + \_hier_path: (intf.drive), line:6:5, endln:6:15 |vpiName:drive |vpiStmt: \_delay_control: , line:7:5, endln:7:7 @@ -256,6 +262,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (drive), line:7:20, endln:7:25 + |vpiParent: + \_hier_path: (intf.drive), line:7:15, endln:7:25 |vpiName:drive |vpiOperand: \_hier_path: (intf.observe), line:7:29, endln:7:41 @@ -269,6 +277,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (observe), line:7:34, endln:7:41 + |vpiParent: + \_hier_path: (intf.observe), line:7:29, endln:7:41 |vpiName:observe |vpiStmt: \_sys_func_call: ($display), line:7:43, endln:7:58 @@ -335,6 +345,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (drive) + |vpiParent: + \_hier_path: (intf.drive), line:8:10, endln:8:20 |vpiName:drive |vpiStmt: \_delay_control: , line:9:5, endln:9:7 @@ -362,6 +374,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (drive), line:9:20, endln:9:25 + |vpiParent: + \_hier_path: (intf.drive), line:9:15, endln:9:25 |vpiName:drive |vpiOperand: \_hier_path: (intf.observe), line:9:29, endln:9:41 @@ -375,6 +389,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (observe), line:9:34, endln:9:41 + |vpiParent: + \_hier_path: (intf.observe), line:9:29, endln:9:41 |vpiName:observe |vpiStmt: \_sys_func_call: ($display), line:9:43, endln:9:58 @@ -589,6 +605,8 @@ design: (work@TOP) |vpiName:conntb |vpiActual: \_ref_obj: (drive) + |vpiParent: + \_hier_path: (conntb.drive), line:3:10, endln:3:22 |vpiName:drive |vpiContAssign: \_cont_assign: , line:4:10, endln:4:28 @@ -606,6 +624,8 @@ design: (work@TOP) |vpiName:conntb |vpiActual: \_ref_obj: (observe), line:4:21, endln:4:28 + |vpiParent: + \_hier_path: (conntb.observe), line:4:14, endln:4:28 |vpiName:observe |vpiLhs: \_ref_obj: (work@dut.o), line:4:10, endln:4:11 @@ -687,6 +707,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (drive), line:23:22, endln:23:27 + |vpiParent: + \_hier_path: (intf.drive), line:23:17, endln:23:27 |vpiName:drive |vpiPort: \_port: (out), line:23:30, endln:23:48 @@ -701,6 +723,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (observe), line:23:40, endln:23:47 + |vpiParent: + \_hier_path: (intf.observe), line:23:35, endln:23:47 |vpiName:observe |uhdmtopModules: \_module_inst: work@TOP (work@TOP), file:${SURELOG_DIR}/tests/OneNetModPort/tb.v, line:15:1, endln:19:10 @@ -856,6 +880,8 @@ design: (work@TOP) |vpiName:conntb |vpiActual: \_ref_obj: (drive) + |vpiParent: + \_hier_path: (conntb.drive), line:17:12, endln:17:24 |vpiName:drive |vpiLowConn: \_ref_obj: (work@TOP.dut1.i), line:2:24, endln:2:25 @@ -881,6 +907,8 @@ design: (work@TOP) |vpiName:conntb |vpiActual: \_ref_obj: (observe), line:17:33, endln:17:40 + |vpiParent: + \_hier_path: (conntb.observe), line:17:26, endln:17:40 |vpiName:observe |vpiLowConn: \_ref_obj: (work@TOP.dut1.o), line:2:38, endln:2:39 @@ -1072,6 +1100,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (drive), line:23:22, endln:23:27 + |vpiParent: + \_hier_path: (intf.drive), line:23:17, endln:23:27 |vpiName:drive |vpiExpr: \_ref_obj: (work@TOP.dut1.middle1.intf), line:6:18, endln:6:24 @@ -1101,6 +1131,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (observe), line:23:40, endln:23:47 + |vpiParent: + \_hier_path: (intf.observe), line:23:35, endln:23:47 |vpiName:observe |vpiExpr: \_ref_obj: (work@TOP.dut1.middle1.intf), line:6:18, endln:6:24 diff --git a/tests/OneNetModPortGeneric/OneNetModPortGeneric.log b/tests/OneNetModPortGeneric/OneNetModPortGeneric.log index a910dd2836..0c424dec1e 100644 --- a/tests/OneNetModPortGeneric/OneNetModPortGeneric.log +++ b/tests/OneNetModPortGeneric/OneNetModPortGeneric.log @@ -202,6 +202,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (drive), line:5:51, endln:5:56 + |vpiParent: + \_hier_path: (intf.drive), line:5:46, endln:5:56 |vpiName:drive |vpiArgument: \_hier_path: (intf.observe), line:5:58, endln:5:70 @@ -215,6 +217,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (observe), line:5:63, endln:5:70 + |vpiParent: + \_hier_path: (intf.observe), line:5:58, endln:5:70 |vpiName:observe |vpiName:$monitor |vpiStmt: @@ -243,6 +247,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (drive) + |vpiParent: + \_hier_path: (intf.drive), line:6:5, endln:6:15 |vpiName:drive |vpiStmt: \_delay_control: , line:7:5, endln:7:7 @@ -270,6 +276,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (drive), line:7:20, endln:7:25 + |vpiParent: + \_hier_path: (intf.drive), line:7:15, endln:7:25 |vpiName:drive |vpiOperand: \_hier_path: (intf.observe), line:7:29, endln:7:41 @@ -283,6 +291,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (observe), line:7:34, endln:7:41 + |vpiParent: + \_hier_path: (intf.observe), line:7:29, endln:7:41 |vpiName:observe |vpiStmt: \_sys_func_call: ($display), line:7:43, endln:7:58 @@ -349,6 +359,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (drive) + |vpiParent: + \_hier_path: (intf.drive), line:8:10, endln:8:20 |vpiName:drive |vpiStmt: \_delay_control: , line:9:5, endln:9:7 @@ -376,6 +388,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (drive), line:9:20, endln:9:25 + |vpiParent: + \_hier_path: (intf.drive), line:9:15, endln:9:25 |vpiName:drive |vpiOperand: \_hier_path: (intf.observe), line:9:29, endln:9:41 @@ -389,6 +403,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (observe), line:9:34, endln:9:41 + |vpiParent: + \_hier_path: (intf.observe), line:9:29, endln:9:41 |vpiName:observe |vpiStmt: \_sys_func_call: ($display), line:9:43, endln:9:58 @@ -485,6 +501,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (observe), line:31:22, endln:31:29 + |vpiParent: + \_hier_path: (intf.observe), line:31:17, endln:31:29 |vpiName:observe |vpiLhs: \_ref_obj: (work@OBSERVER.obs), line:31:11, endln:31:14 @@ -593,6 +611,8 @@ design: (work@TOP) |vpiName:conntb |vpiActual: \_ref_obj: (drive), line:17:23, endln:17:28 + |vpiParent: + \_hier_path: (conntb.drive), line:17:16, endln:17:28 |vpiName:drive |vpiPort: \_port: (o), line:17:31, endln:17:49 @@ -607,6 +627,8 @@ design: (work@TOP) |vpiName:conntb |vpiActual: \_ref_obj: (observe), line:17:41, endln:17:48 + |vpiParent: + \_hier_path: (conntb.observe), line:17:34, endln:17:48 |vpiName:observe |vpiRefModule: \_ref_module: work@TESTBENCH (tb), line:18:13, endln:18:15 @@ -629,6 +651,8 @@ design: (work@TOP) |vpiName:conntb |vpiActual: \_ref_obj: (tb), line:18:29, endln:18:31 + |vpiParent: + \_hier_path: (conntb.tb), line:18:22, endln:18:31 |vpiName:tb |vpiRefModule: \_ref_module: work@OBSERVER (obs), line:19:12, endln:19:15 @@ -714,6 +738,8 @@ design: (work@TOP) |vpiName:conntb |vpiActual: \_ref_obj: (drive) + |vpiParent: + \_hier_path: (conntb.drive), line:3:10, endln:3:22 |vpiName:drive |vpiContAssign: \_cont_assign: , line:4:10, endln:4:28 @@ -731,6 +757,8 @@ design: (work@TOP) |vpiName:conntb |vpiActual: \_ref_obj: (observe), line:4:21, endln:4:28 + |vpiParent: + \_hier_path: (conntb.observe), line:4:14, endln:4:28 |vpiName:observe |vpiLhs: \_ref_obj: (work@dut.o), line:4:10, endln:4:11 @@ -769,6 +797,8 @@ design: (work@TOP) |vpiName:conntb |vpiActual: \_ref_obj: (dut), line:6:32, endln:6:35 + |vpiParent: + \_hier_path: (conntb.dut), line:6:25, endln:6:35 |vpiName:dut |uhdmallModules: \_module_inst: work@middle (work@middle), file:${SURELOG_DIR}/tests/OneNetModPortGeneric/dut.v, line:22:1, endln:24:10 @@ -816,6 +846,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (drive), line:23:22, endln:23:27 + |vpiParent: + \_hier_path: (intf.drive), line:23:17, endln:23:27 |vpiName:drive |vpiPort: \_port: (out), line:23:30, endln:23:48 @@ -830,6 +862,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (observe), line:23:40, endln:23:47 + |vpiParent: + \_hier_path: (intf.observe), line:23:35, endln:23:47 |vpiName:observe |uhdmtopModules: \_module_inst: work@TOP (work@TOP), file:${SURELOG_DIR}/tests/OneNetModPortGeneric/tb.v, line:15:1, endln:20:10 @@ -874,6 +908,8 @@ design: (work@TOP) |vpiName:conntb |vpiActual: \_ref_obj: (tb), line:18:29, endln:18:31 + |vpiParent: + \_hier_path: (conntb.tb), line:18:22, endln:18:31 |vpiName:tb |vpiLowConn: \_ref_obj: , line:1:31, endln:1:35 @@ -1013,6 +1049,8 @@ design: (work@TOP) |vpiName:conntb |vpiActual: \_ref_obj: (drive), line:17:23, endln:17:28 + |vpiParent: + \_hier_path: (conntb.drive), line:17:16, endln:17:28 |vpiName:drive |vpiLowConn: \_ref_obj: (work@TOP.dut1.i), line:17:14, endln:17:15 @@ -1038,6 +1076,8 @@ design: (work@TOP) |vpiName:conntb |vpiActual: \_ref_obj: (observe), line:17:41, endln:17:48 + |vpiParent: + \_hier_path: (conntb.observe), line:17:34, endln:17:48 |vpiName:observe |vpiLowConn: \_ref_obj: (work@TOP.dut1.o), line:17:32, endln:17:33 @@ -1150,6 +1190,8 @@ design: (work@TOP) |vpiName:conntb |vpiActual: \_ref_obj: (dut), line:6:32, endln:6:35 + |vpiParent: + \_hier_path: (conntb.dut), line:6:25, endln:6:35 |vpiName:dut |vpiLowConn: \_ref_obj: , line:22:26, endln:22:30 @@ -1241,6 +1283,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (drive), line:23:22, endln:23:27 + |vpiParent: + \_hier_path: (intf.drive), line:23:17, endln:23:27 |vpiName:drive |vpiExpr: \_logic_net: (work@TOP.dut1.middle1.intf), line:22:26, endln:22:30 @@ -1272,6 +1316,8 @@ design: (work@TOP) |vpiName:intf |vpiActual: \_ref_obj: (observe), line:23:40, endln:23:47 + |vpiParent: + \_hier_path: (intf.observe), line:23:35, endln:23:47 |vpiName:observe |vpiExpr: \_logic_net: (work@TOP.dut1.middle1.intf), line:22:26, endln:22:30 diff --git a/tests/OneNetRange/OneNetRange.log b/tests/OneNetRange/OneNetRange.log index 50d882f183..9cfa3ec2b7 100644 --- a/tests/OneNetRange/OneNetRange.log +++ b/tests/OneNetRange/OneNetRange.log @@ -686,6 +686,8 @@ design: (work@TOP) |vpiName:conntb |vpiActual: \_ref_obj: (con_i), line:21:31, endln:21:36 + |vpiParent: + \_hier_path: (conntb.con_i), line:21:24, endln:21:36 |vpiName:con_i |vpiPort: \_port: (o), line:21:39, endln:21:55 @@ -700,6 +702,8 @@ design: (work@TOP) |vpiName:conntb |vpiActual: \_ref_obj: (con_o), line:21:49, endln:21:54 + |vpiParent: + \_hier_path: (conntb.con_o), line:21:42, endln:21:54 |vpiName:con_o |vpiRefModule: \_ref_module: work@TESTBENCH (tb), line:22:22, endln:22:24 @@ -722,6 +726,8 @@ design: (work@TOP) |vpiName:conntb |vpiActual: \_ref_obj: (con_o), line:22:41, endln:22:46 + |vpiParent: + \_hier_path: (conntb.con_o), line:22:34, endln:22:46 |vpiName:con_o |vpiPort: \_port: (drive), line:22:48, endln:22:68 @@ -736,6 +742,8 @@ design: (work@TOP) |vpiName:conntb |vpiActual: \_ref_obj: (con_i), line:22:62, endln:22:67 + |vpiParent: + \_hier_path: (conntb.con_i), line:22:55, endln:22:67 |vpiName:con_i |uhdmallModules: \_module_inst: work@dut (work@dut), file:${SURELOG_DIR}/tests/OneNetRange/dut.v, line:2:1, endln:5:10 @@ -968,6 +976,8 @@ design: (work@TOP) |vpiName:conn |vpiActual: \_ref_obj: (con_i), line:12:39, endln:12:44 + |vpiParent: + \_hier_path: (conn.con_i), line:12:34, endln:12:44 |vpiName:con_i |vpiPort: \_port: (out), line:12:46, endln:12:62 @@ -982,6 +992,8 @@ design: (work@TOP) |vpiName:conn |vpiActual: \_ref_obj: (con_o), line:12:56, endln:12:61 + |vpiParent: + \_hier_path: (conn.con_o), line:12:51, endln:12:61 |vpiName:con_o |uhdmtopModules: \_module_inst: work@TOP (work@TOP), file:${SURELOG_DIR}/tests/OneNetRange/tb.v, line:16:1, endln:23:10 @@ -1096,6 +1108,8 @@ design: (work@TOP) |vpiName:conntb |vpiActual: \_ref_obj: (con_o), line:22:41, endln:22:46 + |vpiParent: + \_hier_path: (conntb.con_o), line:22:34, endln:22:46 |vpiName:con_o |vpiLowConn: \_ref_obj: (work@TOP.tb.observe), line:22:26, endln:22:33 @@ -1141,6 +1155,8 @@ design: (work@TOP) |vpiName:conntb |vpiActual: \_ref_obj: (con_i), line:22:62, endln:22:67 + |vpiParent: + \_hier_path: (conntb.con_i), line:22:55, endln:22:67 |vpiName:con_i |vpiLowConn: \_ref_obj: (work@TOP.tb.drive), line:22:49, endln:22:54 @@ -1503,6 +1519,8 @@ design: (work@TOP) |vpiName:conntb |vpiActual: \_ref_obj: (con_i), line:21:31, endln:21:36 + |vpiParent: + \_hier_path: (conntb.con_i), line:21:24, endln:21:36 |vpiName:con_i |vpiLowConn: \_ref_obj: (work@TOP.dut1.i), line:21:22, endln:21:23 @@ -1548,6 +1566,8 @@ design: (work@TOP) |vpiName:conntb |vpiActual: \_ref_obj: (con_o), line:21:49, endln:21:54 + |vpiParent: + \_hier_path: (conntb.con_o), line:21:42, endln:21:54 |vpiName:con_o |vpiLowConn: \_ref_obj: (work@TOP.dut1.o), line:21:40, endln:21:41 @@ -1923,6 +1943,8 @@ design: (work@TOP) |vpiName:conn |vpiActual: \_ref_obj: (con_i), line:12:39, endln:12:44 + |vpiParent: + \_hier_path: (conn.con_i), line:12:34, endln:12:44 |vpiName:con_i |vpiExpr: \_ref_obj: (work@TOP.dut1.middle1.conn), line:4:35, endln:4:41 @@ -1972,6 +1994,8 @@ design: (work@TOP) |vpiName:conn |vpiActual: \_ref_obj: (con_o), line:12:56, endln:12:61 + |vpiParent: + \_hier_path: (conn.con_o), line:12:51, endln:12:61 |vpiName:con_o |vpiExpr: \_ref_obj: (work@TOP.dut1.middle1.conn), line:4:35, endln:4:41 diff --git a/tests/PackedArrayBind/PackedArrayBind.log b/tests/PackedArrayBind/PackedArrayBind.log index 1bbe6d8d7a..fb2ad5d8e8 100644 --- a/tests/PackedArrayBind/PackedArrayBind.log +++ b/tests/PackedArrayBind/PackedArrayBind.log @@ -388,6 +388,8 @@ design: (work@PreDecodeStage) |vpiName:memOpInfo |vpiActual: \_ref_obj: (mshrID), line:24:54, endln:24:60 + |vpiParent: + \_hier_path: (replayEntryOut.memData[0].memOpInfo.mshrID), line:24:18, endln:24:60 |vpiName:mshrID |vpiLhs: \_ref_obj: (work@PreDecodeStage.mshrID), line:24:9, endln:24:15 diff --git a/tests/ParamArray/ParamArray.log b/tests/ParamArray/ParamArray.log index 8a1a926632..14fab2eb30 100644 --- a/tests/ParamArray/ParamArray.log +++ b/tests/ParamArray/ParamArray.log @@ -1721,6 +1721,8 @@ design: (work@top) |vpiName:Info |vpiActual: \_ref_obj: (size) + |vpiParent: + \_hier_path: (Info.size), line:36:33, endln:36:42 |vpiName:size |vpiOperand: \_constant: , line:36:46, endln:36:47 diff --git a/tests/ParamArraySelect/ParamArraySelect.log b/tests/ParamArraySelect/ParamArraySelect.log index d5728d08a2..2d6aac709c 100644 --- a/tests/ParamArraySelect/ParamArraySelect.log +++ b/tests/ParamArraySelect/ParamArraySelect.log @@ -2109,6 +2109,8 @@ design: (work@top) |vpiName:Info |vpiActual: \_ref_obj: (size) + |vpiParent: + \_hier_path: (Info.size), line:40:33, endln:40:42 |vpiName:size |vpiOperand: \_constant: , line:40:46, endln:40:47 diff --git a/tests/ParamOverload3/ParamOverload3.log b/tests/ParamOverload3/ParamOverload3.log index 5739a5ad25..5531c6dd56 100644 --- a/tests/ParamOverload3/ParamOverload3.log +++ b/tests/ParamOverload3/ParamOverload3.log @@ -1878,6 +1878,8 @@ design: (work@top) |vpiName:Features |vpiActual: \_ref_obj: (Width) + |vpiParent: + \_hier_path: (Features.Width), line:46:22, endln:46:36 |vpiName:Width |vpiLhs: \_parameter: (work@top.WIDTH), line:46:14, endln:46:19 diff --git a/tests/ParamSubstituteComplex/ParamSubstituteComplex.log b/tests/ParamSubstituteComplex/ParamSubstituteComplex.log index ccf7148157..5ea7bd8a10 100644 --- a/tests/ParamSubstituteComplex/ParamSubstituteComplex.log +++ b/tests/ParamSubstituteComplex/ParamSubstituteComplex.log @@ -1302,6 +1302,8 @@ design: (work@top) |vpiName:Features |vpiActual: \_ref_obj: (FpFmtMask) + |vpiParent: + \_hier_path: (Features.FpFmtMask), line:41:45, endln:41:63 |vpiName:FpFmtMask |vpiLhs: \_parameter: (work@top.FpFmtMask), line:41:29, endln:41:38 diff --git a/tests/PartSelectParent/PartSelectParent.log b/tests/PartSelectParent/PartSelectParent.log index c42ed4809a..e2322a2d1a 100644 --- a/tests/PartSelectParent/PartSelectParent.log +++ b/tests/PartSelectParent/PartSelectParent.log @@ -243,8 +243,11 @@ design: (work@top) |vpiOperand: \_part_select: , line:4:8, endln:4:14 |vpiParent: - \_ref_obj: o (o) + \_ref_obj: o (work@top.o) + |vpiParent: + \_begin: (work@top), line:2:12, endln:5:7 |vpiName:o + |vpiFullName:work@top.o |vpiDefName:o |vpiConstantSelect:1 |vpiLeftRange: diff --git a/tests/PreprocLine/PreprocLine.log b/tests/PreprocLine/PreprocLine.log index 372563fdd9..6630146474 100644 --- a/tests/PreprocLine/PreprocLine.log +++ b/tests/PreprocLine/PreprocLine.log @@ -16,38 +16,38 @@ n u<3> t p<4> l<1:8> el<1:11> n<> u<4> t p<66> c<2> s<64> l<1:1> el<1:12> n<> u<5> t p<17> s<6> l<3:9> el<3:10> n u<6> t p<17> s<16> l<3:10> el<3:17> -n<"${SURELOG_DIR}/tests/PreprocLine/dut.sv"> u<7> t p<8> l<3:18> el<3:64> -n<> u<8> t p<9> c<7> l<3:18> el<3:64> -n<> u<9> t p<10> c<8> l<3:18> el<3:64> -n<> u<10> t p<16> c<9> s<15> l<3:18> el<3:64> -n<3> u<11> t p<12> l<3:66> el<3:67> -n<> u<12> t p<13> c<11> l<3:66> el<3:67> -n<> u<13> t p<14> c<12> l<3:66> el<3:67> -n<> u<14> t p<15> c<13> l<3:66> el<3:67> -n<> u<15> t p<16> c<14> l<3:66> el<3:67> -n<> u<16> t p<17> c<10> l<3:18> el<3:67> -n<> u<17> t p<18> c<5> l<3:9> el<3:68> -n<> u<18> t p<19> c<17> l<3:9> el<3:69> -n<> u<19> t p<20> c<18> l<3:9> el<3:69> -n<> u<20> t p<21> c<19> l<3:9> el<3:69> -n<> u<21> t p<57> c<20> s<38> l<3:9> el<3:69> +n<"${SURELOG_DIR}/tests/PreprocLine/dut.sv"> u<7> t p<8> l<3:18> el<3:78> +n<> u<8> t p<9> c<7> l<3:18> el<3:78> +n<> u<9> t p<10> c<8> l<3:18> el<3:78> +n<> u<10> t p<16> c<9> s<15> l<3:18> el<3:78> +n<3> u<11> t p<12> l<3:80> el<3:81> +n<> u<12> t p<13> c<11> l<3:80> el<3:81> +n<> u<13> t p<14> c<12> l<3:80> el<3:81> +n<> u<14> t p<15> c<13> l<3:80> el<3:81> +n<> u<15> t p<16> c<14> l<3:80> el<3:81> +n<> u<16> t p<17> c<10> l<3:18> el<3:81> +n<> u<17> t p<18> c<5> l<3:9> el<3:82> +n<> u<18> t p<19> c<17> l<3:9> el<3:83> +n<> u<19> t p<20> c<18> l<3:9> el<3:83> +n<> u<20> t p<21> c<19> l<3:9> el<3:83> +n<> u<21> t p<57> c<20> s<38> l<3:9> el<3:83> n<> u<22> t p<34> s<23> l<5:9> el<5:10> n u<23> t p<34> s<33> l<5:10> el<5:17> -n<"${SURELOG_DIR}/tests/PreprocLine/fake.v"> u<24> t p<25> l<5:18> el<5:64> -n<> u<25> t p<26> c<24> l<5:18> el<5:64> -n<> u<26> t p<27> c<25> l<5:18> el<5:64> -n<> u<27> t p<33> c<26> s<32> l<5:18> el<5:64> -n<102> u<28> t p<29> l<5:66> el<5:69> -n<> u<29> t p<30> c<28> l<5:66> el<5:69> -n<> u<30> t p<31> c<29> l<5:66> el<5:69> -n<> u<31> t p<32> c<30> l<5:66> el<5:69> -n<> u<32> t p<33> c<31> l<5:66> el<5:69> -n<> u<33> t p<34> c<27> l<5:18> el<5:69> -n<> u<34> t p<35> c<22> l<5:9> el<5:70> -n<> u<35> t p<36> c<34> l<5:9> el<5:71> -n<> u<36> t p<37> c<35> l<5:9> el<5:71> -n<> u<37> t p<38> c<36> l<5:9> el<5:71> -n<> u<38> t p<57> c<37> s<55> l<5:9> el<5:71> +n<"${SURELOG_DIR}/tests/PreprocLine/fake.v"> u<24> t p<25> l<5:18> el<5:78> +n<> u<25> t p<26> c<24> l<5:18> el<5:78> +n<> u<26> t p<27> c<25> l<5:18> el<5:78> +n<> u<27> t p<33> c<26> s<32> l<5:18> el<5:78> +n<102> u<28> t p<29> l<5:80> el<5:83> +n<> u<29> t p<30> c<28> l<5:80> el<5:83> +n<> u<30> t p<31> c<29> l<5:80> el<5:83> +n<> u<31> t p<32> c<30> l<5:80> el<5:83> +n<> u<32> t p<33> c<31> l<5:80> el<5:83> +n<> u<33> t p<34> c<27> l<5:18> el<5:83> +n<> u<34> t p<35> c<22> l<5:9> el<5:84> +n<> u<35> t p<36> c<34> l<5:9> el<5:85> +n<> u<36> t p<37> c<35> l<5:9> el<5:85> +n<> u<37> t p<38> c<36> l<5:9> el<5:85> +n<> u<38> t p<57> c<37> s<55> l<5:9> el<5:85> n<> u<39> t p<51> s<40> f<0> l<10:9> el<10:10> n u<40> t p<51> s<50> f<0> l<10:10> el<10:17> n<""> u<41> t p<42> f<0> l<10:18> el<10:20> diff --git a/tests/SelectHierPath/SelectHierPath.log b/tests/SelectHierPath/SelectHierPath.log index 069509c3f2..dc501124c8 100644 --- a/tests/SelectHierPath/SelectHierPath.log +++ b/tests/SelectHierPath/SelectHierPath.log @@ -198,6 +198,8 @@ design: (work@IntegerRegisterWriteStage) |vpiName:brResult |vpiActual: \_ref_obj: (nextAddr), line:14:32, endln:14:40 + |vpiParent: + \_hier_path: (pipeReg[1].brResult.nextAddr), line:14:12, endln:14:40 |vpiName:nextAddr |vpiLhs: \_ref_obj: (work@IntegerRegisterWriteStage.o), line:14:8, endln:14:9 diff --git a/tests/SelectSelect/SelectSelect.log b/tests/SelectSelect/SelectSelect.log index 694bee10b9..df5507509b 100644 --- a/tests/SelectSelect/SelectSelect.log +++ b/tests/SelectSelect/SelectSelect.log @@ -1107,6 +1107,8 @@ design: (work@adc_ctrl_core) |vpiConstType:9 |vpiActual: \_ref_obj: (min_v), line:7:28, endln:7:33 + |vpiParent: + \_hier_path: (a[0][0].min_v), line:7:20, endln:7:33 |vpiName:min_v |vpiRange: \_range: , line:7:10, endln:7:15 diff --git a/tests/Selects/Selects.log b/tests/Selects/Selects.log index 91e54f373c..3e72124468 100644 --- a/tests/Selects/Selects.log +++ b/tests/Selects/Selects.log @@ -389,6 +389,8 @@ design: (work@t) |vpiConstType:9 |vpiActual: \_ref_obj: (q), line:14:37, endln:14:38 + |vpiParent: + \_hier_path: (reg2hw.sw_rst_ctrl_n[0].q), line:14:13, endln:14:38 |vpiName:q |vpiVariables: \_logic_var: (work@t.Y), line:15:9, endln:15:31 @@ -418,6 +420,8 @@ design: (work@t) |vpiConstType:9 |vpiActual: \_ref_obj: (q), line:15:30, endln:15:31 + |vpiParent: + \_hier_path: (sw_rst_ctrl_n[0].q), line:15:13, endln:15:31 |vpiName:q |vpiTypedef: \_struct_typespec: (rstmgr_reg2hw_sw_rst_ctrl_n_mreg_t), line:3:11, endln:3:17 diff --git a/tests/StringMethod/StringMethod.log b/tests/StringMethod/StringMethod.log index 3f4f2da690..a2930ede95 100644 --- a/tests/StringMethod/StringMethod.log +++ b/tests/StringMethod/StringMethod.log @@ -1042,8 +1042,11 @@ design: (work@top) |vpiConstType:6 |vpiName:putc |vpiPrefix: - \_ref_obj: (s), line:5:7, endln:5:8 + \_ref_obj: (work@top.s), line:5:7, endln:5:8 + |vpiParent: + \_method_func_call: (putc), line:5:9, endln:5:13 |vpiName:s + |vpiFullName:work@top.s |uhdmtopModules: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/StringMethod/dut.sv, line:1:1, endln:10:10 |vpiName:work@top diff --git a/tests/StringRange/StringRange.log b/tests/StringRange/StringRange.log index 8c2f6db180..ac74b25fa6 100644 --- a/tests/StringRange/StringRange.log +++ b/tests/StringRange/StringRange.log @@ -2514,8 +2514,11 @@ design: (work@top) |vpiArgument: \_part_select: , line:33:36, endln:33:48 |vpiParent: - \_ref_obj: OUTPUT (OUTPUT), line:33:36, endln:33:42 + \_ref_obj: OUTPUT (work@Example.OUTPUT), line:33:36, endln:33:42 + |vpiParent: + \_func_call: (flip), line:33:31, endln:33:49 |vpiName:OUTPUT + |vpiFullName:work@Example.OUTPUT |vpiDefName:OUTPUT |vpiConstantSelect:1 |vpiLeftRange: diff --git a/tests/StructAccess/StructAccess.log b/tests/StructAccess/StructAccess.log index 30e3f8be87..060e0e7b15 100644 --- a/tests/StructAccess/StructAccess.log +++ b/tests/StructAccess/StructAccess.log @@ -1256,6 +1256,8 @@ design: (work@top) |vpiName:csr_pmp_cfg_ie |vpiActual: \_ref_obj: (mode) + |vpiParent: + \_hier_path: (csr_pmp_cfg_ie.mode), line:28:9, endln:28:28 |vpiName:mode |uhdmtopModules: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/StructAccess/dut.sv, line:1:1, endln:30:10 @@ -1374,6 +1376,8 @@ design: (work@top) |vpiConstType:9 |vpiActual: \_ref_obj: (mode), line:24:40, endln:24:44 + |vpiParent: + \_hier_path: (csr_pmp_cfg_i[0].mode), line:24:23, endln:24:44 |vpiName:mode |vpiVariables: \_logic_var: (work@top.second), line:25:8, endln:25:39 @@ -1434,6 +1438,8 @@ design: (work@top) |vpiName:struct_var |vpiActual: \_ref_obj: (a), line:26:42, endln:26:43 + |vpiParent: + \_hier_path: (csr_pmp_cfg_ie.struct_var.a), line:26:16, endln:26:43 |vpiName:a |vpiTypedef: \_enum_typespec: (pmp_cfg_enum), line:3:2, endln:5:17 diff --git a/tests/StructStructHierPath/StructStructHierPath.log b/tests/StructStructHierPath/StructStructHierPath.log index d520b58a82..ce4f63cc09 100644 --- a/tests/StructStructHierPath/StructStructHierPath.log +++ b/tests/StructStructHierPath/StructStructHierPath.log @@ -906,6 +906,8 @@ design: (work@r5p_wbu) |vpiName:e |vpiActual: \_ref_obj: (rd), line:33:22, endln:33:24 + |vpiParent: + \_hier_path: (ctl.gpr.e.rd), line:33:12, endln:33:24 |vpiName:rd |vpiLhs: \_ref_obj: (work@r5p_wbu.wen), line:33:5, endln:33:8 diff --git a/tests/TypeParamOverride/TypeParamOverride.log b/tests/TypeParamOverride/TypeParamOverride.log index 3b52843971..86cf63ffcb 100644 --- a/tests/TypeParamOverride/TypeParamOverride.log +++ b/tests/TypeParamOverride/TypeParamOverride.log @@ -366,6 +366,8 @@ design: (work@ariane_testharness) |vpiName:err_resp |vpiActual: \_ref_obj: (w_ready) + |vpiParent: + \_hier_path: (err_resp.w_ready), line:17:5, endln:17:21 |vpiName:w_ready |vpiAlwaysType:2 |uhdmtopModules: diff --git a/tests/TypedefUnpacked/TypedefUnpacked.log b/tests/TypedefUnpacked/TypedefUnpacked.log index 20b8cc5502..4d51146d05 100644 --- a/tests/TypedefUnpacked/TypedefUnpacked.log +++ b/tests/TypedefUnpacked/TypedefUnpacked.log @@ -271,6 +271,8 @@ design: (work@dut) |vpiConstType:9 |vpiActual: \_ref_obj: (x), line:11:20, endln:11:21 + |vpiParent: + \_hier_path: (c[1].x), line:11:15, endln:11:21 |vpiName:x |vpiLhs: \_ref_obj: (work@dut.o), line:11:11, endln:11:12 diff --git a/tests/UhdmCoverage/UhdmCoverage.log b/tests/UhdmCoverage/UhdmCoverage.log index f4e903660f..6fe27cca5c 100644 --- a/tests/UhdmCoverage/UhdmCoverage.log +++ b/tests/UhdmCoverage/UhdmCoverage.log @@ -1526,6 +1526,8 @@ design: (work@divSqrtRecFNToRaw_small) |vpiName:resp_concentrated_link_lo |vpiActual: \_ref_obj: (data), line:102:77, endln:102:81 + |vpiParent: + \_hier_path: (resp_concentrated_link_lo.data), line:102:51, endln:102:81 |vpiName:data |vpiTypespec: \_string_typespec: (data), line:102:35, endln:102:39 @@ -1544,6 +1546,8 @@ design: (work@divSqrtRecFNToRaw_small) |vpiName:resp_concentrated_link_lo |vpiActual: \_ref_obj: (v), line:103:83, endln:103:84 + |vpiParent: + \_hier_path: (resp_concentrated_link_lo.v), line:103:57, endln:103:84 |vpiName:v |vpiTypespec: \_string_typespec: (v), line:103:42, endln:103:43 @@ -1562,6 +1566,8 @@ design: (work@divSqrtRecFNToRaw_small) |vpiName:cce_lce_resp_link_lo |vpiActual: \_ref_obj: (ready_and_rev), line:104:74, endln:104:87 + |vpiParent: + \_hier_path: (cce_lce_resp_link_lo.ready_and_rev), line:104:53, endln:104:87 |vpiName:ready_and_rev |vpiTypespec: \_string_typespec: (ready_and_rev), line:104:38, endln:104:51 diff --git a/tests/UnionCast/UnionCast.log b/tests/UnionCast/UnionCast.log index 07be32e420..a4dfc45ea6 100644 --- a/tests/UnionCast/UnionCast.log +++ b/tests/UnionCast/UnionCast.log @@ -6610,6 +6610,8 @@ design: (work@r5p_lsu) |vpiName:r |vpiActual: \_ref_obj: (rd), line:161:20, endln:161:22 + |vpiParent: + \_hier_path: (dec.r.rd), line:161:14, endln:161:22 |vpiName:rd |vpiLhs: \_ref_obj: (work@r5p_lsu.rd), line:161:8, endln:161:10 @@ -6640,6 +6642,8 @@ design: (work@r5p_lsu) |vpiName:r |vpiActual: \_ref_obj: (rs1), line:162:20, endln:162:23 + |vpiParent: + \_hier_path: (dec.r.rs1), line:162:14, endln:162:23 |vpiName:rs1 |vpiLhs: \_ref_obj: (work@r5p_lsu.rs1), line:162:8, endln:162:11 @@ -6670,6 +6674,8 @@ design: (work@r5p_lsu) |vpiName:r |vpiActual: \_ref_obj: (rs2), line:163:20, endln:163:23 + |vpiParent: + \_hier_path: (dec.r.rs2), line:163:14, endln:163:23 |vpiName:rs2 |vpiLhs: \_ref_obj: (work@r5p_lsu.rs2), line:163:8, endln:163:11 @@ -6700,6 +6706,8 @@ design: (work@r5p_lsu) |vpiName:i |vpiActual: \_ref_obj: (imm_11_0), line:164:20, endln:164:28 + |vpiParent: + \_hier_path: (dec.i.imm_11_0), line:164:14, endln:164:28 |vpiName:imm_11_0 |vpiLhs: \_ref_obj: (work@r5p_lsu.imm), line:164:8, endln:164:11 diff --git a/tests/UnitForeach/UnitForeach.log b/tests/UnitForeach/UnitForeach.log index abe486cecb..819949b5c6 100644 --- a/tests/UnitForeach/UnitForeach.log +++ b/tests/UnitForeach/UnitForeach.log @@ -870,8 +870,11 @@ design: (unnamed) |vpiName:size |vpiName:print_array_header |vpiPrefix: - \_ref_obj: (printer), line:7:5, endln:7:12 + \_ref_obj: (uvm_pkg::uvm_sequencer_base::do_print::printer), line:7:5, endln:7:12 + |vpiParent: + \_method_func_call: (print_array_header), line:7:13, endln:7:31 |vpiName:printer + |vpiFullName:uvm_pkg::uvm_sequencer_base::do_print::printer |vpiStmt: \_foreach_stmt: (uvm_pkg::uvm_sequencer_base::do_print), line:8:5, endln:8:12 |vpiParent: @@ -984,6 +987,8 @@ design: (unnamed) |vpiFullName:uvm_pkg::uvm_sequencer_base::do_print::i |vpiActual: \_ref_obj: (sequence_id), line:10:85, endln:10:96 + |vpiParent: + \_hier_path: (arb_sequence_q[i].sequence_id), line:10:67, endln:10:96 |vpiName:sequence_id |vpiName:$sformatf |vpiArgument: @@ -996,8 +1001,11 @@ design: (unnamed) |vpiConstType:6 |vpiName:print_string |vpiPrefix: - \_ref_obj: (printer), line:9:7, endln:9:14 + \_ref_obj: (uvm_pkg::uvm_sequencer_base::do_print::printer), line:9:7, endln:9:14 + |vpiParent: + \_method_func_call: (print_string), line:9:15, endln:9:27 |vpiName:printer + |vpiFullName:uvm_pkg::uvm_sequencer_base::do_print::printer |vpiInstance: \_package: uvm_pkg (uvm_pkg::), file:${SURELOG_DIR}/tests/UnitForeach/top2.v, line:3:1, endln:14:11 |uhdmtopPackages: @@ -1115,8 +1123,11 @@ design: (unnamed) |vpiName:size |vpiName:print_array_header |vpiPrefix: - \_ref_obj: (printer), line:7:5, endln:7:12 + \_ref_obj: (uvm_pkg::uvm_sequencer_base::do_print::printer), line:7:5, endln:7:12 + |vpiParent: + \_method_func_call: (print_array_header), line:7:13, endln:7:31 |vpiName:printer + |vpiFullName:uvm_pkg::uvm_sequencer_base::do_print::printer |vpiStmt: \_foreach_stmt: (uvm_pkg::uvm_sequencer_base::do_print), line:8:5, endln:8:12 |vpiParent: @@ -1229,6 +1240,8 @@ design: (unnamed) \_int_var: (i), line:8:29, endln:8:30 |vpiActual: \_ref_obj: (sequence_id), line:10:85, endln:10:96 + |vpiParent: + \_hier_path: (arb_sequence_q[i].sequence_id), line:10:67, endln:10:96 |vpiName:sequence_id |vpiName:$sformatf |vpiArgument: @@ -1241,8 +1254,11 @@ design: (unnamed) |vpiConstType:6 |vpiName:print_string |vpiPrefix: - \_ref_obj: (printer), line:9:7, endln:9:14 + \_ref_obj: (uvm_pkg::uvm_sequencer_base::do_print::printer), line:9:7, endln:9:14 + |vpiParent: + \_method_func_call: (print_string), line:9:15, endln:9:27 |vpiName:printer + |vpiFullName:uvm_pkg::uvm_sequencer_base::do_print::printer |vpiInstance: \_package: uvm_pkg (uvm_pkg::), file:${SURELOG_DIR}/tests/UnitForeach/top2.v, line:3:1, endln:14:11 |uhdmallClasses: @@ -1795,8 +1811,11 @@ design: (unnamed) |vpiFullName:work@uvm_reg_map::set_check_on_read::an_obj |vpiName:push_back |vpiPrefix: - \_ref_obj: (m_submaps3), line:52:6, endln:52:16 + \_ref_obj: (work@uvm_reg_map::set_check_on_read::m_submaps3), line:52:6, endln:52:16 + |vpiParent: + \_method_func_call: (push_back), line:52:17, endln:52:26 |vpiName:m_submaps3 + |vpiFullName:work@uvm_reg_map::set_check_on_read::m_submaps3 |vpiStmt: \_foreach_stmt: (work@uvm_reg_map::set_check_on_read), line:54:6, endln:54:13 |vpiParent: @@ -1833,32 +1852,44 @@ design: (unnamed) \_begin: (work@uvm_reg_map::set_check_on_read), line:54:34, endln:59:10 |vpiName:set_check_on_read |vpiPrefix: - \_ref_obj: (submap), line:55:11, endln:55:17 + \_ref_obj: (work@uvm_reg_map::set_check_on_read::submap), line:55:11, endln:55:17 + |vpiParent: + \_method_func_call: (set_check_on_read), line:55:18, endln:55:35 |vpiName:submap + |vpiFullName:work@uvm_reg_map::set_check_on_read::submap |vpiStmt: \_method_func_call: (bad1), line:56:18, endln:56:22 |vpiParent: \_begin: (work@uvm_reg_map::set_check_on_read), line:54:34, endln:59:10 |vpiName:bad1 |vpiPrefix: - \_ref_obj: (submap), line:56:11, endln:56:17 + \_ref_obj: (work@uvm_reg_map::set_check_on_read::submap), line:56:11, endln:56:17 + |vpiParent: + \_method_func_call: (bad1), line:56:18, endln:56:22 |vpiName:submap + |vpiFullName:work@uvm_reg_map::set_check_on_read::submap |vpiStmt: \_method_func_call: (bad2), line:57:29, endln:57:33 |vpiParent: \_begin: (work@uvm_reg_map::set_check_on_read), line:54:34, endln:59:10 |vpiName:bad2 |vpiPrefix: - \_ref_obj: (m_submaps), line:57:11, endln:57:20 + \_ref_obj: (work@uvm_reg_map::set_check_on_read::m_submaps), line:57:11, endln:57:20 + |vpiParent: + \_method_func_call: (bad2), line:57:29, endln:57:33 |vpiName:m_submaps + |vpiFullName:work@uvm_reg_map::set_check_on_read::m_submaps |vpiStmt: \_method_func_call: (mine), line:58:29, endln:58:33 |vpiParent: \_begin: (work@uvm_reg_map::set_check_on_read), line:54:34, endln:59:10 |vpiName:mine |vpiPrefix: - \_ref_obj: (m_submaps), line:58:11, endln:58:20 + \_ref_obj: (work@uvm_reg_map::set_check_on_read::m_submaps), line:58:11, endln:58:20 + |vpiParent: + \_method_func_call: (mine), line:58:29, endln:58:33 |vpiName:m_submaps + |vpiFullName:work@uvm_reg_map::set_check_on_read::m_submaps |vpiStmt: \_foreach_stmt: (work@uvm_reg_map::set_check_on_read), line:61:6, endln:61:13 |vpiParent: @@ -1895,24 +1926,33 @@ design: (unnamed) \_begin: (work@uvm_reg_map::set_check_on_read), line:61:30, endln:65:10 |vpiName:bad3 |vpiPrefix: - \_ref_obj: (i), line:62:11, endln:62:12 + \_ref_obj: (work@uvm_reg_map::set_check_on_read::i), line:62:11, endln:62:12 + |vpiParent: + \_method_func_call: (bad3), line:62:13, endln:62:17 |vpiName:i + |vpiFullName:work@uvm_reg_map::set_check_on_read::i |vpiStmt: \_method_func_call: (bad4), line:63:24, endln:63:28 |vpiParent: \_begin: (work@uvm_reg_map::set_check_on_read), line:61:30, endln:65:10 |vpiName:bad4 |vpiPrefix: - \_ref_obj: (m_submaps), line:63:11, endln:63:20 + \_ref_obj: (work@uvm_reg_map::set_check_on_read::m_submaps), line:63:11, endln:63:20 + |vpiParent: + \_method_func_call: (bad4), line:63:24, endln:63:28 |vpiName:m_submaps + |vpiFullName:work@uvm_reg_map::set_check_on_read::m_submaps |vpiStmt: \_method_func_call: (mine), line:64:24, endln:64:28 |vpiParent: \_begin: (work@uvm_reg_map::set_check_on_read), line:61:30, endln:65:10 |vpiName:mine |vpiPrefix: - \_ref_obj: (m_submaps), line:64:11, endln:64:20 + \_ref_obj: (work@uvm_reg_map::set_check_on_read::m_submaps), line:64:11, endln:64:20 + |vpiParent: + \_method_func_call: (mine), line:64:24, endln:64:28 |vpiName:m_submaps + |vpiFullName:work@uvm_reg_map::set_check_on_read::m_submaps |vpiStmt: \_foreach_stmt: (work@uvm_reg_map::set_check_on_read), line:67:5, endln:67:12 |vpiParent: @@ -1949,24 +1989,33 @@ design: (unnamed) \_begin: (work@uvm_reg_map::set_check_on_read), line:67:29, endln:71:10 |vpiName:bad5 |vpiPrefix: - \_ref_obj: (i), line:68:10, endln:68:11 + \_ref_obj: (work@uvm_reg_map::set_check_on_read::i), line:68:10, endln:68:11 + |vpiParent: + \_method_func_call: (bad5), line:68:12, endln:68:16 |vpiName:i + |vpiFullName:work@uvm_reg_map::set_check_on_read::i |vpiStmt: \_method_func_call: (bad6), line:69:24, endln:69:28 |vpiParent: \_begin: (work@uvm_reg_map::set_check_on_read), line:67:29, endln:71:10 |vpiName:bad6 |vpiPrefix: - \_ref_obj: (m_submaps3), line:69:10, endln:69:20 + \_ref_obj: (work@uvm_reg_map::set_check_on_read::m_submaps3), line:69:10, endln:69:20 + |vpiParent: + \_method_func_call: (bad6), line:69:24, endln:69:28 |vpiName:m_submaps3 + |vpiFullName:work@uvm_reg_map::set_check_on_read::m_submaps3 |vpiStmt: \_method_func_call: (mine), line:70:24, endln:70:28 |vpiParent: \_begin: (work@uvm_reg_map::set_check_on_read), line:67:29, endln:71:10 |vpiName:mine |vpiPrefix: - \_ref_obj: (m_submaps3), line:70:10, endln:70:20 + \_ref_obj: (work@uvm_reg_map::set_check_on_read::m_submaps3), line:70:10, endln:70:20 + |vpiParent: + \_method_func_call: (mine), line:70:24, endln:70:28 |vpiName:m_submaps3 + |vpiFullName:work@uvm_reg_map::set_check_on_read::m_submaps3 |vpiStmt: \_foreach_stmt: (work@uvm_reg_map::set_check_on_read), line:74:6, endln:74:13 |vpiParent: @@ -2003,16 +2052,22 @@ design: (unnamed) \_begin: (work@uvm_reg_map::set_check_on_read), line:74:31, endln:77:10 |vpiName:set_check_on_read |vpiPrefix: - \_ref_obj: (submap), line:75:10, endln:75:16 + \_ref_obj: (work@uvm_reg_map::set_check_on_read::submap), line:75:10, endln:75:16 + |vpiParent: + \_method_func_call: (set_check_on_read), line:75:17, endln:75:34 |vpiName:submap + |vpiFullName:work@uvm_reg_map::set_check_on_read::submap |vpiStmt: \_method_func_call: (bad6), line:76:17, endln:76:21 |vpiParent: \_begin: (work@uvm_reg_map::set_check_on_read), line:74:31, endln:77:10 |vpiName:bad6 |vpiPrefix: - \_ref_obj: (submap), line:76:10, endln:76:16 + \_ref_obj: (work@uvm_reg_map::set_check_on_read::submap), line:76:10, endln:76:16 + |vpiParent: + \_method_func_call: (bad6), line:76:17, endln:76:21 |vpiName:submap + |vpiFullName:work@uvm_reg_map::set_check_on_read::submap =================== [ FATAL] : 0 [ SYNTAX] : 0 diff --git a/third_party/tests/CoresSweRVMP/CoresSweRVMP.log b/third_party/tests/CoresSweRVMP/CoresSweRVMP.log index 7221e0b70c..aedd564571 100644 --- a/third_party/tests/CoresSweRVMP/CoresSweRVMP.log +++ b/third_party/tests/CoresSweRVMP/CoresSweRVMP.log @@ -2,8 +2,8 @@ [WRN:CM0010] Command line argument "-Wno-UNOPTFLAT" ignored. -Running: cd ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_parser; cmake -G "Unix Makefiles" .; make -j 16 --- Configuring done (0.1s) +Running: cd ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_parser; cmake -G "Unix Makefiles" .; make -j 2 +-- Configuring done (0.0s) -- Generating done (0.0s) -- Build files have been written to: ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_parser [100%] Generating preprocessing @@ -114,26 +114,12 @@ PP CACHE USED FOR: ${SURELOG_DIR}/third_party/UVM/1800.2-2017-1.0/src/uvm_pkg.sv [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/CoresSweRVMP/design/lib/axi4_to_ahb.sv". -Running: cd ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_preprocess; cmake -G "Unix Makefiles" .; make -j 16 +Running: cd ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_preprocess; cmake -G "Unix Makefiles" .; make -j 2 -- Configuring done (0.0s) -- Generating done (0.0s) -- Build files have been written to: ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_preprocess -[ 6%] Generating 12_beh_lib.sv -[ 12%] Generating 10_lsu_bus_intf.sv -[ 18%] Generating 11_ifu_bp_ctl.sv -[ 25%] Generating 13_ifu_mem_ctl.sv -[ 31%] Generating 14_mem_lib.sv -[ 37%] Generating 15_exu.sv -[ 43%] Generating 16_dec_decode_ctl.sv -[ 50%] Generating 1_lsu_stbuf.sv -[ 56%] Generating 2_ahb_to_axi4.sv -[ 62%] Generating 3_rvjtag_tap.sv -[ 68%] Generating 4_dec_tlu_ctl.sv -[ 75%] Generating 5_lsu_bus_buffer.sv -[ 81%] Generating 7_axi4_to_ahb.sv -[ 87%] Generating 6_dbg.sv -[ 93%] Generating 8_ifu_aln_ctl.sv -[100%] Generating 9_tb_top.sv +[ 50%] Generating 1_axi4_to_ahb.sv +[100%] Generating 2_mem_lib.sv [100%] Built target Parse Surelog parsing status: 0 [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/UVM/1800.2-2017-1.0/src/uvm_pkg.sv". diff --git a/third_party/tests/NyuziProcessor/NyuziProcessor.log b/third_party/tests/NyuziProcessor/NyuziProcessor.log index 3cbad0e25a..8903558310 100644 --- a/third_party/tests/NyuziProcessor/NyuziProcessor.log +++ b/third_party/tests/NyuziProcessor/NyuziProcessor.log @@ -22,125 +22,125 @@ [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/sim_sdram.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/scoreboard.sv". - -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_axi_bus_interface.sv". - -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_store_queue.sv". - -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/nyuzi.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_l2_interface.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/control_registers.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage5.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_1r1w.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/jtag_tap_controller.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage5.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_pending_miss_cam.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_tag_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/oh_to_idx.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/instruction_decode_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_l2_interface.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_data_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_tag_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_data_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/reciprocal_rom.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_arb_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/tlb.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/jtag_tap_controller.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage2.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/core.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_load_miss_queue.sv". + +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage3.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/thread_select_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_data_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_2r1w.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cam.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/synchronizer.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_read_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/writeback_stage.sv". + +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/tlb.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/rr_arbiter.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/synchronizer.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/nyuzi.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage1.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_pending_miss_cam.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage4.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sync_fifo.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_axi_bus_interface.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_tag_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/performance_counters.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage3.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage1.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_2r1w.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_tag_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_arb_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/int_execute_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/operand_fetch_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/scoreboard.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_load_miss_queue.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage4.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_1r1w.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/on_chip_debugger.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_tag_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_read_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/instruction_decode_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_store_queue.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_data_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_request_queue.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/core.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/performance_counters.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/idx_to_oh.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/on_chip_debugger.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cam.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/writeback_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_request_queue.sv". + +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/reciprocal_rom.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_update_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_interconnect.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cache_lru.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sync_fifo.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/operand_fetch_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/idx_to_oh.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_tag_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cache_lru.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_interconnect.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/int_execute_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/oh_to_idx.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/async_fifo.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_receive.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/gpio_controller.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/ps2_controller.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_sram.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_transmit.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/spi_controller.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/sdram_controller.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/logic_analyzer.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_sequencer.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_async_bridge.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_sequencer.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_controller.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_interconnect.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_receive.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_controller.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_interconnect.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/spi_controller.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_rom.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/async_fifo.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/logic_analyzer.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/timer.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/ps2_controller.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_sram.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_transmit.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_rom.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/sdram_controller.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/gpio_controller.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv". @@ -159,125 +159,125 @@ PARSER CACHE USED FOR: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/ [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/sim_sdram.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/scoreboard.sv". - -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_axi_bus_interface.sv". - -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_store_queue.sv". - -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/nyuzi.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_l2_interface.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/control_registers.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage5.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_1r1w.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/jtag_tap_controller.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage5.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_pending_miss_cam.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_tag_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/oh_to_idx.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/instruction_decode_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_l2_interface.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_data_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_tag_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_data_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/reciprocal_rom.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_arb_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/tlb.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/jtag_tap_controller.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage2.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/core.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_load_miss_queue.sv". + +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage3.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/thread_select_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_data_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_2r1w.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cam.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/synchronizer.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_read_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/writeback_stage.sv". + +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/tlb.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/rr_arbiter.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/synchronizer.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/nyuzi.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage1.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_pending_miss_cam.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage4.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sync_fifo.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_axi_bus_interface.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_tag_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/performance_counters.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage3.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage1.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_2r1w.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_tag_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_arb_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/int_execute_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/operand_fetch_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/scoreboard.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_load_miss_queue.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage4.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_1r1w.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/on_chip_debugger.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_tag_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_read_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/instruction_decode_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_store_queue.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_data_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_request_queue.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/core.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/performance_counters.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/idx_to_oh.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/on_chip_debugger.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cam.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/writeback_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_request_queue.sv". + +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/reciprocal_rom.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_update_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_interconnect.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cache_lru.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sync_fifo.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/operand_fetch_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/idx_to_oh.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_tag_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cache_lru.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_interconnect.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/int_execute_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/oh_to_idx.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/async_fifo.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_receive.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/gpio_controller.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/ps2_controller.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_sram.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_transmit.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/spi_controller.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/sdram_controller.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/logic_analyzer.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_sequencer.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_async_bridge.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_sequencer.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_controller.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_interconnect.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_receive.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_controller.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_interconnect.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/spi_controller.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_rom.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/async_fifo.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/logic_analyzer.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/timer.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/ps2_controller.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_sram.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_transmit.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_rom.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/sdram_controller.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/gpio_controller.sv". [INF:CM0029] Using global timescale: "10ps/10ps". @@ -536,142 +536,142 @@ PARSER CACHE USED FOR: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/ ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/trace_logger.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/scoreboard.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_l2_interface.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_axi_bus_interface.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/control_registers.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_store_queue.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_1r1w.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/nyuzi.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage5.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/control_registers.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_tag_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage5.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/instruction_decode_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/jtag_tap_controller.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_data_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_pending_miss_cam.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_data_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_l2_interface.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_arb_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_tag_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/jtag_tap_controller.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/tlb.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage2.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage2.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_load_miss_queue.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/core.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage3.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/thread_select_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_data_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/writeback_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cam.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/tlb.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_read_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/nyuzi.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage1.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_pending_miss_cam.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage4.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sync_fifo.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_axi_bus_interface.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_tag_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage1.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage3.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_tag_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_arb_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/int_execute_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/operand_fetch_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/scoreboard.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_load_miss_queue.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage4.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_1r1w.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/on_chip_debugger.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_tag_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_read_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/instruction_decode_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_store_queue.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_data_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_request_queue.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/core.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/on_chip_debugger.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cam.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/writeback_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_request_queue.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_update_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_interconnect.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cache_lru.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sync_fifo.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/operand_fetch_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cache_lru.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_tag_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/int_execute_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_interconnect.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/async_fifo.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/ps2_controller.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/gpio_controller.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/sdram_controller.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_sram.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_interconnect.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/spi_controller.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_controller.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_controller.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/spi_controller.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_interconnect.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/async_fifo.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_rom.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_sram.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/ps2_controller.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_rom.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/sdram_controller.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/gpio_controller.sv:22:1: previous definition. [NTE:CP0309] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/async_fifo.sv:37:29: Implicit port type (wire) for "read_data". diff --git a/third_party/tests/OVMSwitch/OVMSwitch.log b/third_party/tests/OVMSwitch/OVMSwitch.log index 0319106b63..b8dfe70b70 100644 --- a/third_party/tests/OVMSwitch/OVMSwitch.log +++ b/third_party/tests/OVMSwitch/OVMSwitch.log @@ -822,50 +822,50 @@ while_stmt 62 [ NOTE] : 9 -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/base.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/base_000.svh | 6 | 25 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_component.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_component_000.sv | 353 | 1548 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_config.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_config_000.sv | 88 | 258 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_extern_report_server.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_extern_report_server_000.svh | 37 | 166 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_factory.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_factory_000.sv | 214 | 1058 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_factory.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_factory_000.svh | 225 | 753 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_globals.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_globals_000.svh | 86 | 408 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_misc.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_misc_000.sv | 85 | 517 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_object.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_object_000.sv | 298 | 1320 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_object_globals.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_object_globals_000.svh | 99 | 388 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_packer.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_packer_000.sv | 92 | 491 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_packer.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_packer_000.svh | 11 | 42 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_port_base.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_port_base_000.svh | 7 | 22 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_printer.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_printer_000.sv | 180 | 1086 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_printer.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_printer_000.svh | 9 | 31 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_report_handler.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_report_handler_000.svh | 148 | 257 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_root.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_root_000.svh | 318 | 1352 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_transaction.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_transaction_000.sv | 70 | 333 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_version.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_version_000.svh | 6 | 30 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/compatibility/avm_compatibility.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/avm_compatibility_000.svh | 169 | 284 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/compatibility/urm_message.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/urm_message_000.sv | 340 | 1065 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/compatibility/urm_message.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/urm_message_000.svh | 381 | 604 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/compatibility/urm_message_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/urm_message_defines_000.svh | 76 | 109 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/compatibility/urm_meth_compatibility.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/urm_meth_compatibility_000.svh | 14 | 50 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/methodology/layered_stimulus/ovm_scenario_controller.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_scenario_controller_000.svh | 3 | 21 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/methodology/ovm_meth_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_meth_defines_000.svh | 5 | 25 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/methodology/sequences/ovm_sequencer_base.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_sequencer_base_000.svh | 6 | 25 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/ovm_macros.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_macros_000.svh | 15 | 35 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/ovm_pkg.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_pkg_000.sv | 6 | 28 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/macros/ovm_object_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_object_defines_000.svh | 2268 | 3171 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/macros/ovm_printer_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_printer_defines_000.svh | 77 | 115 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/macros/ovm_sequence_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_sequence_defines_000.svh | 141 | 314 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/macros/tlm_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/tlm_defines_000.svh | 238 | 454 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/ovm_pkg.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_pkg_001.sv | 9 | 31 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/tlm/tlm_imps.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/tlm_imps_000.svh | 172 | 227 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Configuration.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Configuration_000.sv | 21 | 39 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Driver.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Driver_000.sv | 63 | 126 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Environment.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Environment_000.sv | 30 | 62 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Packet.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Packet_000.sv | 43 | 91 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Receiver.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Receiver_000.sv | 24 | 75 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Scoreboard.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Scoreboard_000.sv | 26 | 58 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Sequence.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Sequence_000.sv | 17 | 46 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Sequencer.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Sequencer_000.sv | 9 | 31 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/interface.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/interface_000.sv | 36 | 87 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/rtl.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/rtl_000.sv | 25 | 38 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/test.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/test_000.sv | 15 | 41 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/top.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/top_000.sv | 46 | 130 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/base.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/base_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_component.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_component_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_config.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_config_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_extern_report_server.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_extern_report_server_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_factory.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_factory_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_factory.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_factory_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_globals.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_globals_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_misc.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_misc_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_object.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_object_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_object_globals.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_object_globals_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_packer.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_packer_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_packer.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_packer_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_port_base.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_port_base_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_printer.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_printer_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_printer.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_printer_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_report_handler.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_report_handler_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_root.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_root_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_transaction.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_transaction_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_version.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_version_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/compatibility/avm_compatibility.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/avm_compatibility_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/compatibility/urm_message.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/urm_message_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/compatibility/urm_message.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/urm_message_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/compatibility/urm_message_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/urm_message_defines_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/compatibility/urm_meth_compatibility.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/urm_meth_compatibility_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/methodology/layered_stimulus/ovm_scenario_controller.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_scenario_controller_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/methodology/ovm_meth_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_meth_defines_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/methodology/sequences/ovm_sequencer_base.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_sequencer_base_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/ovm_macros.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_macros_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/ovm_pkg.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_pkg_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/macros/ovm_object_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_object_defines_000.svh | 2268 | 3171 | +[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/macros/ovm_printer_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_printer_defines_000.svh | 77 | 115 | +[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/macros/ovm_sequence_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_sequence_defines_000.svh | 141 | 314 | +[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/macros/tlm_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/tlm_defines_000.svh | 238 | 454 | +[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/ovm_pkg.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_pkg_001.sv | 9 | 31 | +[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/tlm/tlm_imps.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/tlm_imps_000.svh | 172 | 227 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Configuration.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Configuration_000.sv | 21 | 39 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Driver.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Driver_000.sv | 63 | 126 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Environment.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Environment_000.sv | 30 | 62 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Packet.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Packet_000.sv | 43 | 91 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Receiver.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Receiver_000.sv | 24 | 75 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Scoreboard.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Scoreboard_000.sv | 26 | 58 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Sequence.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Sequence_000.sv | 17 | 46 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Sequencer.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Sequencer_000.sv | 9 | 31 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/interface.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/interface_000.sv | 36 | 87 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/rtl.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/rtl_000.sv | 25 | 38 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/test.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/test_000.sv | 15 | 41 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/top.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/top_000.sv | 46 | 130 | \ No newline at end of file diff --git a/third_party/tests/SimpleOVM/SimpleOVM.log b/third_party/tests/SimpleOVM/SimpleOVM.log index b886fcbead..cb9840b12f 100644 --- a/third_party/tests/SimpleOVM/SimpleOVM.log +++ b/third_party/tests/SimpleOVM/SimpleOVM.log @@ -734,33 +734,33 @@ while_stmt 61 [ NOTE] : 4 -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/base.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/base_000.svh | 6 | 25 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_component.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_component_000.sv | 353 | 1548 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_config.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_config_000.sv | 88 | 258 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_extern_report_server.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_extern_report_server_000.svh | 37 | 166 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_factory.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_factory_000.sv | 214 | 1058 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_factory.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_factory_000.svh | 225 | 753 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_globals.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_globals_000.svh | 84 | 408 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_misc.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_misc_000.sv | 85 | 517 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_object.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_object_000.sv | 298 | 1320 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_object_globals.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_object_globals_000.svh | 89 | 388 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_packer.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_packer_000.sv | 92 | 491 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_packer.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_packer_000.svh | 11 | 42 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_port_base.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_port_base_000.svh | 7 | 22 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_printer.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_printer_000.sv | 180 | 1086 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_printer.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_printer_000.svh | 9 | 31 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_root.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_root_000.svh | 318 | 1352 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_transaction.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_transaction_000.sv | 70 | 333 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_version.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_version_000.svh | 6 | 30 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/compatibility/avm_compatibility.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/avm_compatibility_000.svh | 169 | 284 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/compatibility/urm_message.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/urm_message_000.sv | 340 | 1065 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/compatibility/urm_message.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/urm_message_000.svh | 381 | 604 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/compatibility/urm_message_defines.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/urm_message_defines_000.svh | 76 | 109 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/compatibility/urm_meth_compatibility.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/urm_meth_compatibility_000.svh | 14 | 50 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/methodology/layered_stimulus/ovm_scenario_controller.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_scenario_controller_000.svh | 3 | 21 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/methodology/ovm_meth_defines.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_meth_defines_000.svh | 5 | 25 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/methodology/sequences/ovm_sequencer_base.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_sequencer_base_000.svh | 6 | 25 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/ovm_macros.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_macros_000.svh | 15 | 35 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/ovm_pkg.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_pkg_000.sv | 6 | 28 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/ovm_pkg.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_pkg_001.sv | 9 | 31 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/SimpleOVM/top.v | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/top_000.v | 2 | 2 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/base.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/base_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_component.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_component_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_config.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_config_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_extern_report_server.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_extern_report_server_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_factory.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_factory_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_factory.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_factory_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_globals.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_globals_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_misc.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_misc_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_object.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_object_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_object_globals.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_object_globals_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_packer.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_packer_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_packer.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_packer_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_port_base.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_port_base_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_printer.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_printer_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_printer.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_printer_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_root.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_root_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_transaction.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_transaction_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_version.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_version_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/compatibility/avm_compatibility.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/avm_compatibility_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/compatibility/urm_message.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/urm_message_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/compatibility/urm_message.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/urm_message_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/compatibility/urm_message_defines.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/urm_message_defines_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/compatibility/urm_meth_compatibility.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/urm_meth_compatibility_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/methodology/layered_stimulus/ovm_scenario_controller.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_scenario_controller_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/methodology/ovm_meth_defines.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_meth_defines_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/methodology/sequences/ovm_sequencer_base.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_sequencer_base_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/ovm_macros.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_macros_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/ovm_pkg.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_pkg_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/ovm_pkg.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_pkg_001.sv | 9 | 31 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/SimpleOVM/top.v | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/top_000.v | 2 | 2 | \ No newline at end of file diff --git a/third_party/tests/SimpleParserTest/SimpleParserTest.log b/third_party/tests/SimpleParserTest/SimpleParserTest.log index a4d29771f6..ad00f4d422 100644 --- a/third_party/tests/SimpleParserTest/SimpleParserTest.log +++ b/third_party/tests/SimpleParserTest/SimpleParserTest.log @@ -1022,8 +1022,11 @@ design: (work@dff_async_reset) |vpiOperand: \_part_select: , line:17:21, endln:17:27 |vpiParent: - \_ref_obj: A (A), line:17:21, endln:17:22 + \_ref_obj: A (work@LFSR_TASK.LFSR_TAPS8_TASK.A), line:17:21, endln:17:22 + |vpiParent: + \_operation: , line:17:18, endln:17:27 |vpiName:A + |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.A |vpiDefName:A |vpiConstantSelect:1 |vpiLeftRange: diff --git a/third_party/tests/oh/BasicOh.log b/third_party/tests/oh/BasicOh.log index 92b32e39f8..c4b4288f22 100644 --- a/third_party/tests/oh/BasicOh.log +++ b/third_party/tests/oh/BasicOh.log @@ -2,563 +2,563 @@ [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_async.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrqn.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg1.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_header.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_sync.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dsync.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa42.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_inv.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao221.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pwr_buf.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux7.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_dp.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mult.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffqn.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffq.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_datagate.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa31.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_gray2bin.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao22.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai311.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_sync.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux12.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa92.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_debouncer.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockor.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edge2pulse.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao311.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_arbiter.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_datagate.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobuflo.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux5.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rsync.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buffer.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffqn.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobufhi.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa22.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_tristate.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latq.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao222.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao221.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edge2pulse.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai21.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latnq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai21.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_regfile.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockgate.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockdiv.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pulse2pulse.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux7.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi33.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux9.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa31.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi211.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fall2pulse.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi311.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bitreverse.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pll.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux9.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_standby.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao211.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2onehot.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi22.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockor.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rsync.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_stretcher.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat0.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai311.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao21.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oddr.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bitreverse.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa211.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_stretcher.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_header.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_sp.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_dp.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi211.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_debouncer.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao32.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa32.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi21.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux8.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg0.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao211.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao33.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa222.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffnq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_iddr.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi221.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa21.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oddr.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_shift.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_cdc.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_parity.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg0.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa21.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg1.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_cdc.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai32.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrq.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edgealign.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_add.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux6.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_inv.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa42.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao33.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockdiv.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_tristate.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux6.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa62.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fall2pulse.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffqn.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao31.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buffer.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2onehot.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai22.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_7seg_decode.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi33.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and3.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_iddr.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao32.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa221.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_delay.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buf.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_abs.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsq.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat1.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi222.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latnq.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edgealign.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrqn.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux5.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai221.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2gray.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai31.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa32.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa311.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao31.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsqn.v". + +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rise2pulse.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat1.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dsync.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi221.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa221.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_counter.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_arbiter.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ser2par.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mult.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat0.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi31.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa62.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa33.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_par2ser.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrqn.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi21.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa33.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobufhi.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsqn.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_sp.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_add.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buf.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_standby.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi32.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_delay.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_par2ser.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrqn.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi31.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2gray.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi22.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pll.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrq.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai32.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux8.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockgate.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai33.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_regfile.v". - -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa22.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pulse2pulse.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao311.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux12.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pwr_buf.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobuflo.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_gray2bin.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffnq.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi311.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa222.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao21.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai31.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai222.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai221.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao22.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa311.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao222.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa32.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_shift.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_abs.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_counter.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa211.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_7seg_decode.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi32.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai222.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsq.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi222.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsqn.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa32.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ser2par.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_parity.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai22.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa92.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffqn.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsqn.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffq.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_async.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrqn.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg1.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_header.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_sync.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dsync.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa42.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_inv.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao221.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pwr_buf.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux7.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_dp.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mult.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffqn.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_datagate.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa31.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_gray2bin.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao22.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai311.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_sync.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux12.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa92.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_debouncer.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockor.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edge2pulse.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao311.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_arbiter.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_datagate.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobuflo.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux5.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rsync.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buffer.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffqn.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobufhi.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa22.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_tristate.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao222.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao221.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edge2pulse.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai21.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latnq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai21.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_regfile.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockgate.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockdiv.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pulse2pulse.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux7.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi33.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux9.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa31.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi211.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fall2pulse.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi311.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bitreverse.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pll.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux9.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_standby.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao211.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2onehot.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi22.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockor.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rsync.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_stretcher.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat0.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai311.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao21.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oddr.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bitreverse.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa211.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_stretcher.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_header.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_sp.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_dp.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi211.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_debouncer.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao32.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa32.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi21.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux8.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg0.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao211.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao33.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa222.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffnq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_iddr.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi221.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa21.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oddr.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_shift.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_cdc.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_parity.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg0.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa21.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg1.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_cdc.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai32.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edgealign.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_add.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux6.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_inv.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa42.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao33.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockdiv.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_tristate.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux6.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa62.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fall2pulse.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffqn.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao31.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buffer.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2onehot.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai22.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_7seg_decode.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi33.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and3.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_iddr.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao32.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa221.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_delay.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buf.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_abs.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat1.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi222.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latnq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edgealign.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrqn.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux5.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai221.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2gray.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai31.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa32.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa311.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao31.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsqn.v". + +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rise2pulse.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat1.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dsync.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi221.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa221.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_counter.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_arbiter.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ser2par.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mult.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat0.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi31.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa62.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa33.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_par2ser.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrqn.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi21.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa33.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobufhi.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsqn.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_sp.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_add.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buf.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_standby.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi32.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_delay.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_par2ser.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrqn.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi31.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2gray.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi22.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pll.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai32.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux8.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockgate.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai33.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_regfile.v". - -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa22.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pulse2pulse.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao311.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux12.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pwr_buf.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobuflo.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_gray2bin.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffnq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi311.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa222.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao21.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai31.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai222.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai221.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao22.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa311.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao222.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa32.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_shift.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_abs.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_counter.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa211.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_7seg_decode.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi32.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai222.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi222.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsqn.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa32.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ser2par.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_parity.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai22.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa92.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffqn.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsqn.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffq.v". [INF:CM0029] Using global timescale: "1ns/1ns". @@ -10726,8 +10726,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_part_select: , line:31:46, endln:31:61 |vpiParent: - \_ref_obj: waitmask (waitmask), line:31:46, endln:31:54 + \_ref_obj: waitmask (work@oh_arbiter.waitmask), line:31:46, endln:31:54 + |vpiParent: + \_operation: , line:31:45, endln:31:61 |vpiName:waitmask + |vpiFullName:work@oh_arbiter.waitmask |vpiDefName:waitmask |vpiConstantSelect:1 |vpiLeftRange: @@ -13658,8 +13661,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_part_select: , line:138:26, endln:138:37 |vpiParent: - \_ref_obj: clkdiv (clkdiv), line:138:26, endln:138:32 + \_ref_obj: clkdiv (work@oh_clockdiv.clkdiv), line:138:26, endln:138:32 + |vpiParent: + \_operation: , line:138:25, endln:138:37 |vpiName:clkdiv + |vpiFullName:work@oh_clockdiv.clkdiv |vpiDefName:clkdiv |vpiConstantSelect:1 |vpiLeftRange: @@ -13848,8 +13854,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_part_select: , line:151:26, endln:151:37 |vpiParent: - \_ref_obj: clkdiv (clkdiv), line:151:26, endln:151:32 + \_ref_obj: clkdiv (work@oh_clockdiv.clkdiv), line:151:26, endln:151:32 + |vpiParent: + \_operation: , line:151:25, endln:151:37 |vpiName:clkdiv + |vpiFullName:work@oh_clockdiv.clkdiv |vpiDefName:clkdiv |vpiConstantSelect:1 |vpiLeftRange: @@ -16170,8 +16179,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_part_select: , line:41:39, endln:41:51 |vpiParent: - \_ref_obj: count (count), line:41:39, endln:41:44 + \_ref_obj: count (work@oh_counter.count), line:41:39, endln:41:44 + |vpiParent: + \_operation: , line:41:38, endln:41:51 |vpiName:count + |vpiFullName:work@oh_counter.count |vpiDefName:count |vpiConstantSelect:1 |vpiLeftRange: @@ -16234,8 +16246,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_part_select: , line:42:25, endln:42:37 |vpiParent: - \_ref_obj: count (count), line:42:25, endln:42:30 + \_ref_obj: count (work@oh_counter.count), line:42:25, endln:42:30 + |vpiParent: + \_operation: , line:42:24, endln:42:37 |vpiName:count + |vpiFullName:work@oh_counter.count |vpiDefName:count |vpiConstantSelect:1 |vpiLeftRange: @@ -24512,8 +24527,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_part_select: , line:25:25, endln:25:34 |vpiParent: - \_ref_obj: in (in), line:25:25, endln:25:27 + \_ref_obj: in (work@oh_fall2pulse.in), line:25:25, endln:25:27 + |vpiParent: + \_operation: , line:25:24, endln:25:34 |vpiName:in + |vpiFullName:work@oh_fall2pulse.in |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: @@ -54462,8 +54480,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_part_select: , line:61:42, endln:61:59 |vpiParent: - \_ref_obj: shiftreg (shiftreg), line:61:42, endln:61:50 + \_ref_obj: shiftreg (work@oh_par2ser.shiftreg), line:61:42, endln:61:50 + |vpiParent: + \_if_else: , line:60:11, endln:63:62 |vpiName:shiftreg + |vpiFullName:work@oh_par2ser.shiftreg |vpiDefName:shiftreg |vpiConstantSelect:1 |vpiLeftRange: @@ -54550,8 +54571,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_part_select: , line:63:28, endln:63:47 |vpiParent: - \_ref_obj: shiftreg (shiftreg), line:63:28, endln:63:36 + \_ref_obj: shiftreg (work@oh_par2ser.shiftreg), line:63:28, endln:63:36 + |vpiParent: + \_if_stmt: , line:62:11, endln:63:62 |vpiName:shiftreg + |vpiFullName:work@oh_par2ser.shiftreg |vpiDefName:shiftreg |vpiConstantSelect:1 |vpiLeftRange: @@ -54708,8 +54732,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_part_select: , line:46:19, endln:46:32 |vpiParent: - \_ref_obj: count (count), line:46:19, endln:46:24 + \_ref_obj: count (work@oh_par2ser.count), line:46:19, endln:46:24 + |vpiParent: + \_operation: , line:46:18, endln:46:32 |vpiName:count + |vpiFullName:work@oh_par2ser.count |vpiDefName:count |vpiConstantSelect:1 |vpiLeftRange: @@ -55020,8 +55047,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_part_select: , line:15:21, endln:15:30 |vpiParent: - \_ref_obj: in (in), line:15:21, endln:15:23 + \_ref_obj: in (work@oh_parity.in), line:15:21, endln:15:23 + |vpiParent: + \_operation: , line:15:20, endln:15:30 |vpiName:in + |vpiFullName:work@oh_parity.in |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: @@ -57099,8 +57129,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_part_select: , line:24:38, endln:24:51 |vpiParent: - \_ref_obj: in_reg (in_reg), line:24:38, endln:24:44 + \_ref_obj: in_reg (work@oh_rise2pulse.in_reg), line:24:38, endln:24:44 + |vpiParent: + \_operation: , line:24:37, endln:24:51 |vpiName:in_reg + |vpiFullName:work@oh_rise2pulse.in_reg |vpiDefName:in_reg |vpiConstantSelect:1 |vpiLeftRange: @@ -59893,8 +59926,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_part_select: , line:25:25, endln:25:36 |vpiParent: - \_ref_obj: din (din), line:25:25, endln:25:28 + \_ref_obj: din (work@oh_ser2par.din), line:25:25, endln:25:28 + |vpiParent: + \_if_else: , line:24:6, endln:27:54 |vpiName:din + |vpiFullName:work@oh_ser2par.din |vpiDefName:din |vpiConstantSelect:1 |vpiLeftRange: @@ -59925,8 +59961,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_part_select: , line:25:37, endln:25:50 |vpiParent: - \_ref_obj: dout (dout), line:25:37, endln:25:41 + \_ref_obj: dout (work@oh_ser2par.dout), line:25:37, endln:25:41 + |vpiParent: + \_if_else: , line:24:6, endln:27:54 |vpiName:dout + |vpiFullName:work@oh_ser2par.dout |vpiDefName:dout |vpiConstantSelect:1 |vpiLeftRange: @@ -60012,8 +60051,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_part_select: , line:27:25, endln:27:40 |vpiParent: - \_ref_obj: dout (dout), line:27:25, endln:27:29 + \_ref_obj: dout (work@oh_ser2par.dout), line:27:25, endln:27:29 + |vpiParent: + \_if_stmt: , line:26:11, endln:27:54 |vpiName:dout + |vpiFullName:work@oh_ser2par.dout |vpiDefName:dout |vpiConstantSelect:1 |vpiLeftRange: @@ -60055,8 +60097,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_part_select: , line:27:41, endln:27:52 |vpiParent: - \_ref_obj: din (din), line:27:41, endln:27:44 + \_ref_obj: din (work@oh_ser2par.din), line:27:41, endln:27:44 + |vpiParent: + \_if_stmt: , line:26:11, endln:27:54 |vpiName:din + |vpiFullName:work@oh_ser2par.din |vpiDefName:din |vpiConstantSelect:1 |vpiLeftRange: @@ -60738,8 +60783,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_part_select: , line:83:32, endln:83:51 |vpiParent: - \_ref_obj: wakeup_pipe (wakeup_pipe), line:83:32, endln:83:43 + \_ref_obj: wakeup_pipe (work@oh_standby.wakeup_pipe), line:83:32, endln:83:43 + |vpiParent: + \_if_else: , line:80:6, endln:83:65 |vpiName:wakeup_pipe + |vpiFullName:work@oh_standby.wakeup_pipe |vpiDefName:wakeup_pipe |vpiConstantSelect:1 |vpiLeftRange: @@ -60880,8 +60928,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_part_select: , line:87:27, endln:87:46 |vpiParent: - \_ref_obj: wakeup_pipe (wakeup_pipe), line:87:27, endln:87:38 + \_ref_obj: wakeup_pipe (work@oh_standby.wakeup_pipe), line:87:27, endln:87:38 + |vpiParent: + \_operation: , line:87:26, endln:87:46 |vpiName:wakeup_pipe + |vpiFullName:work@oh_standby.wakeup_pipe |vpiDefName:wakeup_pipe |vpiConstantSelect:1 |vpiLeftRange: @@ -61339,8 +61390,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_part_select: , line:24:29, endln:24:46 |vpiParent: - \_ref_obj: valid (valid), line:24:29, endln:24:34 + \_ref_obj: valid (work@oh_stretcher.valid), line:24:29, endln:24:34 + |vpiParent: + \_if_else: , line:21:11, endln:24:53 |vpiName:valid + |vpiFullName:work@oh_stretcher.valid |vpiDefName:valid |vpiConstantSelect:1 |vpiLeftRange: