From 4ac89ef47e1492eceb6a6c952e7dc8d607e96b73 Mon Sep 17 00:00:00 2001 From: alaindargelas Date: Fri, 13 Sep 2024 21:15:56 -0700 Subject: [PATCH] 32 bit size interface for values and 32 bit storage for string vals used for large hexa --- include/Surelog/Expression/Value.h | 30 +- src/Expression/Value.cpp | 8 +- tests/DashYTest/DashYTest.log | 32 +- tests/HighLow/HighLow.log | 8 +- tests/LargeHexString/LargeHexString.log | 1225 +++++++++++++++++ tests/LargeHexString/LargeHexString.sl | 1 + tests/LargeHexString/dut.sv | 13 + tests/LibraryIntercon/LibraryIntercon.log | 14 +- tests/NonSynthUnusedMod/NonSynthUnusedMod.log | 32 +- tests/OldLibrary/OldLibrary.log | 6 +- tests/PreprocLine/PreprocLine.log | 60 +- tests/TestSepComp/TestSepComp.log | 4 +- .../badpath/TestSepCompBadPath.log | 10 +- tests/UnitLibrary/UnitLibrary.log | 6 +- third_party/tests/AzadiRTL/AzadiRTL.log | 2 +- .../tests/CoresSweRVMP/CoresSweRVMP.log | 56 +- .../Earlgrey_0_1/sim-icarus/Earlgrey_0_1.log | 2 +- .../Earlgrey_Verilator_01_05_21.log | 4 +- .../sim-verilator/Earlgrey_Verilator_0_1.log | 2 +- .../tests/NyuziProcessor/NyuziProcessor.log | 262 ++-- third_party/tests/Opentitan/Earlgrey.log | 2 +- third_party/tests/Opentitan/Opentitan.log | 2 +- third_party/tests/oh/BasicOh.log | 468 +++---- 23 files changed, 1740 insertions(+), 509 deletions(-) create mode 100644 tests/LargeHexString/LargeHexString.log create mode 100644 tests/LargeHexString/LargeHexString.sl create mode 100644 tests/LargeHexString/dut.sv diff --git a/include/Surelog/Expression/Value.h b/include/Surelog/Expression/Value.h index 83dca48e15..d42c65a105 100644 --- a/include/Surelog/Expression/Value.h +++ b/include/Surelog/Expression/Value.h @@ -59,8 +59,8 @@ class Value : public RTTI { ~Value() override {} - virtual int16_t getSize() const = 0; // size in bits - virtual int16_t getSize( + virtual int32_t getSize() const = 0; // size in bits + virtual int32_t getSize( uint32_t wordIndex) const = 0; // size in bits of a multi-word value // nb of 64 bits words necessary to encode the size virtual uint16_t getNbWords() const = 0; @@ -91,7 +91,7 @@ class Value : public RTTI { virtual void set(uint64_t val) = 0; virtual void set(int64_t val) = 0; virtual void set(double val) = 0; - virtual void set(uint64_t val, Type type, int16_t size) = 0; + virtual void set(uint64_t val, Type type, int32_t size) = 0; virtual void set(std::string_view val) = 0; virtual void set(std::string_view val, Type type) = 0; virtual bool operator<(const Value& rhs) const = 0; @@ -166,7 +166,7 @@ class SValue final : public Value { : m_type(Value::Type::Unsigned), m_size(0), m_valid(1), m_negative(0) { m_value.u_int = 0; } - SValue(int64_t val, int16_t size) + SValue(int64_t val, int32_t size) : m_type(Value::Type::Integer), m_size(size), m_valid(1), @@ -196,8 +196,8 @@ class SValue final : public Value { } ~SValue() final; - int16_t getSize() const final { return m_size; } - int16_t getSize(uint32_t wordIndex) const final { return m_size; } + int32_t getSize() const final { return m_size; } + int32_t getSize(uint32_t wordIndex) const final { return m_size; } void setRange(uint16_t lrange, uint16_t rrange) final { m_lrange = lrange; m_rrange = rrange; @@ -219,7 +219,7 @@ class SValue final : public Value { void set(uint64_t val) final; void set(int64_t val) final; void set(double val) final; - void set(uint64_t val, Type type, int16_t size) final; + void set(uint64_t val, Type type, int32_t size) final; void set(std::string_view val) final { m_type = Value::Type::None; @@ -343,8 +343,8 @@ class LValue final : public Value { LValue(int64_t val, Type type, int16_t size); ~LValue() final; - int16_t getSize() const final; - int16_t getSize(uint32_t wordIndex) const final { + int32_t getSize() const final; + int32_t getSize(uint32_t wordIndex) const final { if (m_valueArray) { return m_valueArray[wordIndex].m_size; } else @@ -371,7 +371,7 @@ class LValue final : public Value { void set(uint64_t val) final; void set(int64_t val) final; void set(double val) final; - void set(uint64_t val, Type type, int16_t size) final; + void set(uint64_t val, Type type, int32_t size) final; void set(std::string_view val) final {} void set(std::string_view val, Type type) final {} bool operator<(const Value& rhs) const final; @@ -448,8 +448,8 @@ class StValue final : public Value { : m_type(Type::String), m_value(val), m_size(val.size()), m_valid(true), m_typespec(nullptr) {} ~StValue() final; - int16_t getSize() const final { return m_size; } - int16_t getSize(uint32_t wordIndex) const final { return m_size; } + int32_t getSize() const final { return m_size; } + int32_t getSize(uint32_t wordIndex) const final { return m_size; } void setRange(uint16_t lrange, uint16_t rrange) final { m_lrange = lrange; m_rrange = rrange; @@ -489,7 +489,7 @@ class StValue final : public Value { m_signed = true; m_typespec = nullptr; } - void set(uint64_t val, Type type, int16_t size) final { + void set(uint64_t val, Type type, int32_t size) final { m_type = type; m_value = std::to_string(val); m_size = size; @@ -508,7 +508,7 @@ class StValue final : public Value { m_signed = false; m_typespec = nullptr; } - void set(std::string_view val, Type type, int16_t size) { + void set(std::string_view val, Type type, int32_t size) { m_type = type; m_value = val; m_size = size; @@ -606,7 +606,7 @@ class StValue final : public Value { private: Type m_type; std::string m_value; - int16_t m_size = 0; + int32_t m_size = 0; uint16_t m_valid = 0; uint16_t m_lrange = 0; uint16_t m_rrange = 0; diff --git a/src/Expression/Value.cpp b/src/Expression/Value.cpp index 4243f02bb6..6a4aa03fd2 100644 --- a/src/Expression/Value.cpp +++ b/src/Expression/Value.cpp @@ -193,7 +193,7 @@ void SValue::set(double val) { m_rrange = 0; m_signed = true; } -void SValue::set(uint64_t val, Type type, int16_t size) { +void SValue::set(uint64_t val, Type type, int32_t size) { m_type = type; m_value.u_int = val; m_size = size; @@ -858,8 +858,8 @@ void SValue::shiftRight(const Value* a, const Value* b) { m_valid = a->isValid() && b->isValid(); } -int16_t LValue::getSize() const { - uint16_t size = 0; +int32_t LValue::getSize() const { + uint32_t size = 0; for (int32_t i = 0; i < m_nbWords; i++) { size += m_valueArray[i].m_size; } @@ -1118,7 +1118,7 @@ void LValue::set(double val) { m_typespec = nullptr; } -void LValue::set(uint64_t val, Type type, int16_t size) { +void LValue::set(uint64_t val, Type type, int32_t size) { m_type = type; m_nbWords = 1; if (!m_valueArray) m_valueArray = new SValue[1]; diff --git a/tests/DashYTest/DashYTest.log b/tests/DashYTest/DashYTest.log index 26e09b5b22..8fbb10c4d7 100644 --- a/tests/DashYTest/DashYTest.log +++ b/tests/DashYTest/DashYTest.log @@ -43,6 +43,22 @@ n<> u<11> t c<1> l<1:1> el<3:1> AST_DEBUG_END AST_DEBUG_BEGIN LIB: work +FILE: ${SURELOG_DIR}/tests/DashYTest/lib/OR.v +n<> u<0> t<_INVALID_> f<0> l<0:0> +n<> u<1> t p<11> s<10> l<1:1> el<1:0> +n u<2> t p<6> s<3> l<1:1> el<1:7> +n u<3> t p<6> s<5> l<1:8> el<1:10> +n<> u<4> t p<5> l<1:11> el<1:11> +n<> u<5> t p<6> c<4> l<1:10> el<1:12> +n<> u<6> t p<8> c<2> s<7> l<1:1> el<1:13> +n<> u<7> t p<8> l<2:1> el<2:10> +n<> u<8> t p<9> c<6> l<1:1> el<2:10> +n<> u<9> t p<10> c<8> l<1:1> el<2:10> +n<> u<10> t p<11> c<9> l<1:1> el<2:10> +n<> u<11> t c<1> l<1:1> el<3:1> +AST_DEBUG_END +AST_DEBUG_BEGIN +LIB: work FILE: ${SURELOG_DIR}/tests/DashYTest/lib/SIM.v n<> u<0> t<_INVALID_> f<0> l<0:0> n<> u<1> t p<29> s<28> l<1:1> el<1:0> @@ -75,22 +91,6 @@ n<> u<27> t p<28> c<26> l<1:1> el<6:10> n<> u<28> t p<29> c<27> l<1:1> el<6:10> n<> u<29> t c<1> l<1:1> el<7:1> AST_DEBUG_END -AST_DEBUG_BEGIN -LIB: work -FILE: ${SURELOG_DIR}/tests/DashYTest/lib/OR.v -n<> u<0> t<_INVALID_> f<0> l<0:0> -n<> u<1> t p<11> s<10> l<1:1> el<1:0> -n u<2> t p<6> s<3> l<1:1> el<1:7> -n u<3> t p<6> s<5> l<1:8> el<1:10> -n<> u<4> t p<5> l<1:11> el<1:11> -n<> u<5> t p<6> c<4> l<1:10> el<1:12> -n<> u<6> t p<8> c<2> s<7> l<1:1> el<1:13> -n<> u<7> t p<8> l<2:1> el<2:10> -n<> u<8> t p<9> c<6> l<1:1> el<2:10> -n<> u<9> t p<10> c<8> l<1:1> el<2:10> -n<> u<10> t p<11> c<9> l<1:1> el<2:10> -n<> u<11> t c<1> l<1:1> el<3:1> -AST_DEBUG_END [INF:CP0300] Compilation... [INF:CP0303] ${SURELOG_DIR}/tests/DashYTest/lib/AND.v:1:1: Compile module "work@AND". [INF:CP0303] ${SURELOG_DIR}/tests/DashYTest/lib/OR.v:1:1: Compile module "work@OR". diff --git a/tests/HighLow/HighLow.log b/tests/HighLow/HighLow.log index cc4aac4022..7fbabb2ed3 100644 --- a/tests/HighLow/HighLow.log +++ b/tests/HighLow/HighLow.log @@ -298,7 +298,7 @@ AST_DEBUG_END [INF:UH0706] Creating UHDM Model... === UHDM Object Stats Begin (Non-Elaborated Model) === begin 4 -constant 41 +constant 42 cont_assign 2 design 1 gen_if 4 @@ -320,7 +320,7 @@ sys_func_call 10 [INF:UH0707] Elaborating UHDM... === UHDM Object Stats Begin (Elaborated Model) === begin 4 -constant 41 +constant 42 cont_assign 3 design 1 gen_if 4 @@ -866,7 +866,10 @@ design: (work@top) \_constant: |vpiParent: \_cont_assign: , line:12:10, endln:12:24 + |vpiDecompile:2 + |vpiSize:64 |UINT:2 + |vpiConstType:9 |vpiLhs: \_ref_obj: (work@top.ccc), line:12:10, endln:12:13 |vpiParent: @@ -1061,6 +1064,7 @@ design: (work@top) \_logic_typespec: |vpiLeftRange: \_constant: + |UINT:2 |vpiRightRange: \_constant: |UINT:1 diff --git a/tests/LargeHexString/LargeHexString.log b/tests/LargeHexString/LargeHexString.log new file mode 100644 index 0000000000..a929e7db1d --- /dev/null +++ b/tests/LargeHexString/LargeHexString.log @@ -0,0 +1,1225 @@ +[INF:CM0023] Creating log file "${SURELOG_DIR}/build/regression/LargeHexString/slpp_all/surelog.log". +AST_DEBUG_BEGIN +LIB: work +FILE: ${SURELOG_DIR}/tests/LargeHexString/dut.sv +n<> u<0> t<_INVALID_> f<0> l<0:0> +n<> u<1> t p<56> s<55> l<1:1> el<1:0> +n u<2> t p<6> s<3> l<1:1> el<1:7> +n u<3> t p<6> s<5> l<1:8> el<1:14> +n<> u<4> t p<5> l<1:16> el<1:16> +n<> u<5> t p<6> c<4> l<1:15> el<1:17> +n<> u<6> t p<25> c<2> s<23> l<1:1> el<1:18> +n<> u<7> t p<17> s<16> l<2:14> el<2:14> +n u<8> t p<15> s<14> l<2:14> el<2:20> +n<36864'h0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000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u<9> t p<10> l<2:23> el<2:8671> +n<> u<10> t p<11> c<9> l<2:23> el<2:8671> +n<> u<11> t p<12> c<10> l<2:23> el<2:8671> +n<> u<12> t p<13> c<11> l<2:23> el<2:8671> +n<> u<13> t p<14> c<12> l<2:23> el<2:8671> +n<> u<14> t p<15> c<13> l<2:23> el<2:8671> +n<> u<15> t p<16> c<8> l<2:14> el<2:8671> +n<> u<16> t p<17> c<15> l<2:14> el<2:8671> +n<> u<17> t p<18> c<7> l<2:4> el<2:8671> +n<> u<18> t p<19> c<17> l<2:4> el<2:8672> +n<> u<19> t p<20> c<18> l<2:4> el<2:8672> +n<> u<20> t p<21> c<19> l<2:4> el<2:8672> +n<> u<21> t p<22> c<20> l<2:4> el<2:8672> +n<> u<22> t p<23> c<21> l<2:4> el<2:8672> +n<> u<23> t p<25> c<22> s<24> l<2:4> el<2:8672> +n<> u<24> t p<25> l<6:1> el<6:10> +n<> u<25> t p<26> c<6> l<1:1> el<6:10> +n<> u<26> t p<55> c<25> s<54> l<1:1> el<6:10> +n u<27> t p<31> s<28> l<8:1> el<8:7> +n u<28> t p<31> s<30> l<8:8> el<8:11> +n<> u<29> t p<30> l<8:12> el<8:12> +n<> u<30> t p<31> c<29> l<8:11> el<8:13> +n<> u<31> t p<53> c<27> s<51> l<8:1> el<8:14> +n u<32> t p<48> s<42> l<10:3> el<10:9> +n u<33> t p<40> s<39> l<10:14> el<10:20> +n<36864'h0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000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u<34> t p<35> l<10:21> el<10:9244> +n<> u<35> t p<36> c<34> l<10:21> el<10:9244> +n<> u<36> t p<37> c<35> l<10:21> el<10:9244> +n<> u<37> t p<38> c<36> l<10:21> el<10:9244> +n<> u<38> t p<39> c<37> l<10:21> el<10:9244> +n<> u<39> t p<40> c<38> l<10:21> el<10:9244> +n<> u<40> t p<41> c<33> l<10:13> el<10:9245> +n<> u<41> t p<42> c<40> l<10:13> el<10:9245> +n<> u<42> t p<48> c<41> s<47> l<10:11> el<10:9246> +n u<43> t p<44> l<10:9247> el<10:9249> +n<> u<44> t p<47> c<43> s<46> l<10:9247> el<10:9249> +n<> u<45> t p<46> l<10:9251> el<10:9251> +n<> u<46> t p<47> c<45> l<10:9251> el<10:9251> +n<> u<47> t p<48> c<44> l<10:9247> el<10:9252> +n<> u<48> t p<49> c<32> l<10:3> el<10:9253> +n<> u<49> t p<50> c<48> l<10:3> el<10:9253> +n<> u<50> t p<51> c<49> l<10:3> el<10:9253> +n<> u<51> t p<53> c<50> s<52> l<10:3> el<10:9253> +n<> u<52> t p<53> l<12:1> el<12:10> +n<> u<53> t p<54> c<31> l<8:1> el<12:10> +n<> u<54> t p<55> c<53> l<8:1> el<12:10> +n<> u<55> t p<56> c<26> l<1:1> el<12:10> +n<> u<56> t c<1> l<1:1> el<14:1> +AST_DEBUG_END +[WRN:PA0205] ${SURELOG_DIR}/tests/LargeHexString/dut.sv:1:1: No timescale set for "bottom". +[WRN:PA0205] ${SURELOG_DIR}/tests/LargeHexString/dut.sv:8:1: No timescale set for "top". +[INF:CP0300] Compilation... +[INF:CP0303] ${SURELOG_DIR}/tests/LargeHexString/dut.sv:1:1: Compile module "work@bottom". +[INF:CP0303] ${SURELOG_DIR}/tests/LargeHexString/dut.sv:8:1: Compile module "work@top". +AST_DEBUG_BEGIN +LIB: work +FILE: ${SURELOG_DIR}/tests/LargeHexString/builtin.sv +n<> u<0> t<_INVALID_> f<0> l<0:0> +n<> u<1> t p<249> s<248> f<0> l<1:3> el<1:3> +n u<2> t p<102> s<16> f<0> l<1:9> el<1:16> +n<> u<3> t p<4> f<0> l<3:19> el<3:22> +n<> u<4> t p<5> c<3> f<0> l<3:19> el<3:22> +n<> u<5> t p<11> c<4> s<6> f<0> l<3:19> el<3:22> +n u<6> t p<11> s<10> f<0> l<3:23> el<3:28> +n<0> u<7> t p<8> f<0> l<3:31> el<3:32> +n<> u<8> t p<9> c<7> f<0> l<3:31> el<3:32> +n<> u<9> t p<10> c<8> f<0> l<3:31> el<3:32> +n<> u<10> t p<11> c<9> f<0> l<3:31> el<3:32> +n<> u<11> t p<12> c<5> f<0> l<3:19> el<3:32> +n<> u<12> t p<14> c<11> s<13> f<0> l<3:19> el<3:32> +n<> u<13> t p<14> f<0> l<4:5> el<4:16> +n<> u<14> t p<15> c<12> f<0> l<3:5> el<4:16> +n<> u<15> t p<16> c<14> f<0> l<3:5> el<4:16> +n<> u<16> t p<102> c<15> s<26> f<0> l<3:5> el<4:16> +n<> u<17> t p<18> f<0> l<6:14> el<6:17> +n<> u<18> t p<19> c<17> f<0> l<6:14> el<6:17> +n<> u<19> t p<20> c<18> f<0> l<6:14> el<6:17> +n<> u<20> t p<23> c<19> s<21> f<0> l<6:14> el<6:17> +n u<21> t p<23> s<22> f<0> l<6:18> el<6:21> +n<> u<22> t p<23> f<0> l<7:5> el<7:16> +n<> u<23> t p<24> c<20> f<0> l<6:14> el<7:16> +n<> u<24> t p<25> c<23> f<0> l<6:5> el<7:16> +n<> u<25> t p<26> c<24> f<0> l<6:5> el<7:16> +n<> u<26> t p<102> c<25> s<36> f<0> l<6:5> el<7:16> +n u<27> t p<33> s<31> f<0> l<9:10> el<9:13> +n<> u<28> t p<30> s<29> f<0> l<9:15> el<9:15> +n u<29> t p<30> f<0> l<9:15> el<9:22> +n<> u<30> t p<31> c<28> f<0> l<9:15> el<9:22> +n<> u<31> t p<33> c<30> s<32> f<0> l<9:15> el<9:22> +n<> u<32> t p<33> f<0> l<10:5> el<10:12> +n<> u<33> t p<34> c<27> f<0> l<9:10> el<10:12> +n<> u<34> t p<35> c<33> f<0> l<9:5> el<10:12> +n<> u<35> t p<36> c<34> f<0> l<9:5> el<10:12> +n<> u<36> t p<102> c<35> s<47> f<0> l<9:5> el<10:12> +n<> u<37> t p<44> s<38> f<0> l<12:14> el<12:14> +n u<38> t p<44> s<42> f<0> l<12:14> el<12:21> +n<> u<39> t p<41> s<40> f<0> l<12:23> el<12:23> +n u<40> t p<41> f<0> l<12:23> el<12:30> +n<> u<41> t p<42> c<39> f<0> l<12:23> el<12:30> +n<> u<42> t p<44> c<41> s<43> f<0> l<12:23> el<12:30> +n<> u<43> t p<44> f<0> l<13:5> el<13:16> +n<> u<44> t p<45> c<37> f<0> l<12:14> el<13:16> +n<> u<45> t p<46> c<44> f<0> l<12:5> el<13:16> +n<> u<46> t p<47> c<45> f<0> l<12:5> el<13:16> +n<> u<47> t p<102> c<46> s<58> f<0> l<12:5> el<13:16> +n u<48> t p<55> s<53> f<0> l<15:10> el<15:13> +n<> u<49> t p<52> s<50> f<0> l<15:15> el<15:18> +n<> u<50> t p<52> s<51> f<0> l<15:19> el<15:19> +n u<51> t p<52> f<0> l<15:19> el<15:26> +n<> u<52> t p<53> c<49> f<0> l<15:15> el<15:26> +n<> u<53> t p<55> c<52> s<54> f<0> l<15:15> el<15:26> +n<> u<54> t p<55> f<0> l<16:5> el<16:12> +n<> u<55> t p<56> c<48> f<0> l<15:10> el<16:12> +n<> u<56> t p<57> c<55> f<0> l<15:5> el<16:12> +n<> u<57> t p<58> c<56> f<0> l<15:5> el<16:12> +n<> u<58> t p<102> c<57> s<73> f<0> l<15:5> el<16:12> +n<> u<59> t p<60> f<0> l<18:14> el<18:17> +n<> u<60> t p<61> c<59> f<0> l<18:14> el<18:17> +n<> u<61> t p<62> c<60> f<0> l<18:14> el<18:17> +n<> u<62> t p<70> c<61> s<63> f<0> l<18:14> el<18:17> +n u<63> t p<70> s<68> f<0> l<18:18> el<18:25> +n<> u<64> t p<67> s<65> f<0> l<18:27> el<18:30> +n<> u<65> t p<67> s<66> f<0> l<18:31> el<18:31> +n u<66> t p<67> f<0> l<18:31> el<18:38> +n<> u<67> t p<68> c<64> f<0> l<18:27> el<18:38> +n<> u<68> t p<70> c<67> s<69> f<0> l<18:27> el<18:38> +n<> u<69> t p<70> f<0> l<19:5> el<19:16> +n<> u<70> t p<71> c<62> f<0> l<18:14> el<19:16> +n<> u<71> t p<72> c<70> f<0> l<18:5> el<19:16> +n<> u<72> t p<73> c<71> f<0> l<18:5> el<19:16> +n<> u<73> t p<102> c<72> s<84> f<0> l<18:5> el<19:16> +n u<74> t p<81> s<79> f<0> l<21:10> el<21:14> +n<> u<75> t p<78> s<76> f<0> l<21:16> el<21:19> +n<> u<76> t p<78> s<77> f<0> l<21:20> el<21:20> +n u<77> t p<78> f<0> l<21:20> el<21:27> +n<> u<78> t p<79> c<75> f<0> l<21:16> el<21:27> +n<> u<79> t p<81> c<78> s<80> f<0> l<21:16> el<21:27> +n<> u<80> t p<81> f<0> l<22:5> el<22:12> +n<> u<81> t p<82> c<74> f<0> l<21:10> el<22:12> +n<> u<82> t p<83> c<81> f<0> l<21:5> el<22:12> +n<> u<83> t p<84> c<82> f<0> l<21:5> el<22:12> +n<> u<84> t p<102> c<83> s<99> f<0> l<21:5> el<22:12> +n<> u<85> t p<86> f<0> l<24:14> el<24:17> +n<> u<86> t p<87> c<85> f<0> l<24:14> el<24:17> +n<> u<87> t p<88> c<86> f<0> l<24:14> el<24:17> +n<> u<88> t p<96> c<87> s<89> f<0> l<24:14> el<24:17> +n u<89> t p<96> s<94> f<0> l<24:18> el<24:26> +n<> u<90> t p<93> s<91> f<0> l<24:27> el<24:30> +n<> u<91> t p<93> s<92> f<0> l<24:31> el<24:31> +n u<92> t p<93> f<0> l<24:31> el<24:38> +n<> u<93> t p<94> c<90> f<0> l<24:27> el<24:38> +n<> u<94> t p<96> c<93> s<95> f<0> l<24:27> el<24:38> +n<> u<95> t p<96> f<0> l<25:5> el<25:16> +n<> u<96> t p<97> c<88> f<0> l<24:14> el<25:16> +n<> u<97> t p<98> c<96> f<0> l<24:5> el<25:16> +n<> u<98> t p<99> c<97> f<0> l<24:5> el<25:16> +n<> u<99> t p<102> c<98> s<101> f<0> l<24:5> el<25:16> +n<> u<100> t p<102> s<2> f<0> l<1:3> el<1:8> +n<> u<101> t p<102> f<0> l<27:3> el<27:11> +n<> u<102> t p<103> c<100> f<0> l<1:3> el<27:11> +n<> u<103> t p<104> c<102> f<0> l<1:3> el<27:11> +n<> u<104> t p<105> c<103> f<0> l<1:3> el<27:11> +n<> u<105> t p<248> c<104> s<174> f<0> l<1:3> el<27:11> +n u<106> t p<171> s<122> f<0> l<30:9> el<30:16> +n u<107> t p<108> f<0> l<32:20> el<32:28> +n<> u<108> t p<117> c<107> s<110> f<0> l<32:20> el<32:28> +n u<109> t p<110> f<0> l<32:30> el<32:37> +n<> u<110> t p<117> c<109> s<112> f<0> l<32:30> el<32:37> +n u<111> t p<112> f<0> l<32:39> el<32:46> +n<> u<112> t p<117> c<111> s<114> f<0> l<32:39> el<32:46> +n u<113> t p<114> f<0> l<32:48> el<32:57> +n<> u<114> t p<117> c<113> s<116> f<0> l<32:48> el<32:57> +n u<115> t p<116> f<0> l<32:59> el<32:65> +n<> u<116> t p<117> c<115> f<0> l<32:59> el<32:65> +n<> u<117> t p<119> c<108> s<118> f<0> l<32:13> el<32:67> +n u<118> t p<119> f<0> l<32:68> el<32:73> +n<> u<119> t p<120> c<117> f<0> l<32:5> el<32:74> +n<> u<120> t p<121> c<119> f<0> l<32:5> el<32:74> +n<> u<121> t p<122> c<120> f<0> l<32:5> el<32:74> +n<> u<122> t p<171> c<121> s<134> f<0> l<32:5> el<32:74> +n<> u<123> t p<124> f<0> l<34:5> el<34:11> +n<> u<124> t p<133> c<123> s<132> f<0> l<34:5> el<34:11> +n u<125> t p<126> f<0> l<34:21> el<34:28> +n<> u<126> t p<127> c<125> f<0> l<34:21> el<34:28> +n<> u<127> t p<128> c<126> f<0> l<34:21> el<34:28> +n<> u<128> t p<131> c<127> s<129> f<0> l<34:21> el<34:28> +n u<129> t p<131> s<130> f<0> l<34:29> el<34:33> +n<> u<130> t p<131> f<0> l<35:5> el<35:16> +n<> u<131> t p<132> c<128> f<0> l<34:21> el<35:16> +n<> u<132> t p<133> c<131> f<0> l<34:12> el<35:16> +n<> u<133> t p<134> c<124> f<0> l<34:5> el<35:16> +n<> u<134> t p<171> c<133> s<144> f<0> l<34:5> el<35:16> +n u<135> t p<136> f<0> l<37:14> el<37:19> +n<> u<136> t p<137> c<135> f<0> l<37:14> el<37:19> +n<> u<137> t p<138> c<136> f<0> l<37:14> el<37:19> +n<> u<138> t p<141> c<137> s<139> f<0> l<37:14> el<37:19> +n u<139> t p<141> s<140> f<0> l<37:20> el<37:26> +n<> u<140> t p<141> f<0> l<38:5> el<38:16> +n<> u<141> t p<142> c<138> f<0> l<37:14> el<38:16> +n<> u<142> t p<143> c<141> f<0> l<37:5> el<38:16> +n<> u<143> t p<144> c<142> f<0> l<37:5> el<38:16> +n<> u<144> t p<171> c<143> s<150> f<0> l<37:5> el<38:16> +n u<145> t p<147> s<146> f<0> l<40:10> el<40:14> +n<> u<146> t p<147> f<0> l<41:5> el<41:12> +n<> u<147> t p<148> c<145> f<0> l<40:10> el<41:12> +n<> u<148> t p<149> c<147> f<0> l<40:5> el<41:12> +n<> u<149> t p<150> c<148> f<0> l<40:5> el<41:12> +n<> u<150> t p<171> c<149> s<156> f<0> l<40:5> el<41:12> +n u<151> t p<153> s<152> f<0> l<43:10> el<43:15> +n<> u<152> t p<153> f<0> l<44:5> el<44:12> +n<> u<153> t p<154> c<151> f<0> l<43:10> el<44:12> +n<> u<154> t p<155> c<153> f<0> l<43:5> el<44:12> +n<> u<155> t p<156> c<154> f<0> l<43:5> el<44:12> +n<> u<156> t p<171> c<155> s<162> f<0> l<43:5> el<44:12> +n u<157> t p<159> s<158> f<0> l<46:10> el<46:17> +n<> u<158> t p<159> f<0> l<47:5> el<47:12> +n<> u<159> t p<160> c<157> f<0> l<46:10> el<47:12> +n<> u<160> t p<161> c<159> f<0> l<46:5> el<47:12> +n<> u<161> t p<162> c<160> f<0> l<46:5> el<47:12> +n<> u<162> t p<171> c<161> s<168> f<0> l<46:5> el<47:12> +n u<163> t p<165> s<164> f<0> l<49:10> el<49:16> +n<> u<164> t p<165> f<0> l<50:5> el<50:12> +n<> u<165> t p<166> c<163> f<0> l<49:10> el<50:12> +n<> u<166> t p<167> c<165> f<0> l<49:5> el<50:12> +n<> u<167> t p<168> c<166> f<0> l<49:5> el<50:12> +n<> u<168> t p<171> c<167> s<170> f<0> l<49:5> el<50:12> +n<> u<169> t p<171> s<106> f<0> l<30:3> el<30:8> +n<> u<170> t p<171> f<0> l<52:3> el<52:11> +n<> u<171> t p<172> c<169> f<0> l<30:3> el<52:11> +n<> u<172> t p<173> c<171> f<0> l<30:3> el<52:11> +n<> u<173> t p<174> c<172> f<0> l<30:3> el<52:11> +n<> u<174> t p<248> c<173> s<247> f<0> l<30:3> el<52:11> +n u<175> t p<244> s<189> f<0> l<55:9> el<55:18> +n<> u<176> t p<177> f<0> l<57:18> el<57:21> +n<> u<177> t p<178> c<176> f<0> l<57:18> el<57:21> +n<> u<178> t p<184> c<177> s<179> f<0> l<57:18> el<57:21> +n u<179> t p<184> s<183> f<0> l<57:22> el<57:30> +n<0> u<180> t p<181> f<0> l<57:33> el<57:34> +n<> u<181> t p<182> c<180> f<0> l<57:33> el<57:34> +n<> u<182> t p<183> c<181> f<0> l<57:33> el<57:34> +n<> u<183> t p<184> c<182> f<0> l<57:33> el<57:34> +n<> u<184> t p<185> c<178> f<0> l<57:18> el<57:34> +n<> u<185> t p<187> c<184> s<186> f<0> l<57:18> el<57:34> +n<> u<186> t p<187> f<0> l<58:5> el<58:16> +n<> u<187> t p<188> c<185> f<0> l<57:5> el<58:16> +n<> u<188> t p<189> c<187> f<0> l<57:5> el<58:16> +n<> u<189> t p<244> c<188> s<205> f<0> l<57:5> el<58:16> +n u<190> t p<202> s<200> f<0> l<60:10> el<60:13> +n<> u<191> t p<192> f<0> l<60:14> el<60:17> +n<> u<192> t p<193> c<191> f<0> l<60:14> el<60:17> +n<> u<193> t p<199> c<192> s<194> f<0> l<60:14> el<60:17> +n u<194> t p<199> s<198> f<0> l<60:18> el<60:26> +n<1> u<195> t p<196> f<0> l<60:29> el<60:30> +n<> u<196> t p<197> c<195> f<0> l<60:29> el<60:30> +n<> u<197> t p<198> c<196> f<0> l<60:29> el<60:30> +n<> u<198> t p<199> c<197> f<0> l<60:29> el<60:30> +n<> u<199> t p<200> c<193> f<0> l<60:14> el<60:30> +n<> u<200> t p<202> c<199> s<201> f<0> l<60:14> el<60:30> +n<> u<201> t p<202> f<0> l<61:5> el<61:12> +n<> u<202> t p<203> c<190> f<0> l<60:10> el<61:12> +n<> u<203> t p<204> c<202> f<0> l<60:5> el<61:12> +n<> u<204> t p<205> c<203> f<0> l<60:5> el<61:12> +n<> u<205> t p<244> c<204> s<221> f<0> l<60:5> el<61:12> +n u<206> t p<218> s<216> f<0> l<63:10> el<63:13> +n<> u<207> t p<208> f<0> l<63:14> el<63:17> +n<> u<208> t p<209> c<207> f<0> l<63:14> el<63:17> +n<> u<209> t p<215> c<208> s<210> f<0> l<63:14> el<63:17> +n u<210> t p<215> s<214> f<0> l<63:18> el<63:26> +n<1> u<211> t p<212> f<0> l<63:29> el<63:30> +n<> u<212> t p<213> c<211> f<0> l<63:29> el<63:30> +n<> u<213> t p<214> c<212> f<0> l<63:29> el<63:30> +n<> u<214> t p<215> c<213> f<0> l<63:29> el<63:30> +n<> u<215> t p<216> c<209> f<0> l<63:14> el<63:30> +n<> u<216> t p<218> c<215> s<217> f<0> l<63:14> el<63:30> +n<> u<217> t p<218> f<0> l<64:5> el<64:12> +n<> u<218> t p<219> c<206> f<0> l<63:10> el<64:12> +n<> u<219> t p<220> c<218> f<0> l<63:5> el<64:12> +n<> u<220> t p<221> c<219> f<0> l<63:5> el<64:12> +n<> u<221> t p<244> c<220> s<241> f<0> l<63:5> el<64:12> +n<> u<222> t p<223> f<0> l<66:14> el<66:17> +n<> u<223> t p<224> c<222> f<0> l<66:14> el<66:17> +n<> u<224> t p<225> c<223> f<0> l<66:14> el<66:17> +n<> u<225> t p<238> c<224> s<226> f<0> l<66:14> el<66:17> +n u<226> t p<238> s<236> f<0> l<66:18> el<66:25> +n<> u<227> t p<228> f<0> l<66:26> el<66:29> +n<> u<228> t p<229> c<227> f<0> l<66:26> el<66:29> +n<> u<229> t p<235> c<228> s<230> f<0> l<66:26> el<66:29> +n u<230> t p<235> s<234> f<0> l<66:30> el<66:38> +n<1> u<231> t p<232> f<0> l<66:41> el<66:42> +n<> u<232> t p<233> c<231> f<0> l<66:41> el<66:42> +n<> u<233> t p<234> c<232> f<0> l<66:41> el<66:42> +n<> u<234> t p<235> c<233> f<0> l<66:41> el<66:42> +n<> u<235> t p<236> c<229> f<0> l<66:26> el<66:42> +n<> u<236> t p<238> c<235> s<237> f<0> l<66:26> el<66:42> +n<> u<237> t p<238> f<0> l<67:5> el<67:16> +n<> u<238> t p<239> c<225> f<0> l<66:14> el<67:16> +n<> u<239> t p<240> c<238> f<0> l<66:5> el<67:16> +n<> u<240> t p<241> c<239> f<0> l<66:5> el<67:16> +n<> u<241> t p<244> c<240> s<243> f<0> l<66:5> el<67:16> +n<> u<242> t p<244> s<175> f<0> l<55:3> el<55:8> +n<> u<243> t p<244> f<0> l<69:3> el<69:11> +n<> u<244> t p<245> c<242> f<0> l<55:3> el<69:11> +n<> u<245> t p<246> c<244> f<0> l<55:3> el<69:11> +n<> u<246> t p<247> c<245> f<0> l<55:3> el<69:11> +n<> u<247> t p<248> c<246> f<0> l<55:3> el<69:11> +n<> u<248> t p<249> c<105> f<0> l<1:3> el<69:11> +n<> u<249> t c<1> f<0> l<1:3> el<71:9> +AST_DEBUG_END +[INF:CP0302] Compile class "work@mailbox". +[INF:CP0302] Compile class "work@process". +[INF:CP0302] Compile class "work@semaphore". +[INF:EL0526] Design Elaboration... +[NTE:EL0503] ${SURELOG_DIR}/tests/LargeHexString/dut.sv:8:1: Top level module "work@top". +[NTE:EL0508] Nb Top level modules: 1. +[NTE:EL0509] Max instance depth: 2. +[NTE:EL0510] Nb instances: 2. +[NTE:EL0511] Nb leaf instances: 1. +[INF:UH0706] Creating UHDM Model... +=== UHDM Object Stats Begin (Non-Elaborated Model) === +class_defn 8 +class_typespec 4 +class_var 3 +constant 12 +design 1 +enum_const 5 +enum_typespec 1 +enum_var 1 +function 9 +int_typespec 11 +int_var 4 +io_decl 11 +logic_var 1 +module_inst 6 +package 2 +param_assign 2 +parameter 2 +range 2 +ref_module 1 +ref_typespec 17 +task 9 +=== UHDM Object Stats End === +[INF:UH0707] Elaborating UHDM... +=== UHDM Object Stats Begin (Elaborated Model) === +class_defn 8 +class_typespec 4 +class_var 3 +constant 12 +design 1 +enum_const 10 +enum_typespec 2 +enum_var 1 +function 18 +int_typespec 11 +int_var 4 +io_decl 22 +logic_var 1 +module_inst 6 +package 2 +param_assign 2 +parameter 2 +range 2 +ref_module 1 +ref_typespec 22 +task 18 +=== UHDM Object Stats End === +[INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/LargeHexString/slpp_all/surelog.uhdm ... +[INF:UH0709] Writing UHDM Html Coverage: ${SURELOG_DIR}/build/regression/LargeHexString/slpp_all/checker/surelog.chk.html ... +[INF:UH0710] Loading UHDM DB: ${SURELOG_DIR}/build/regression/LargeHexString/slpp_all/surelog.uhdm ... +[INF:UH0711] Decompiling UHDM... +====== UHDM ======= +design: (work@top) +|vpiElaborated:1 +|vpiName:work@top +|uhdmallPackages: +\_package: builtin (builtin::) + |vpiParent: + \_design: (work@top) + |vpiName:builtin + |vpiFullName:builtin:: + |vpiDefName:builtin +|uhdmtopPackages: +\_package: builtin (builtin::) + |vpiParent: + \_design: (work@top) + |vpiName:builtin + |vpiFullName:builtin:: + |vpiDefName:builtin + |vpiTop:1 + |vpiClassDefn: + \_class_defn: (builtin::any_sverilog_class) + |vpiParent: + \_package: builtin (builtin::) + |vpiName:any_sverilog_class + |vpiFullName:builtin::any_sverilog_class + |vpiClassDefn: + \_class_defn: (builtin::array) + |vpiParent: + \_package: builtin (builtin::) + |vpiName:array + |vpiFullName:builtin::array + |vpiClassDefn: + \_class_defn: (builtin::queue) + |vpiParent: + \_package: builtin (builtin::) + |vpiName:queue + |vpiFullName:builtin::queue + |vpiClassDefn: + \_class_defn: (builtin::string) + |vpiParent: + \_package: builtin (builtin::) + |vpiName:string + |vpiFullName:builtin::string + |vpiClassDefn: + \_class_defn: (builtin::system) + |vpiParent: + \_package: builtin (builtin::) + |vpiName:system + |vpiFullName:builtin::system +|uhdmallClasses: +\_class_defn: (work@mailbox), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:1:3, endln:27:11 + |vpiParent: + \_design: (work@top) + |vpiName:work@mailbox + |vpiMethod: + \_function: (work@mailbox::new), line:3:5, endln:4:16 + |vpiParent: + \_class_defn: (work@mailbox), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:1:3, endln:27:11 + |vpiName:new + |vpiFullName:work@mailbox::new + |vpiMethod:1 + |vpiReturn: + \_class_var: (work@mailbox::new), line:3:23, endln:3:28 + |vpiParent: + \_function: (work@mailbox::new), line:3:5, endln:4:16 + |vpiTypespec: + \_ref_typespec: (work@mailbox::new) + |vpiParent: + \_class_var: (work@mailbox::new), line:3:23, endln:3:28 + |vpiFullName:work@mailbox::new + |vpiActual: + \_class_typespec: + |vpiFullName:work@mailbox::new + |vpiIODecl: + \_io_decl: (bound), line:3:23, endln:3:28 + |vpiParent: + \_function: (work@mailbox::new), line:3:5, endln:4:16 + |vpiDirection:1 + |vpiName:bound + |vpiExpr: + \_constant: , line:3:31, endln:3:32 + |vpiDecompile:0 + |vpiSize:64 + |UINT:0 + |vpiConstType:9 + |vpiTypedef: + \_ref_typespec: (work@mailbox::new::bound) + |vpiParent: + \_io_decl: (bound), line:3:23, endln:3:28 + |vpiFullName:work@mailbox::new::bound + |vpiActual: + \_int_typespec: , line:3:19, endln:3:22 + |vpiMethod: + \_function: (work@mailbox::num), line:6:5, endln:7:16 + |vpiParent: + \_class_defn: (work@mailbox), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:1:3, endln:27:11 + |vpiName:num + |vpiFullName:work@mailbox::num + |vpiMethod:1 + |vpiVisibility:1 + |vpiReturn: + \_int_var: (work@mailbox::num), line:6:14, endln:6:17 + |vpiParent: + \_function: (work@mailbox::num), line:6:5, endln:7:16 + |vpiTypespec: + \_ref_typespec: (work@mailbox::num) + |vpiParent: + \_int_var: (work@mailbox::num), line:6:14, endln:6:17 + |vpiFullName:work@mailbox::num + |vpiActual: + \_int_typespec: , line:6:14, endln:6:17 + |vpiFullName:work@mailbox::num + |vpiSigned:1 + |vpiMethod: + \_task: (work@mailbox::put), line:9:5, endln:10:12 + |vpiParent: + \_class_defn: (work@mailbox), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:1:3, endln:27:11 + |vpiName:put + |vpiFullName:work@mailbox::put + |vpiMethod:1 + |vpiVisibility:1 + |vpiIODecl: + \_io_decl: (message), line:9:15, endln:9:22 + |vpiParent: + \_task: (work@mailbox::put), line:9:5, endln:10:12 + |vpiDirection:1 + |vpiName:message + |vpiMethod: + \_function: (work@mailbox::try_put), line:12:5, endln:13:16 + |vpiParent: + \_class_defn: (work@mailbox), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:1:3, endln:27:11 + |vpiName:try_put + |vpiFullName:work@mailbox::try_put + |vpiMethod:1 + |vpiVisibility:1 + |vpiReturn: + \_logic_var: (work@mailbox::try_put) + |vpiParent: + \_function: (work@mailbox::try_put), line:12:5, endln:13:16 + |vpiFullName:work@mailbox::try_put + |vpiIODecl: + \_io_decl: (message), line:12:23, endln:12:30 + |vpiParent: + \_function: (work@mailbox::try_put), line:12:5, endln:13:16 + |vpiDirection:1 + |vpiName:message + |vpiMethod: + \_task: (work@mailbox::get), line:15:5, endln:16:12 + |vpiParent: + \_class_defn: (work@mailbox), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:1:3, endln:27:11 + |vpiName:get + |vpiFullName:work@mailbox::get + |vpiMethod:1 + |vpiVisibility:1 + |vpiIODecl: + \_io_decl: (message), line:15:19, endln:15:26 + |vpiParent: + \_task: (work@mailbox::get), line:15:5, endln:16:12 + |vpiDirection:6 + |vpiName:message + |vpiMethod: + \_function: (work@mailbox::try_get), line:18:5, endln:19:16 + |vpiParent: + \_class_defn: (work@mailbox), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:1:3, endln:27:11 + |vpiName:try_get + |vpiFullName:work@mailbox::try_get + |vpiMethod:1 + |vpiVisibility:1 + |vpiReturn: + \_int_var: (work@mailbox::try_get), line:18:14, endln:18:17 + |vpiParent: + \_function: (work@mailbox::try_get), line:18:5, endln:19:16 + |vpiTypespec: + \_ref_typespec: (work@mailbox::try_get) + |vpiParent: + \_int_var: (work@mailbox::try_get), line:18:14, endln:18:17 + |vpiFullName:work@mailbox::try_get + |vpiActual: + \_int_typespec: , line:18:14, endln:18:17 + |vpiFullName:work@mailbox::try_get + |vpiSigned:1 + |vpiIODecl: + \_io_decl: (message), line:18:31, endln:18:38 + |vpiParent: + \_function: (work@mailbox::try_get), line:18:5, endln:19:16 + |vpiDirection:6 + |vpiName:message + |vpiMethod: + \_task: (work@mailbox::peek), line:21:5, endln:22:12 + |vpiParent: + \_class_defn: (work@mailbox), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:1:3, endln:27:11 + |vpiName:peek + |vpiFullName:work@mailbox::peek + |vpiMethod:1 + |vpiVisibility:1 + |vpiIODecl: + \_io_decl: (message), line:21:20, endln:21:27 + |vpiParent: + \_task: (work@mailbox::peek), line:21:5, endln:22:12 + |vpiDirection:6 + |vpiName:message + |vpiMethod: + \_function: (work@mailbox::try_peek), line:24:5, endln:25:16 + |vpiParent: + \_class_defn: (work@mailbox), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:1:3, endln:27:11 + |vpiName:try_peek + |vpiFullName:work@mailbox::try_peek + |vpiMethod:1 + |vpiVisibility:1 + |vpiReturn: + \_int_var: (work@mailbox::try_peek), line:24:14, endln:24:17 + |vpiParent: + \_function: (work@mailbox::try_peek), line:24:5, endln:25:16 + |vpiTypespec: + \_ref_typespec: (work@mailbox::try_peek) + |vpiParent: + \_int_var: (work@mailbox::try_peek), line:24:14, endln:24:17 + |vpiFullName:work@mailbox::try_peek + |vpiActual: + \_int_typespec: , line:24:14, endln:24:17 + |vpiFullName:work@mailbox::try_peek + |vpiSigned:1 + |vpiIODecl: + \_io_decl: (message), line:24:31, endln:24:38 + |vpiParent: + \_function: (work@mailbox::try_peek), line:24:5, endln:25:16 + |vpiDirection:6 + |vpiName:message +|uhdmallClasses: +\_class_defn: (work@process), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:30:3, endln:52:11 + |vpiParent: + \_design: (work@top) + |vpiName:work@process + |vpiTypedef: + \_enum_typespec: (state), line:32:5, endln:32:74 + |vpiParent: + \_class_defn: (work@process), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:30:3, endln:52:11 + |vpiName:state + |vpiEnumConst: + \_enum_const: (FINISHED), line:32:20, endln:32:28 + |vpiParent: + \_enum_typespec: (state), line:32:5, endln:32:74 + |vpiName:FINISHED + |INT:0 + |vpiDecompile:0 + |vpiSize:64 + |vpiEnumConst: + \_enum_const: (RUNNING), line:32:30, endln:32:37 + |vpiParent: + \_enum_typespec: (state), line:32:5, endln:32:74 + |vpiName:RUNNING + |INT:1 + |vpiDecompile:1 + |vpiSize:64 + |vpiEnumConst: + \_enum_const: (WAITING), line:32:39, endln:32:46 + |vpiParent: + \_enum_typespec: (state), line:32:5, endln:32:74 + |vpiName:WAITING + |INT:2 + |vpiDecompile:2 + |vpiSize:64 + |vpiEnumConst: + \_enum_const: (SUSPENDED), line:32:48, endln:32:57 + |vpiParent: + \_enum_typespec: (state), line:32:5, endln:32:74 + |vpiName:SUSPENDED + |INT:3 + |vpiDecompile:3 + |vpiSize:64 + |vpiEnumConst: + \_enum_const: (KILLED), line:32:59, endln:32:65 + |vpiParent: + \_enum_typespec: (state), line:32:5, endln:32:74 + |vpiName:KILLED + |INT:4 + |vpiDecompile:4 + |vpiSize:64 + |vpiMethod: + \_function: (work@process::self), line:34:5, endln:34:11 + |vpiParent: + \_class_defn: (work@process), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:30:3, endln:52:11 + |vpiName:self + |vpiFullName:work@process::self + |vpiMethod:1 + |vpiVisibility:1 + |vpiReturn: + \_class_var: (work@process::self), line:34:21, endln:34:28 + |vpiParent: + \_function: (work@process::self), line:34:5, endln:34:11 + |vpiTypespec: + \_ref_typespec: (work@process::self) + |vpiParent: + \_class_var: (work@process::self), line:34:21, endln:34:28 + |vpiFullName:work@process::self + |vpiActual: + \_class_typespec: , line:34:21, endln:34:28 + |vpiFullName:work@process::self + |vpiMethod: + \_function: (work@process::status), line:37:5, endln:38:16 + |vpiParent: + \_class_defn: (work@process), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:30:3, endln:52:11 + |vpiName:status + |vpiFullName:work@process::status + |vpiMethod:1 + |vpiVisibility:1 + |vpiReturn: + \_enum_var: (work@process::status), line:37:14, endln:37:19 + |vpiParent: + \_function: (work@process::status), line:37:5, endln:38:16 + |vpiTypespec: + \_ref_typespec: (work@process::status) + |vpiParent: + \_enum_var: (work@process::status), line:37:14, endln:37:19 + |vpiFullName:work@process::status + |vpiActual: + \_enum_typespec: (state), line:32:5, endln:32:74 + |vpiFullName:work@process::status + |vpiMethod: + \_task: (work@process::kill), line:40:5, endln:41:12 + |vpiParent: + \_class_defn: (work@process), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:30:3, endln:52:11 + |vpiName:kill + |vpiFullName:work@process::kill + |vpiMethod:1 + |vpiVisibility:1 + |vpiMethod: + \_task: (work@process::await), line:43:5, endln:44:12 + |vpiParent: + \_class_defn: (work@process), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:30:3, endln:52:11 + |vpiName:await + |vpiFullName:work@process::await + |vpiMethod:1 + |vpiVisibility:1 + |vpiMethod: + \_task: (work@process::suspend), line:46:5, endln:47:12 + |vpiParent: + \_class_defn: (work@process), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:30:3, endln:52:11 + |vpiName:suspend + |vpiFullName:work@process::suspend + |vpiMethod:1 + |vpiVisibility:1 + |vpiMethod: + \_task: (work@process::resume), line:49:5, endln:50:12 + |vpiParent: + \_class_defn: (work@process), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:30:3, endln:52:11 + |vpiName:resume + |vpiFullName:work@process::resume + |vpiMethod:1 + |vpiVisibility:1 +|uhdmallClasses: +\_class_defn: (work@semaphore), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:55:3, endln:69:11 + |vpiParent: + \_design: (work@top) + |vpiName:work@semaphore + |vpiMethod: + \_function: (work@semaphore::new), line:57:5, endln:58:16 + |vpiParent: + \_class_defn: (work@semaphore), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:55:3, endln:69:11 + |vpiName:new + |vpiFullName:work@semaphore::new + |vpiMethod:1 + |vpiReturn: + \_class_var: (work@semaphore::new), line:57:22, endln:57:30 + |vpiParent: + \_function: (work@semaphore::new), line:57:5, endln:58:16 + |vpiTypespec: + \_ref_typespec: (work@semaphore::new) + |vpiParent: + \_class_var: (work@semaphore::new), line:57:22, endln:57:30 + |vpiFullName:work@semaphore::new + |vpiActual: + \_class_typespec: + |vpiFullName:work@semaphore::new + |vpiIODecl: + \_io_decl: (keyCount), line:57:22, endln:57:30 + |vpiParent: + \_function: (work@semaphore::new), line:57:5, endln:58:16 + |vpiDirection:1 + |vpiName:keyCount + |vpiExpr: + \_constant: , line:57:33, endln:57:34 + |vpiDecompile:0 + |vpiSize:64 + |UINT:0 + |vpiConstType:9 + |vpiTypedef: + \_ref_typespec: (work@semaphore::new::keyCount) + |vpiParent: + \_io_decl: (keyCount), line:57:22, endln:57:30 + |vpiFullName:work@semaphore::new::keyCount + |vpiActual: + \_int_typespec: , line:57:18, endln:57:21 + |vpiMethod: + \_task: (work@semaphore::put), line:60:5, endln:61:12 + |vpiParent: + \_class_defn: (work@semaphore), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:55:3, endln:69:11 + |vpiName:put + |vpiFullName:work@semaphore::put + |vpiMethod:1 + |vpiVisibility:1 + |vpiIODecl: + \_io_decl: (keyCount), line:60:18, endln:60:26 + |vpiParent: + \_task: (work@semaphore::put), line:60:5, endln:61:12 + |vpiDirection:1 + |vpiName:keyCount + |vpiExpr: + \_constant: , line:60:29, endln:60:30 + |vpiDecompile:1 + |vpiSize:64 + |UINT:1 + |vpiConstType:9 + |vpiTypedef: + \_ref_typespec: (work@semaphore::put::keyCount) + |vpiParent: + \_io_decl: (keyCount), line:60:18, endln:60:26 + |vpiFullName:work@semaphore::put::keyCount + |vpiActual: + \_int_typespec: , line:60:14, endln:60:17 + |vpiMethod: + \_task: (work@semaphore::get), line:63:5, endln:64:12 + |vpiParent: + \_class_defn: (work@semaphore), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:55:3, endln:69:11 + |vpiName:get + |vpiFullName:work@semaphore::get + |vpiMethod:1 + |vpiVisibility:1 + |vpiIODecl: + \_io_decl: (keyCount), line:63:18, endln:63:26 + |vpiParent: + \_task: (work@semaphore::get), line:63:5, endln:64:12 + |vpiDirection:1 + |vpiName:keyCount + |vpiExpr: + \_constant: , line:63:29, endln:63:30 + |vpiDecompile:1 + |vpiSize:64 + |UINT:1 + |vpiConstType:9 + |vpiTypedef: + \_ref_typespec: (work@semaphore::get::keyCount) + |vpiParent: + \_io_decl: (keyCount), line:63:18, endln:63:26 + |vpiFullName:work@semaphore::get::keyCount + |vpiActual: + \_int_typespec: , line:63:14, endln:63:17 + |vpiMethod: + \_function: (work@semaphore::try_get), line:66:5, endln:67:16 + |vpiParent: + \_class_defn: (work@semaphore), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:55:3, endln:69:11 + |vpiName:try_get + |vpiFullName:work@semaphore::try_get + |vpiMethod:1 + |vpiVisibility:1 + |vpiReturn: + \_int_var: (work@semaphore::try_get), line:66:14, endln:66:17 + |vpiParent: + \_function: (work@semaphore::try_get), line:66:5, endln:67:16 + |vpiTypespec: + \_ref_typespec: (work@semaphore::try_get) + |vpiParent: + \_int_var: (work@semaphore::try_get), line:66:14, endln:66:17 + |vpiFullName:work@semaphore::try_get + |vpiActual: + \_int_typespec: , line:66:14, endln:66:17 + |vpiFullName:work@semaphore::try_get + |vpiSigned:1 + |vpiIODecl: + \_io_decl: (keyCount), line:66:30, endln:66:38 + |vpiParent: + \_function: (work@semaphore::try_get), line:66:5, endln:67:16 + |vpiDirection:1 + |vpiName:keyCount + |vpiExpr: + \_constant: , line:66:41, endln:66:42 + |vpiDecompile:1 + |vpiSize:64 + |UINT:1 + |vpiConstType:9 + |vpiTypedef: + \_ref_typespec: (work@semaphore::try_get::keyCount) + |vpiParent: + \_io_decl: (keyCount), line:66:30, endln:66:38 + |vpiFullName:work@semaphore::try_get::keyCount + |vpiActual: + \_int_typespec: , line:66:26, endln:66:29 +|uhdmallModules: +\_module_inst: work@bottom (work@bottom), file:${SURELOG_DIR}/tests/LargeHexString/dut.sv, line:1:1, endln:6:10 + |vpiParent: + \_design: (work@top) + |vpiFullName:work@bottom + |vpiParameter: + \_parameter: (work@bottom.INIT_i), line:2:14, endln:2:20 + |vpiParent: + \_module_inst: work@bottom (work@bottom), file:${SURELOG_DIR}/tests/LargeHexString/dut.sv, line:1:1, endln:6:10 + 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+ |vpiTypespec: + \_ref_typespec: (work@bottom.INIT_i) + |vpiParent: + \_parameter: (work@bottom.INIT_i), line:2:14, endln:2:20 + |vpiFullName:work@bottom.INIT_i + |vpiActual: + \_int_typespec: , line:2:4, endln:2:8671 + |vpiName:INIT_i + |vpiFullName:work@bottom.INIT_i + |vpiParamAssign: + \_param_assign: , line:2:14, endln:2:8671 + |vpiParent: + \_module_inst: work@bottom (work@bottom), file:${SURELOG_DIR}/tests/LargeHexString/dut.sv, line:1:1, endln:6:10 + |vpiRhs: + \_constant: , line:2:23, endln:2:8671 + |vpiParent: + \_param_assign: , line:2:14, endln:2:8671 + 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+ |vpiSize:36864 + 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+ |vpiTypespec: + \_ref_typespec: (work@bottom) + |vpiParent: + \_constant: , line:2:23, endln:2:8671 + |vpiFullName:work@bottom + |vpiActual: + \_int_typespec: , line:2:4, endln:2:8671 + |vpiConstType:5 + |vpiLhs: + \_parameter: (work@bottom.INIT_i), line:2:14, endln:2:20 + |vpiDefName:work@bottom +|uhdmallModules: +\_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/LargeHexString/dut.sv, line:8:1, endln:12:10 + |vpiParent: + \_design: (work@top) + |vpiFullName:work@top + |vpiDefName:work@top + |vpiRefModule: + \_ref_module: work@bottom (u1), line:10:9247, endln:10:9249 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/LargeHexString/dut.sv, line:8:1, endln:12:10 + |vpiName:u1 + |vpiDefName:work@bottom + |vpiActual: + \_module_inst: work@bottom (work@bottom), file:${SURELOG_DIR}/tests/LargeHexString/dut.sv, line:1:1, endln:6:10 +|uhdmtopModules: +\_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/LargeHexString/dut.sv, line:8:1, endln:12:10 + |vpiName:work@top + |vpiDefName:work@top + |vpiTop:1 + |vpiTopModule:1 + |vpiModule: + \_module_inst: work@bottom (work@top.u1), file:${SURELOG_DIR}/tests/LargeHexString/dut.sv, line:10:3, endln:10:9253 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/LargeHexString/dut.sv, line:8:1, endln:12:10 + |vpiName:u1 + |vpiFullName:work@top.u1 + |vpiParameter: + \_parameter: (work@top.u1.INIT_i), line:2:14, endln:2:20 + |vpiParent: + \_module_inst: work@bottom (work@top.u1), file:${SURELOG_DIR}/tests/LargeHexString/dut.sv, line:10:3, endln:10:9253 + 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+ |vpiTypespec: + \_ref_typespec: (work@top.u1.INIT_i) + |vpiParent: + \_parameter: (work@top.u1.INIT_i), line:2:14, endln:2:20 + |vpiFullName:work@top.u1.INIT_i + |vpiActual: + \_int_typespec: , line:2:4, endln:2:8671 + |vpiName:INIT_i + |vpiFullName:work@top.u1.INIT_i + |vpiParamAssign: + \_param_assign: , line:2:14, endln:2:8671 + |vpiParent: + \_module_inst: work@bottom (work@top.u1), file:${SURELOG_DIR}/tests/LargeHexString/dut.sv, line:10:3, endln:10:9253 + |vpiOverriden:1 + |vpiRhs: + \_constant: , line:2:23, endln:2:8671 + |vpiParent: + \_param_assign: , line:2:14, endln:2:8671 + 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+ |vpiSize:36864 + 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+ |vpiTypespec: + \_ref_typespec: (work@top.u1) + |vpiParent: + \_constant: , line:2:23, endln:2:8671 + |vpiFullName:work@top.u1 + |vpiActual: + \_int_typespec: , line:2:4, endln:2:8671 + |vpiConstType:5 + |vpiLhs: + \_parameter: (work@top.u1.INIT_i), line:2:14, endln:2:20 + |vpiDefName:work@bottom + |vpiDefFile:${SURELOG_DIR}/tests/LargeHexString/dut.sv + |vpiDefLineNo:1 + |vpiInstance: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/LargeHexString/dut.sv, line:8:1, endln:12:10 +\_weaklyReferenced: +\_int_typespec: , line:2:4, endln:2:8671 + |vpiRange: + \_range: + |vpiParent: + \_int_typespec: , line:2:4, endln:2:8671 + |vpiLeftRange: + \_constant: + |INT:36863 + |vpiRightRange: + \_constant: + |INT:0 +\_function: (work@mailbox::new), line:3:5, endln:4:16 + |vpiParent: + \_class_defn: (work@mailbox), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:1:3, endln:27:11 + |vpiName:new + |vpiFullName:work@mailbox::new + |vpiMethod:1 + |vpiReturn: + \_class_var: (work@mailbox::new), line:3:23, endln:3:28 + |vpiIODecl: + \_io_decl: (bound), line:3:23, endln:3:28 + |vpiParent: + \_function: (work@mailbox::new), line:3:5, endln:4:16 + |vpiDirection:1 + |vpiName:bound + |vpiExpr: + \_constant: , line:3:31, endln:3:32 + |vpiTypedef: + \_ref_typespec: (work@mailbox::new::bound) + |vpiParent: + \_io_decl: (bound), line:3:23, endln:3:28 + |vpiFullName:work@mailbox::new::bound + |vpiActual: + \_int_typespec: , line:3:19, endln:3:22 +\_class_typespec: + |vpiClassDefn: + \_class_defn: (work@mailbox), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:1:3, endln:27:11 +\_int_typespec: , line:3:19, endln:3:22 + |vpiSigned:1 +\_function: (work@mailbox::num), line:6:5, endln:7:16 + |vpiParent: + \_class_defn: (work@mailbox), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:1:3, endln:27:11 + |vpiName:num + |vpiFullName:work@mailbox::num + |vpiMethod:1 + |vpiVisibility:1 + |vpiReturn: + \_int_var: (work@mailbox::num), line:6:14, endln:6:17 +\_int_typespec: , line:6:14, endln:6:17 + |vpiSigned:1 +\_function: (work@mailbox::try_put), line:12:5, endln:13:16 + |vpiParent: + \_class_defn: (work@mailbox), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:1:3, endln:27:11 + |vpiName:try_put + |vpiFullName:work@mailbox::try_put + |vpiMethod:1 + |vpiVisibility:1 + |vpiReturn: + \_logic_var: (work@mailbox::try_put) + |vpiIODecl: + \_io_decl: (message), line:12:23, endln:12:30 + |vpiParent: + \_function: (work@mailbox::try_put), line:12:5, endln:13:16 + |vpiDirection:1 + |vpiName:message +\_function: (work@mailbox::try_get), line:18:5, endln:19:16 + |vpiParent: + \_class_defn: (work@mailbox), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:1:3, endln:27:11 + |vpiName:try_get + |vpiFullName:work@mailbox::try_get + |vpiMethod:1 + |vpiVisibility:1 + |vpiReturn: + \_int_var: (work@mailbox::try_get), line:18:14, endln:18:17 + |vpiIODecl: + \_io_decl: (message), line:18:31, endln:18:38 + |vpiParent: + \_function: (work@mailbox::try_get), line:18:5, endln:19:16 + |vpiDirection:6 + |vpiName:message +\_int_typespec: , line:18:14, endln:18:17 + |vpiSigned:1 +\_function: (work@mailbox::try_peek), line:24:5, endln:25:16 + |vpiParent: + \_class_defn: (work@mailbox), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:1:3, endln:27:11 + |vpiName:try_peek + |vpiFullName:work@mailbox::try_peek + |vpiMethod:1 + |vpiVisibility:1 + |vpiReturn: + \_int_var: (work@mailbox::try_peek), line:24:14, endln:24:17 + |vpiIODecl: + \_io_decl: (message), line:24:31, endln:24:38 + |vpiParent: + \_function: (work@mailbox::try_peek), line:24:5, endln:25:16 + |vpiDirection:6 + |vpiName:message +\_int_typespec: , line:24:14, endln:24:17 + |vpiSigned:1 +\_enum_typespec: (state), line:32:5, endln:32:74 + |vpiParent: + \_class_defn: (work@process), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:30:3, endln:52:11 + |vpiName:state + |vpiEnumConst: + \_enum_const: (FINISHED), line:32:20, endln:32:28 + |vpiParent: + \_enum_typespec: (state), line:32:5, endln:32:74 + |vpiName:FINISHED + |INT:0 + |vpiDecompile:0 + |vpiSize:64 + |vpiEnumConst: + \_enum_const: (RUNNING), line:32:30, endln:32:37 + |vpiParent: + \_enum_typespec: (state), line:32:5, endln:32:74 + |vpiName:RUNNING + |INT:1 + |vpiDecompile:1 + |vpiSize:64 + |vpiEnumConst: + \_enum_const: (WAITING), line:32:39, endln:32:46 + |vpiParent: + \_enum_typespec: (state), line:32:5, endln:32:74 + |vpiName:WAITING + |INT:2 + |vpiDecompile:2 + |vpiSize:64 + |vpiEnumConst: + \_enum_const: (SUSPENDED), line:32:48, endln:32:57 + |vpiParent: + \_enum_typespec: (state), line:32:5, endln:32:74 + |vpiName:SUSPENDED + |INT:3 + |vpiDecompile:3 + |vpiSize:64 + |vpiEnumConst: + \_enum_const: (KILLED), line:32:59, endln:32:65 + |vpiParent: + \_enum_typespec: (state), line:32:5, endln:32:74 + |vpiName:KILLED + |INT:4 + |vpiDecompile:4 + |vpiSize:64 +\_function: (work@process::self), line:34:5, endln:34:11 + |vpiParent: + \_class_defn: (work@process), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:30:3, endln:52:11 + |vpiName:self + |vpiFullName:work@process::self + |vpiMethod:1 + |vpiVisibility:1 + |vpiReturn: + \_class_var: (work@process::self), line:34:21, endln:34:28 +\_class_typespec: , line:34:21, endln:34:28 + |vpiClassDefn: + \_class_defn: (work@process), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:30:3, endln:52:11 +\_function: (work@process::status), line:37:5, endln:38:16 + |vpiParent: + \_class_defn: (work@process), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:30:3, endln:52:11 + |vpiName:status + |vpiFullName:work@process::status + |vpiMethod:1 + |vpiVisibility:1 + |vpiReturn: + \_enum_var: (work@process::status), line:37:14, endln:37:19 +\_function: (work@semaphore::new), line:57:5, endln:58:16 + |vpiParent: + \_class_defn: (work@semaphore), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:55:3, endln:69:11 + |vpiName:new + |vpiFullName:work@semaphore::new + |vpiMethod:1 + |vpiReturn: + \_class_var: (work@semaphore::new), line:57:22, endln:57:30 + |vpiIODecl: + \_io_decl: (keyCount), line:57:22, endln:57:30 + |vpiParent: + \_function: (work@semaphore::new), line:57:5, endln:58:16 + |vpiDirection:1 + |vpiName:keyCount + |vpiExpr: + \_constant: , line:57:33, endln:57:34 + |vpiTypedef: + \_ref_typespec: (work@semaphore::new::keyCount) + |vpiParent: + \_io_decl: (keyCount), line:57:22, endln:57:30 + |vpiFullName:work@semaphore::new::keyCount + |vpiActual: + \_int_typespec: , line:57:18, endln:57:21 +\_class_typespec: + |vpiClassDefn: + \_class_defn: (work@semaphore), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:55:3, endln:69:11 +\_int_typespec: , line:57:18, endln:57:21 + |vpiSigned:1 +\_int_typespec: , line:60:14, endln:60:17 + |vpiSigned:1 +\_int_typespec: , line:63:14, endln:63:17 + |vpiSigned:1 +\_function: (work@semaphore::try_get), line:66:5, endln:67:16 + |vpiParent: + \_class_defn: (work@semaphore), file:${SURELOG_DIR}/tests/LargeHexString/builtin.sv, line:55:3, endln:69:11 + |vpiName:try_get + |vpiFullName:work@semaphore::try_get + |vpiMethod:1 + |vpiVisibility:1 + |vpiReturn: + \_int_var: (work@semaphore::try_get), line:66:14, endln:66:17 + |vpiIODecl: + \_io_decl: (keyCount), line:66:30, endln:66:38 + |vpiParent: + \_function: (work@semaphore::try_get), line:66:5, endln:67:16 + |vpiDirection:1 + |vpiName:keyCount + |vpiExpr: + \_constant: , line:66:41, endln:66:42 + |vpiTypedef: + \_ref_typespec: (work@semaphore::try_get::keyCount) + |vpiParent: + \_io_decl: (keyCount), line:66:30, endln:66:38 + |vpiFullName:work@semaphore::try_get::keyCount + |vpiActual: + \_int_typespec: , line:66:26, endln:66:29 +\_int_typespec: , line:66:14, endln:66:17 + |vpiSigned:1 +\_int_typespec: , line:66:26, endln:66:29 + |vpiSigned:1 +\_int_typespec: , line:2:4, endln:2:8671 + |vpiParent: + \_ref_typespec: (work@top.u1.INIT_i) + |vpiRange: + \_range: + |vpiParent: + \_int_typespec: , line:2:4, endln:2:8671 + |vpiLeftRange: + \_constant: + |vpiParent: + \_range: + |INT:36863 + |vpiRightRange: + \_constant: + |vpiParent: + \_range: + |INT:0 +=================== +[ FATAL] : 0 +[ SYNTAX] : 0 +[ ERROR] : 0 +[WARNING] : 2 +[ NOTE] : 5 diff --git a/tests/LargeHexString/LargeHexString.sl b/tests/LargeHexString/LargeHexString.sl new file mode 100644 index 0000000000..eaf1d2c595 --- /dev/null +++ b/tests/LargeHexString/LargeHexString.sl @@ -0,0 +1 @@ +-parse -d uhdm -d coveruhdm -elabuhdm -d ast dut.sv diff --git a/tests/LargeHexString/dut.sv b/tests/LargeHexString/dut.sv new file mode 100644 index 0000000000..2b28816f8c --- /dev/null +++ b/tests/LargeHexString/dut.sv @@ -0,0 +1,13 @@ +module bottom (); + parameter INIT_i = 36864'h0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000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+ + + +endmodule + +module top(); + + bottom #(.INIT_i(36864'h000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000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u1 (); + +endmodule + diff --git a/tests/LibraryIntercon/LibraryIntercon.log b/tests/LibraryIntercon/LibraryIntercon.log index c2e9368dd5..696ff2120a 100644 --- a/tests/LibraryIntercon/LibraryIntercon.log +++ b/tests/LibraryIntercon/LibraryIntercon.log @@ -6,31 +6,31 @@ LIB: work ${SURELOG_DIR}/tests/LibraryIntercon/lib.map LIB: realLib - ${SURELOG_DIR}/tests/LibraryIntercon/driver.svr ${SURELOG_DIR}/tests/LibraryIntercon/cmp.svr + ${SURELOG_DIR}/tests/LibraryIntercon/driver.svr LIB: logicLib ${SURELOG_DIR}/tests/LibraryIntercon/driver.sv - ${SURELOG_DIR}/tests/LibraryIntercon/top.sv ${SURELOG_DIR}/tests/LibraryIntercon/cmp.sv + ${SURELOG_DIR}/tests/LibraryIntercon/top.sv [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/nets.pkg". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/lib.map". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/driver.svr". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/cmp.svr". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/driver.svr". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/driver.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/top.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/cmp.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/top.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/nets.pkg". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/driver.svr". [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/cmp.svr". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/driver.svr". [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/driver.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/top.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/cmp.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/top.sv". [WRN:PA0205] ${SURELOG_DIR}/tests/LibraryIntercon/nets.pkg:1:1: No timescale set for "NetsPkg". -[WRN:PA0205] ${SURELOG_DIR}/tests/LibraryIntercon/top.sv:1:1: No timescale set for "top". [WRN:PA0205] ${SURELOG_DIR}/tests/LibraryIntercon/cmp.sv:2:1: No timescale set for "cmp". +[WRN:PA0205] ${SURELOG_DIR}/tests/LibraryIntercon/top.sv:1:1: No timescale set for "top". [INF:CP0300] Compilation... [INF:CP0301] ${SURELOG_DIR}/tests/LibraryIntercon/nets.pkg:1:1: Compile package "NetsPkg". [INF:CP0303] ${SURELOG_DIR}/tests/LibraryIntercon/cmp.sv:2:1: Compile module "logicLib@cmp". diff --git a/tests/NonSynthUnusedMod/NonSynthUnusedMod.log b/tests/NonSynthUnusedMod/NonSynthUnusedMod.log index bae8381171..39a27646fa 100644 --- a/tests/NonSynthUnusedMod/NonSynthUnusedMod.log +++ b/tests/NonSynthUnusedMod/NonSynthUnusedMod.log @@ -27,6 +27,22 @@ n<> u<21> t c<1> l<1:1> el<8:1> AST_DEBUG_END AST_DEBUG_BEGIN LIB: work +FILE: ${SURELOG_DIR}/tests/NonSynthUnusedMod/top.v +n<> u<0> t<_INVALID_> f<0> l<0:0> +n<> u<1> t p<11> s<10> l<1:1> el<1:0> +n u<2> t p<6> s<3> l<1:1> el<1:7> +n u<3> t p<6> s<5> l<1:8> el<1:11> +n<> u<4> t p<5> l<1:12> el<1:12> +n<> u<5> t p<6> c<4> l<1:11> el<1:13> +n<> u<6> t p<8> c<2> s<7> l<1:1> el<1:14> +n<> u<7> t p<8> l<3:1> el<3:10> +n<> u<8> t p<9> c<6> l<1:1> el<3:10> +n<> u<9> t p<10> c<8> l<1:1> el<3:10> +n<> u<10> t p<11> c<9> l<1:1> el<3:10> +n<> u<11> t c<1> l<1:1> el<4:1> +AST_DEBUG_END +AST_DEBUG_BEGIN +LIB: work FILE: ${SURELOG_DIR}/tests/NonSynthUnusedMod/nonsynth.v n<> u<0> t<_INVALID_> f<0> l<0:0> n<> u<1> t p<38> s<37> l<1:1> el<1:0> @@ -68,22 +84,6 @@ n<> u<36> t p<37> c<35> l<1:1> el<7:10> n<> u<37> t p<38> c<36> l<1:1> el<7:10> n<> u<38> t c<1> l<1:1> el<8:1> AST_DEBUG_END -AST_DEBUG_BEGIN -LIB: work -FILE: ${SURELOG_DIR}/tests/NonSynthUnusedMod/top.v -n<> u<0> t<_INVALID_> f<0> l<0:0> -n<> u<1> t p<11> s<10> l<1:1> el<1:0> -n u<2> t p<6> s<3> l<1:1> el<1:7> -n u<3> t p<6> s<5> l<1:8> el<1:11> -n<> u<4> t p<5> l<1:12> el<1:12> -n<> u<5> t p<6> c<4> l<1:11> el<1:13> -n<> u<6> t p<8> c<2> s<7> l<1:1> el<1:14> -n<> u<7> t p<8> l<3:1> el<3:10> -n<> u<8> t p<9> c<6> l<1:1> el<3:10> -n<> u<9> t p<10> c<8> l<1:1> el<3:10> -n<> u<10> t p<11> c<9> l<1:1> el<3:10> -n<> u<11> t c<1> l<1:1> el<4:1> -AST_DEBUG_END [INF:CP0300] Compilation... [INF:CP0303] ${SURELOG_DIR}/tests/NonSynthUnusedMod/dut.sv:1:1: Compile module "work@dut". [INF:CP0303] ${SURELOG_DIR}/tests/NonSynthUnusedMod/nonsynth.v:1:1: Compile module "work@nonsynth". diff --git a/tests/OldLibrary/OldLibrary.log b/tests/OldLibrary/OldLibrary.log index 92c43f21f3..90fc14dc5b 100644 --- a/tests/OldLibrary/OldLibrary.log +++ b/tests/OldLibrary/OldLibrary.log @@ -1,16 +1,16 @@ [INF:CM0023] Creating log file "${SURELOG_DIR}/build/regression/OldLibrary/slpp_all/surelog.log". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/OldLibrary/top.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL3.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL2.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL1.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL3.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/OldLibrary/top.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL3.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL2.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL1.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL3.v". [WRN:PA0205] ${SURELOG_DIR}/tests/OldLibrary/top.v:1:1: No timescale set for "top". -[WRN:PA0205] ${SURELOG_DIR}/tests/OldLibrary/lib/CELL3.v:1:1: No timescale set for "CELL3". [WRN:PA0205] ${SURELOG_DIR}/tests/OldLibrary/lib/CELL2.v:1:1: No timescale set for "CELL2". [WRN:PA0205] ${SURELOG_DIR}/tests/OldLibrary/lib/CELL1.v:1:1: No timescale set for "CELL1". +[WRN:PA0205] ${SURELOG_DIR}/tests/OldLibrary/lib/CELL3.v:1:1: No timescale set for "CELL3". [INF:CP0300] Compilation... [INF:CP0303] ${SURELOG_DIR}/tests/OldLibrary/lib/CELL1.v:1:1: Compile module "work@CELL1". [INF:CP0305] ${SURELOG_DIR}/tests/OldLibrary/lib/CELL2.v:1:1: Compile udp "work@CELL2". diff --git a/tests/PreprocLine/PreprocLine.log b/tests/PreprocLine/PreprocLine.log index 624e37baaa..17fa3ba69a 100644 --- a/tests/PreprocLine/PreprocLine.log +++ b/tests/PreprocLine/PreprocLine.log @@ -13,38 +13,38 @@ n u<3> t p<4> l<1:8> el<1:11> n<> u<4> t p<66> c<2> s<64> l<1:1> el<1:12> n<> u<5> t p<17> s<6> l<3:9> el<3:10> n u<6> t p<17> s<16> l<3:10> el<3:17> -n<"${SURELOG_DIR}/tests/PreprocLine/dut.sv"> u<7> t p<8> l<3:18> el<3:98> -n<> u<8> t p<9> c<7> l<3:18> el<3:98> -n<> u<9> t p<10> c<8> l<3:18> el<3:98> -n<> u<10> t p<16> c<9> s<15> l<3:18> el<3:98> -n<3> u<11> t p<12> l<3:100> el<3:101> -n<> u<12> t p<13> c<11> l<3:100> el<3:101> -n<> u<13> t p<14> c<12> l<3:100> el<3:101> -n<> u<14> t p<15> c<13> l<3:100> el<3:101> -n<> u<15> t p<16> c<14> l<3:100> el<3:101> -n<> u<16> t p<17> c<10> l<3:18> el<3:101> -n<> u<17> t p<18> c<5> l<3:9> el<3:102> -n<> u<18> t p<19> c<17> l<3:9> el<3:103> -n<> u<19> t p<20> c<18> l<3:9> el<3:103> -n<> u<20> t p<21> c<19> l<3:9> el<3:103> -n<> u<21> t p<57> c<20> s<38> l<3:9> el<3:103> +n<"${SURELOG_DIR}/tests/PreprocLine/dut.sv"> u<7> t p<8> l<3:18> el<3:64> +n<> u<8> t p<9> c<7> l<3:18> el<3:64> +n<> u<9> t p<10> c<8> l<3:18> el<3:64> +n<> u<10> t p<16> c<9> s<15> l<3:18> el<3:64> +n<3> u<11> t p<12> l<3:66> el<3:67> +n<> u<12> t p<13> c<11> l<3:66> el<3:67> +n<> u<13> t p<14> c<12> l<3:66> el<3:67> +n<> u<14> t p<15> c<13> l<3:66> el<3:67> +n<> u<15> t p<16> c<14> l<3:66> el<3:67> +n<> u<16> t p<17> c<10> l<3:18> el<3:67> +n<> u<17> t p<18> c<5> l<3:9> el<3:68> +n<> u<18> t p<19> c<17> l<3:9> el<3:69> +n<> u<19> t p<20> c<18> l<3:9> el<3:69> +n<> u<20> t p<21> c<19> l<3:9> el<3:69> +n<> u<21> t p<57> c<20> s<38> l<3:9> el<3:69> n<> u<22> t p<34> s<23> l<5:9> el<5:10> n u<23> t p<34> s<33> l<5:10> el<5:17> -n<"${SURELOG_DIR}/tests/PreprocLine/fake.v"> u<24> t p<25> l<5:18> el<5:98> -n<> u<25> t p<26> c<24> l<5:18> el<5:98> -n<> u<26> t p<27> c<25> l<5:18> el<5:98> -n<> u<27> t p<33> c<26> s<32> l<5:18> el<5:98> -n<102> u<28> t p<29> l<5:100> el<5:103> -n<> u<29> t p<30> c<28> l<5:100> el<5:103> -n<> u<30> t p<31> c<29> l<5:100> el<5:103> -n<> u<31> t p<32> c<30> l<5:100> el<5:103> -n<> u<32> t p<33> c<31> l<5:100> el<5:103> -n<> u<33> t p<34> c<27> l<5:18> el<5:103> -n<> u<34> t p<35> c<22> l<5:9> el<5:104> -n<> u<35> t p<36> c<34> l<5:9> el<5:105> -n<> u<36> t p<37> c<35> l<5:9> el<5:105> -n<> u<37> t p<38> c<36> l<5:9> el<5:105> -n<> u<38> t p<57> c<37> s<55> l<5:9> el<5:105> +n<"${SURELOG_DIR}/tests/PreprocLine/fake.v"> u<24> t p<25> l<5:18> el<5:64> +n<> u<25> t p<26> c<24> l<5:18> el<5:64> +n<> u<26> t p<27> c<25> l<5:18> el<5:64> +n<> u<27> t p<33> c<26> s<32> l<5:18> el<5:64> +n<102> u<28> t p<29> l<5:66> el<5:69> +n<> u<29> t p<30> c<28> l<5:66> el<5:69> +n<> u<30> t p<31> c<29> l<5:66> el<5:69> +n<> u<31> t p<32> c<30> l<5:66> el<5:69> +n<> u<32> t p<33> c<31> l<5:66> el<5:69> +n<> u<33> t p<34> c<27> l<5:18> el<5:69> +n<> u<34> t p<35> c<22> l<5:9> el<5:70> +n<> u<35> t p<36> c<34> l<5:9> el<5:71> +n<> u<36> t p<37> c<35> l<5:9> el<5:71> +n<> u<37> t p<38> c<36> l<5:9> el<5:71> +n<> u<38> t p<57> c<37> s<55> l<5:9> el<5:71> n<> u<39> t p<51> s<40> f<0> l<10:9> el<10:10> n u<40> t p<51> s<50> f<0> l<10:10> el<10:17> n<""> u<41> t p<42> f<0> l<10:18> el<10:20> diff --git a/tests/TestSepComp/TestSepComp.log b/tests/TestSepComp/TestSepComp.log index 93b1ed8a26..54b465dde7 100644 --- a/tests/TestSepComp/TestSepComp.log +++ b/tests/TestSepComp/TestSepComp.log @@ -20,12 +20,12 @@ [WARNING] : 1 [ NOTE] : 0 [INF:CM0023] Creating log file "${SURELOG_DIR}/tests/TestSepComp/slpp_all/surelog.log". -PARSER CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepComp/top.sv PARSER CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepComp/pkg1.sv PARSER CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepComp/pkg2.sv -[WRN:PA0205] ${SURELOG_DIR}/tests/TestSepComp/top.sv:1:1: No timescale set for "top". +PARSER CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepComp/top.sv [WRN:PA0205] ${SURELOG_DIR}/tests/TestSepComp/pkg1.sv:1:1: No timescale set for "pkg1". [WRN:PA0205] ${SURELOG_DIR}/tests/TestSepComp/pkg2.sv:1:1: No timescale set for "pkg2". +[WRN:PA0205] ${SURELOG_DIR}/tests/TestSepComp/top.sv:1:1: No timescale set for "top". [INF:CP0300] Compilation... [INF:CP0301] ${SURELOG_DIR}/tests/TestSepComp/pkg1.sv:1:1: Compile package "pkg1". [INF:CP0301] ${SURELOG_DIR}/tests/TestSepComp/pkg2.sv:1:1: Compile package "pkg2". diff --git a/tests/TestSepComp/badpath/TestSepCompBadPath.log b/tests/TestSepComp/badpath/TestSepCompBadPath.log index 92298ff628..5b90118b0a 100644 --- a/tests/TestSepComp/badpath/TestSepCompBadPath.log +++ b/tests/TestSepComp/badpath/TestSepCompBadPath.log @@ -22,19 +22,19 @@ [WARNING] : 3 [ NOTE] : 0 [INF:CM0023] Creating log file "${SURELOG_DIR}/tests/TestSepComp/badpath/slpp_all/surelog.log". -PARSER CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepComp/badpath/badtop.sv -PARSER CACHE USED FOR: ${SURELOG_DIR}/tests/EvalFunc/dut.sv PARSER CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepComp/pkg1.sv PARSER CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepComp/pkg2.sv +PARSER CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepComp/badpath/badtop.sv +PARSER CACHE USED FOR: ${SURELOG_DIR}/tests/EvalFunc/dut.sv +[WRN:PA0205] ${SURELOG_DIR}/tests/TestSepComp/pkg1.sv:1:1: No timescale set for "pkg1". +[WRN:PA0205] ${SURELOG_DIR}/tests/TestSepComp/pkg2.sv:1:1: No timescale set for "pkg2". [WRN:PA0205] ${SURELOG_DIR}/tests/TestSepComp/badpath/badtop.sv:1:1: No timescale set for "badtop". [WRN:PA0205] ${SURELOG_DIR}/tests/EvalFunc/dut.sv:1:1: No timescale set for "prim_util_pkg". [WRN:PA0205] ${SURELOG_DIR}/tests/EvalFunc/dut.sv:22:1: No timescale set for "top". -[WRN:PA0205] ${SURELOG_DIR}/tests/TestSepComp/pkg1.sv:1:1: No timescale set for "pkg1". -[WRN:PA0205] ${SURELOG_DIR}/tests/TestSepComp/pkg2.sv:1:1: No timescale set for "pkg2". [INF:CP0300] Compilation... -[INF:CP0301] ${SURELOG_DIR}/tests/EvalFunc/dut.sv:1:1: Compile package "prim_util_pkg". [INF:CP0301] ${SURELOG_DIR}/tests/TestSepComp/pkg1.sv:1:1: Compile package "pkg1". [INF:CP0301] ${SURELOG_DIR}/tests/TestSepComp/pkg2.sv:1:1: Compile package "pkg2". +[INF:CP0301] ${SURELOG_DIR}/tests/EvalFunc/dut.sv:1:1: Compile package "prim_util_pkg". [INF:CP0303] ${SURELOG_DIR}/tests/TestSepComp/badpath/badtop.sv:1:1: Compile module "work@badtop". [INF:CP0303] ${SURELOG_DIR}/tests/EvalFunc/dut.sv:22:1: Compile module "work@top". [INF:CP0302] Compile class "work@mailbox". diff --git a/tests/UnitLibrary/UnitLibrary.log b/tests/UnitLibrary/UnitLibrary.log index 1c59387ab3..3bdfec5573 100644 --- a/tests/UnitLibrary/UnitLibrary.log +++ b/tests/UnitLibrary/UnitLibrary.log @@ -22,8 +22,8 @@ LIB: lib1 ${SURELOG_DIR}/tests/UnitLibrary/lib1/bot.sv LIB: lib2 - ${SURELOG_DIR}/tests/UnitLibrary/lib2/bot.sv ${SURELOG_DIR}/tests/UnitLibrary/lib2/sub.v + ${SURELOG_DIR}/tests/UnitLibrary/lib2/bot.sv LIB: lib3 ${SURELOG_DIR}/tests/UnitLibrary/lib3/sub.v @@ -49,8 +49,8 @@ LIB: libw [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/UnitLibrary/rtl/adder.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/UnitLibrary/gate/adder.vg". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/UnitLibrary/lib1/bot.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/UnitLibrary/lib2/bot.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/UnitLibrary/lib2/sub.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/UnitLibrary/lib2/bot.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/UnitLibrary/lib3/sub.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/UnitLibrary/libwconfig/libw1/wsub.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/UnitLibrary/libwconfig/libw2/wsub.v". @@ -61,8 +61,8 @@ LIB: libw [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/UnitLibrary/rtl/adder.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/UnitLibrary/gate/adder.vg". [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/UnitLibrary/lib1/bot.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/UnitLibrary/lib2/bot.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/UnitLibrary/lib2/sub.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/UnitLibrary/lib2/bot.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/UnitLibrary/lib3/sub.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/UnitLibrary/libwconfig/libw1/wsub.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/UnitLibrary/libwconfig/libw2/wsub.v". diff --git a/third_party/tests/AzadiRTL/AzadiRTL.log b/third_party/tests/AzadiRTL/AzadiRTL.log index 6cb2ff3e0f..23700df356 100644 --- a/third_party/tests/AzadiRTL/AzadiRTL.log +++ b/third_party/tests/AzadiRTL/AzadiRTL.log @@ -13904,7 +13904,7 @@ case_stmt 316 class_defn 8 class_typespec 4 class_var 3 -constant 275928 +constant 275929 cont_assign 15432 delay_control 8 design 1 diff --git a/third_party/tests/CoresSweRVMP/CoresSweRVMP.log b/third_party/tests/CoresSweRVMP/CoresSweRVMP.log index 7217c97633..6f0faecb48 100644 --- a/third_party/tests/CoresSweRVMP/CoresSweRVMP.log +++ b/third_party/tests/CoresSweRVMP/CoresSweRVMP.log @@ -1,16 +1,8 @@ [INF:CM0023] Creating log file "${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/surelog.log". [WRN:CM0010] Command line argument "-Wno-UNOPTFLAT" ignored. -Running: cd ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_parser; cmake -G "Unix Makefiles" .; make -j 12 -CMake Deprecation Warning at CMakeLists.txt:1 (cmake_minimum_required): - Compatibility with CMake < 3.5 will be removed from a future version of - CMake. - - Update the VERSION argument value or use a ... suffix to tell - CMake that the project does not need compatibility with older versions. - - --- Configuring done (0.0s) --- Generating done (0.0s) +Running: cd ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_parser; cmake -G "Unix Makefiles" .; make -j 16 +-- Configuring done +-- Generating done -- Build files have been written to: ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_parser [100%] Generating preprocessing [100%] Built target Parse @@ -68,30 +60,26 @@ PP CACHE USED FOR: ${SURELOG_DIR}/third_party/UVM/1800.2-2017-1.0/src/uvm_pkg.sv [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/CoresSweRVMP/design/lib/mem_lib.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/CoresSweRVMP/design/lib/ahb_to_axi4.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/CoresSweRVMP/design/lib/axi4_to_ahb.sv". -Running: cd ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_preprocess; cmake -G "Unix Makefiles" .; make -j 12 -CMake Deprecation Warning at CMakeLists.txt:1 (cmake_minimum_required): - Compatibility with CMake < 3.5 will be removed from a future version of - CMake. - - Update the VERSION argument value or use a ... suffix to tell - CMake that the project does not need compatibility with older versions. - - --- Configuring done (0.0s) --- Generating done (0.0s) +Running: cd ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_preprocess; cmake -G "Unix Makefiles" .; make -j 16 +-- Configuring done +-- Generating done -- Build files have been written to: ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_preprocess -[ 16%] Generating 10_dec_tlu_ctl.sv -[ 16%] Generating 11_axi4_to_ahb.sv -[ 25%] Generating 2_dec_decode_ctl.sv -[ 33%] Generating 12_tb_top.sv -[ 41%] Generating 1_ifu_mem_ctl.sv -[ 50%] Generating 3_mem_lib.sv -[ 58%] Generating 4_lsu_bus_buffer.sv -[ 66%] Generating 5_beh_lib.sv -[ 75%] Generating 6_dbg.sv -[ 83%] Generating 9_exu.sv -[ 91%] Generating 7_lsu_bus_intf.sv -[100%] Generating 8_ahb_to_axi4.sv +[ 6%] Generating 10_lsu_bus_intf.sv +[ 12%] Generating 11_ifu_bp_ctl.sv +[ 18%] Generating 13_ifu_mem_ctl.sv +[ 25%] Generating 12_beh_lib.sv +[ 31%] Generating 14_mem_lib.sv +[ 37%] Generating 15_exu.sv +[ 43%] Generating 16_dec_decode_ctl.sv +[ 50%] Generating 1_lsu_stbuf.sv +[ 56%] Generating 2_ahb_to_axi4.sv +[ 62%] Generating 3_rvjtag_tap.sv +[ 68%] Generating 4_dec_tlu_ctl.sv +[ 75%] Generating 5_lsu_bus_buffer.sv +[ 81%] Generating 6_dbg.sv +[ 87%] Generating 7_axi4_to_ahb.sv +[ 93%] Generating 8_ifu_aln_ctl.sv +[100%] Generating 9_tb_top.sv [100%] Built target Parse Surelog parsing status: 0 [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/UVM/1800.2-2017-1.0/src/uvm_pkg.sv". diff --git a/third_party/tests/Earlgrey_0_1/sim-icarus/Earlgrey_0_1.log b/third_party/tests/Earlgrey_0_1/sim-icarus/Earlgrey_0_1.log index c8c9895386..cf7e82c869 100644 --- a/third_party/tests/Earlgrey_0_1/sim-icarus/Earlgrey_0_1.log +++ b/third_party/tests/Earlgrey_0_1/sim-icarus/Earlgrey_0_1.log @@ -6244,7 +6244,7 @@ case_stmt 614 class_defn 8 class_typespec 4 class_var 3 -constant 348743 +constant 348744 cont_assign 47364 design 1 enum_const 2553 diff --git a/third_party/tests/Earlgrey_Verilator_01_05_21/sim-icarus/Earlgrey_Verilator_01_05_21.log b/third_party/tests/Earlgrey_Verilator_01_05_21/sim-icarus/Earlgrey_Verilator_01_05_21.log index 6041673619..4057564df7 100644 --- a/third_party/tests/Earlgrey_Verilator_01_05_21/sim-icarus/Earlgrey_Verilator_01_05_21.log +++ b/third_party/tests/Earlgrey_Verilator_01_05_21/sim-icarus/Earlgrey_Verilator_01_05_21.log @@ -14427,7 +14427,7 @@ chandle_var 14 class_defn 8 class_typespec 4 class_var 3 -constant 936086 +constant 936087 cont_assign 147474 design 1 enum_const 31258 @@ -14499,7 +14499,7 @@ var_select 16611 [ NOTE] : 111 ============================== Begin Linting Results ============================== -[LINT]: ${SURELOG_DIR}/third_party/tests/Earlgrey_Verilator_01_05_21/src/lowrisc_dv_dv_macros_0/dv_macros.svh:476:282: Non synthesizable construct, name +[LINT]: ${SURELOG_DIR}/third_party/tests/Earlgrey_Verilator_01_05_21/src/lowrisc_dv_dv_macros_0/dv_macros.svh:476:248: Non synthesizable construct, name [LINT]: ${SURELOG_DIR}/third_party/tests/Earlgrey_Verilator_01_05_21/src/lowrisc_dv_dpi_dmidpi_0.1/dmidpi.sv:25:12: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Earlgrey_Verilator_01_05_21/src/lowrisc_dv_dpi_dmidpi_0.1/dmidpi.sv:25:12: Non synthesizable construct, [LINT]: ${SURELOG_DIR}/third_party/tests/Earlgrey_Verilator_01_05_21/src/lowrisc_dv_dpi_dmidpi_0.1/dmidpi.sv:28:35: Non synthesizable construct, diff --git a/third_party/tests/Earlgrey_Verilator_0_1/sim-verilator/Earlgrey_Verilator_0_1.log b/third_party/tests/Earlgrey_Verilator_0_1/sim-verilator/Earlgrey_Verilator_0_1.log index a8ebeb92f7..5fe26ff5bf 100644 --- a/third_party/tests/Earlgrey_Verilator_0_1/sim-verilator/Earlgrey_Verilator_0_1.log +++ b/third_party/tests/Earlgrey_Verilator_0_1/sim-verilator/Earlgrey_Verilator_0_1.log @@ -5905,7 +5905,7 @@ chandle_var 11 class_defn 8 class_typespec 4 class_var 3 -constant 325987 +constant 325988 cont_assign 43470 design 1 enum_const 2451 diff --git a/third_party/tests/NyuziProcessor/NyuziProcessor.log b/third_party/tests/NyuziProcessor/NyuziProcessor.log index a4072e0d93..a45c208b05 100644 --- a/third_party/tests/NyuziProcessor/NyuziProcessor.log +++ b/third_party/tests/NyuziProcessor/NyuziProcessor.log @@ -9,66 +9,66 @@ [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/trace_logger.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/sim_ps2.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/sim_sdram.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage2.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage5.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/int_execute_stage.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/scoreboard.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/nyuzi.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_arb_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_store_queue.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/reciprocal_rom.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_axi_bus_interface.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/synchronizer.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/operand_fetch_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cache_lru.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_1r1w.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/performance_counters.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_store_queue.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/nyuzi.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/control_registers.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage5.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/jtag_tap_controller.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_pending_miss_cam.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/oh_to_idx.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_tag_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage4.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_update_stage.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_l2_interface.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_pending_miss_cam.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/writeback_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/on_chip_debugger.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage3.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_data_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sync_fifo.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_2r1w.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/idx_to_oh.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/jtag_tap_controller.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_tag_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage1.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/reciprocal_rom.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/tlb.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage2.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/core.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/thread_select_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_data_stage.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cam.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/control_registers.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_tag_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_interconnect.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_read_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_data_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/thread_select_stage.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/rr_arbiter.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/core.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/synchronizer.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage1.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage4.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_tag_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage3.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_2r1w.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_arb_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/operand_fetch_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_load_miss_queue.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_1r1w.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_tag_stage.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/instruction_decode_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_data_stage.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_request_queue.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/tlb.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_load_miss_queue.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/timer.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/performance_counters.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/on_chip_debugger.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/writeback_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_update_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_interconnect.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sync_fifo.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/idx_to_oh.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cache_lru.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/int_execute_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/async_fifo.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/gpio_controller.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_sram.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_receive.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/spi_controller.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/logic_analyzer.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_async_bridge.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_sequencer.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_controller.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_receive.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_interconnect.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_rom.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_async_bridge.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/async_fifo.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/ps2_controller.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/spi_controller.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/timer.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/ps2_controller.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_transmit.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_interconnect.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/logic_analyzer.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/gpio_controller.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/sdram_controller.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_controller.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/axi_protocol_checker.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/sim_jtag.sv". @@ -76,66 +76,66 @@ [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/trace_logger.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/sim_ps2.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/sim_sdram.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage2.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage5.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/int_execute_stage.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/scoreboard.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/nyuzi.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_arb_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_store_queue.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/reciprocal_rom.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_axi_bus_interface.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/synchronizer.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/operand_fetch_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cache_lru.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_1r1w.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/performance_counters.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_store_queue.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/nyuzi.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/control_registers.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage5.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/jtag_tap_controller.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_pending_miss_cam.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/oh_to_idx.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_tag_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage4.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_update_stage.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_l2_interface.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_pending_miss_cam.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/writeback_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/on_chip_debugger.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage3.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_data_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sync_fifo.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_2r1w.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/idx_to_oh.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/jtag_tap_controller.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_tag_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage1.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/reciprocal_rom.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/tlb.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage2.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/core.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/thread_select_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_data_stage.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cam.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/control_registers.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_tag_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_interconnect.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_read_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_data_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/thread_select_stage.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/rr_arbiter.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/core.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/synchronizer.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage1.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage4.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_tag_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage3.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_2r1w.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_arb_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/operand_fetch_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_load_miss_queue.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_1r1w.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_tag_stage.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/instruction_decode_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_data_stage.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_request_queue.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/tlb.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_load_miss_queue.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/timer.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/performance_counters.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/on_chip_debugger.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/writeback_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_update_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_interconnect.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sync_fifo.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/idx_to_oh.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cache_lru.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/int_execute_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/async_fifo.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/gpio_controller.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_sram.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_receive.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/spi_controller.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/logic_analyzer.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_async_bridge.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_sequencer.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_controller.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_receive.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_interconnect.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_rom.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_async_bridge.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/async_fifo.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/ps2_controller.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/spi_controller.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/timer.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/ps2_controller.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_transmit.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_interconnect.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/logic_analyzer.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/gpio_controller.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/sdram_controller.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_controller.sv". [INF:CM0029] Using global timescale: "10ps/10ps". [INF:CP0300] Compilation... [INF:CP0301] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/defines.svh:22:1: Compile package "defines". @@ -264,98 +264,98 @@ ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/axi_protocol_checker.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/trace_logger.sv:22:1: previous definition. -[WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage2.sv:22:1: previous definition. -[WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage5.sv:22:1: previous definition. -[WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/int_execute_stage.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/scoreboard.sv:22:1: previous definition. -[WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/nyuzi.sv:22:1: previous definition. -[WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_arb_stage.sv:22:1: previous definition. -[WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_store_queue.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_axi_bus_interface.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/operand_fetch_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_store_queue.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cache_lru.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/nyuzi.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_1r1w.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/control_registers.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_tag_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage5.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage4.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/jtag_tap_controller.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_update_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_pending_miss_cam.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_l2_interface.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_pending_miss_cam.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_tag_stage.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/writeback_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/tlb.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/on_chip_debugger.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage2.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage3.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/core.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_data_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/thread_select_stage.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sync_fifo.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_data_stage.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/jtag_tap_controller.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cam.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_tag_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_read_stage.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage1.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache.sv:22:1: previous definition. -[WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cam.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage4.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/control_registers.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_tag_stage.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_interconnect.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage3.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_read_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_arb_stage.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_data_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/operand_fetch_stage.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/thread_select_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_load_miss_queue.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/core.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_1r1w.sv:22:1: previous definition. +[WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_tag_stage.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/instruction_decode_stage.sv:22:1: previous definition. +[WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_data_stage.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_request_queue.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/tlb.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/on_chip_debugger.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_load_miss_queue.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/writeback_stage.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_sram.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_update_stage.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_rom.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_interconnect.sv:22:1: previous definition. +[WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sync_fifo.sv:22:1: previous definition. +[WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cache_lru.sv:22:1: previous definition. +[WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/int_execute_stage.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/async_fifo.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/ps2_controller.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/gpio_controller.sv:22:1: previous definition. +[WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_sram.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/spi_controller.sv:22:1: previous definition. +[WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_controller.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_interconnect.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/gpio_controller.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_rom.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/sdram_controller.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/ps2_controller.sv:22:1: previous definition. [WRN:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_controller.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/sdram_controller.sv:22:1: previous definition. [NTE:CP0309] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/async_fifo.sv:37:29: Implicit port type (wire) for "read_data". [NTE:CP0309] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_tag_stage.sv:77:49: Implicit port type (wire) for "dt_update_itlb_asid". [NTE:CP0309] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/gpio_controller.sv:35:31: Implicit port type (wire) for "gpio_value". diff --git a/third_party/tests/Opentitan/Earlgrey.log b/third_party/tests/Opentitan/Earlgrey.log index af0ebb9d55..7a751ab1b1 100644 --- a/third_party/tests/Opentitan/Earlgrey.log +++ b/third_party/tests/Opentitan/Earlgrey.log @@ -25248,7 +25248,7 @@ case_stmt 336 class_defn 8 class_typespec 4 class_var 3 -constant 217424 +constant 217425 cont_assign 30746 design 1 enum_const 2021 diff --git a/third_party/tests/Opentitan/Opentitan.log b/third_party/tests/Opentitan/Opentitan.log index af910a861b..6237eab598 100644 --- a/third_party/tests/Opentitan/Opentitan.log +++ b/third_party/tests/Opentitan/Opentitan.log @@ -4307,7 +4307,7 @@ chandle_var 2 class_defn 613 class_typespec 8828 class_var 22226 -constant 252354 +constant 252355 constraint 10 cont_assign 30814 continue_stmt 173 diff --git a/third_party/tests/oh/BasicOh.log b/third_party/tests/oh/BasicOh.log index 869b7c9847..3e84f37b7a 100644 --- a/third_party/tests/oh/BasicOh.log +++ b/third_party/tests/oh/BasicOh.log @@ -1,282 +1,282 @@ [INF:CM0023] Creating log file "${SURELOG_DIR}/build/regression/BasicOh/slpp_all/surelog.log". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_async.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rise2pulse.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buffer.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2onehot.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa21.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_iddr.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrqn.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_sync.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa42.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao221.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux7.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mult.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa32.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux6.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao311.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai33.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_add.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_sp.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi211.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa33.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latq.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pulse2pulse.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bitreverse.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffqn.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao33.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrq.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_parity.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oddr.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_datagate.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa31.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao22.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor4.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux12.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrqn.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi31.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_debouncer.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edge2pulse.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_arbiter.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobuflo.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rsync.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobufhi.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_tristate.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao222.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or2.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai21.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_stretcher.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi21.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao21.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai32.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat1.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa32.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latnq.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor4.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockgate.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg1.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_tristate.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao31.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_header.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa22.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buf.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa92.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao211.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai222.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pulse2pulse.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux9.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi211.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa211.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux7.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor2.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffq.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi22.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_datagate.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_debouncer.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai31.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobuflo.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bitreverse.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_standby.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2onehot.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockor.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_stretcher.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai311.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oddr.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrq.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat0.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux8.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_counter.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux5.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsq.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao222.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_abs.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa311.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dsync.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ser2par.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi32.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa42.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rsync.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao221.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa211.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_header.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_dp.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or3.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao32.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi222.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrq.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_cdc.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2gray.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_par2ser.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockdiv.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi21.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao211.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa222.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffnq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi221.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa21.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_shift.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_cdc.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg1.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai32.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_add.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_inv.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao33.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockdiv.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux6.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fall2pulse.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pwr_buf.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_arbiter.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa31.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai311.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsqn.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edge2pulse.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_standby.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrqn.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai221.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffqn.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi221.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buffer.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai22.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsqn.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi311.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux4.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi33.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_dp.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_iddr.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_delay.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_abs.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi222.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi3.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edgealign.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux5.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2gray.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao31.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rise2pulse.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat1.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dsync.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa221.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobufhi.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_sync.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ser2par.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat0.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa62.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrqn.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa33.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_sp.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buf.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi32.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_par2ser.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi31.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi22.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pll.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffq.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux9.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_delay.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latnq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux8.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai33.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_regfile.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa22.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao311.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pwr_buf.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_gray2bin.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_shift.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi311.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao21.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai31.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai221.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa311.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa32.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_counter.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_7seg_decode.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockor.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_regfile.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao22.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa62.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai222.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsqn.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa32.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_parity.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa92.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffqn.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsqn.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_async.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rise2pulse.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buffer.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2onehot.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa21.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_iddr.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrqn.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_sync.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa42.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao221.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux7.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mult.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa32.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux6.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao311.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai33.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_add.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_sp.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi211.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa33.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pulse2pulse.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bitreverse.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffqn.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao33.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_parity.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oddr.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_datagate.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa31.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao22.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor4.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux12.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrqn.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi31.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_debouncer.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edge2pulse.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_arbiter.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobuflo.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rsync.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobufhi.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_tristate.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao222.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or2.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai21.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_stretcher.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi21.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao21.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai32.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat1.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa32.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latnq.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor4.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockgate.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg1.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_tristate.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao31.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_header.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa22.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buf.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa92.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao211.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai222.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pulse2pulse.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux9.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi211.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa211.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux7.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor2.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi22.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_datagate.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_debouncer.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai31.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobuflo.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bitreverse.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_standby.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2onehot.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockor.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_stretcher.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai311.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oddr.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrq.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat0.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux8.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_counter.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux5.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao222.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_abs.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa311.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dsync.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ser2par.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi32.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa42.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rsync.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao221.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa211.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_header.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_dp.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or3.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao32.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi222.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_cdc.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2gray.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_par2ser.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockdiv.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi21.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao211.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa222.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffnq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi221.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa21.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_shift.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_cdc.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg1.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai32.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_add.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_inv.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao33.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockdiv.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux6.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fall2pulse.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pwr_buf.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_arbiter.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa31.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai311.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsqn.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edge2pulse.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_standby.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrqn.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai221.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffqn.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi221.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buffer.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai22.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsqn.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi311.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux4.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi33.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_dp.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_iddr.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_delay.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_abs.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi222.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi3.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edgealign.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux5.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2gray.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao31.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rise2pulse.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat1.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dsync.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa221.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobufhi.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_sync.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ser2par.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat0.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa62.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrqn.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa33.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_sp.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buf.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi32.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_par2ser.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi31.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi22.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pll.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux9.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_delay.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latnq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux8.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai33.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_regfile.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa22.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao311.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pwr_buf.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_gray2bin.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_shift.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi311.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao21.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai31.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai221.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa311.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa32.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_counter.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_7seg_decode.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockor.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_regfile.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao22.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa62.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai222.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsqn.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa32.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_parity.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa92.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffqn.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsqn.v". [INF:CM0029] Using global timescale: "1ns/1ns". [INF:CP0300] Compilation... [INF:CP0303] ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_7seg_decode.v:8:1: Compile module "work@oh_7seg_decode".