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Add support for GHC 9.2 and 9.4
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10 files changed

+340
-60
lines changed

10 files changed

+340
-60
lines changed

.github/workflows/ci.yml

+2
Original file line numberDiff line numberDiff line change
@@ -112,6 +112,8 @@ jobs:
112112
matrix:
113113
ghc:
114114
- "9.0.2"
115+
- "9.2.8"
116+
- "9.4.8"
115117

116118
container:
117119
image: ghcr.io/clash-lang/clash-ci:${{ matrix.ghc }}-20240221

cabal.project

+2-4
Original file line numberDiff line numberDiff line change
@@ -8,8 +8,6 @@ packages:
88

99
write-ghc-environment-files: always
1010

11-
with-compiler: ghc-9.0.2
12-
1311
tests: True
1412

1513

@@ -49,9 +47,9 @@ source-repository-package
4947
source-repository-package
5048
type: git
5149
location: https://github.com/clash-lang/clash-protocols.git
52-
tag: f7ea04834d396669fe4ef404b03541601a68b136
50+
tag: eb76cd1be746ae91beff60c0f16d8c1dd888662c
5351

5452
source-repository-package
5553
type: git
5654
location: https://github.com/cchalmers/circuit-notation.git
57-
tag: 618e37578e699df235f2e7150108b6401731919b
55+
tag: 19b386c4aa3ff690758ae089c7754303f3500cc9

clash-vexriscv-sim/clash-vexriscv-sim.cabal

+4-4
Original file line numberDiff line numberDiff line change
@@ -60,9 +60,9 @@ common common-options
6060
-fno-worker-wrapper
6161
-- clash-prelude will set suitable version bounds for the plugins
6262
build-depends:
63-
base >= 4.14 && < 4.16,
63+
base >= 4.14 && < 4.19,
6464
clash-prelude >= 1.6 && < 1.10,
65-
containers >= 0.6 && < 0.7,
65+
containers >= 0.6 && < 0.8,
6666
ghc-typelits-natnormalise,
6767
ghc-typelits-extra,
6868
ghc-typelits-knownnat,
@@ -79,11 +79,11 @@ library
7979
Utils.Storage
8080
build-depends:
8181
base,
82+
bytestring >= 0.10 && < 0.13,
8283
clash-prelude,
8384
clash-protocols,
8485
clash-vexriscv,
8586
elf >= 0.31 && < 0.32,
86-
bytestring >= 0.10 && < 0.11,
8787

8888
executable clash
8989
import: common-options
@@ -132,6 +132,6 @@ test-suite unittests
132132
containers,
133133
directory,
134134
temporary >=1.1 && <1.4,
135-
tasty >= 1.2 && < 1.5,
135+
tasty >= 1.2 && < 1.6,
136136
tasty-hunit >= 0.10 && < 0.11,
137137
filepath

clash-vexriscv-sim/src/Utils/Cpu.hs

+2-1
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,7 @@ import Clash.Prelude
1111

1212
import Protocols.Wishbone
1313
import VexRiscv
14+
import VexRiscv.VecToTuple (vecToTuple)
1415

1516
import GHC.Stack (HasCallStack)
1617

@@ -61,7 +62,7 @@ cpu bootIMem bootDMem = (output, writes, iS2M, dS2M)
6162
dummyS2M = dummy dummyM2S
6263
bootDS2M = bootDMem bootDM2S
6364

64-
(dS2M, unbundle -> (dummyM2S :> bootDM2S :> Nil)) = interconnectTwo
65+
(dS2M, vecToTuple . unbundle -> (dummyM2S, bootDM2S)) = interconnectTwo
6566
(unBusAddr <$> dM2S)
6667
((0x0000_0000, dummyS2M) :> (0x4000_0000, bootDS2M) :> Nil)
6768

clash-vexriscv-sim/src/Utils/ProgramLoad.hs

+9-8
Original file line numberDiff line numberDiff line change
@@ -33,8 +33,8 @@ loadProgram path = do
3333

3434
let
3535
endianSwap dat =
36-
L.concatMap (\[a, b, c, d] -> [d, c, b, a]) $
37-
chunkFill 4 0 dat
36+
L.concatMap (\(a, b, c, d) -> [d, c, b, a]) $
37+
chunkFill4 0 dat
3838

3939
-- endian swap instructions
4040
iMemContents = endianSwap $
@@ -51,9 +51,10 @@ loadProgram path = do
5151
content :: BinaryData -> [BitVector 8]
5252
content bin = L.map snd $ I.toAscList bin
5353

54-
chunkFill :: Int -> a -> [a] -> [[a]]
55-
chunkFill _ _ [] = []
56-
chunkFill n fill xs =
57-
let (first0, rest) = L.splitAt n xs
58-
first1 = first0 <> L.replicate (n - L.length first0) fill
59-
in first1 : chunkFill n fill rest
54+
chunkFill4 :: a -> [a] -> [(a, a, a, a)]
55+
chunkFill4 fill = \case
56+
[] -> []
57+
[a] -> [(a, fill, fill, fill)]
58+
[a, b] -> [(a, b, fill, fill)]
59+
[a, b, c] -> [(a, b, c, fill)]
60+
(a:b:c:d:rest) -> (a, b, c, d) : chunkFill4 fill rest

clash-vexriscv/clash-vexriscv.cabal

+12-9
Original file line numberDiff line numberDiff line change
@@ -87,9 +87,9 @@ common common-options
8787
-fno-worker-wrapper
8888
-- clash-prelude will set suitable version bounds for the plugins
8989
build-depends:
90-
base >= 4.14 && < 4.16,
90+
base >= 4.14 && < 4.18,
9191
clash-prelude >= 1.6 && < 1.10,
92-
containers >= 0.6 && < 0.7,
92+
containers >= 0.6 && < 0.8,
9393
ghc-typelits-natnormalise,
9494
ghc-typelits-extra,
9595
ghc-typelits-knownnat,
@@ -105,18 +105,21 @@ library
105105
VexRiscv.ClockTicks
106106
VexRiscv.FFI
107107
VexRiscv.TH
108+
VexRiscv.VecToTuple
109+
108110
build-depends:
109111
base,
112+
bytestring >= 0.10 && < 0.13,
110113
clash-prelude,
111114
clash-protocols,
112-
bytestring >= 0.10 && < 0.11,
113-
process >= 1.6 && < 1.8,
115+
containers,
114116
directory >= 1.3 && < 1.4,
115117
filepath,
116-
containers,
118+
Glob,
119+
process >= 1.6 && < 1.8,
117120
string-interpolate,
121+
tagged,
118122
template-haskell,
119-
Glob,
120123
extra-libraries: VexRiscvFFI, stdc++
121124
include-dirs: src/
122125

@@ -134,9 +137,9 @@ test-suite unittests
134137
base,
135138
clash-vexriscv,
136139
bytestring,
137-
hedgehog >= 1.0 && < 1.1,
138-
tasty >= 1.4 && < 1.5,
139-
tasty-hedgehog >= 1.2 && < 1.3,
140+
hedgehog >= 1.0 && < 1.5,
141+
tasty >= 1.4 && < 1.6,
142+
tasty-hedgehog >= 1.2 && < 1.5,
140143
tasty-hunit,
141144
tasty-th,
142145
template-haskell,

clash-vexriscv/src/VexRiscv.hs

+30-31
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,7 @@ import Language.Haskell.TH.Syntax
2525
import Protocols.Wishbone
2626
import VexRiscv.FFI
2727
import VexRiscv.TH
28+
import VexRiscv.VecToTuple
2829

2930

3031
data Input = Input
@@ -282,39 +283,37 @@ vexRiscv# !_sourcePath !_clk rst0
282283
let
283284
primName = 'vexRiscv#
284285
( _
285-
:> srcPath
286-
:> clk
287-
:> rst
288-
:> timerInterrupt
289-
:> externalInterrupt
290-
:> softwareInterrupt
291-
:> iBus_ACK
292-
:> iBus_ERR
293-
:> iBus_DAT_MISO
294-
:> dBus_ACK
295-
:> dBus_ERR
296-
:> dBus_DAT_MISO
297-
:> Nil
298-
) = indicesI @13
286+
, srcPath
287+
, clk
288+
, rst
289+
, timerInterrupt
290+
, externalInterrupt
291+
, softwareInterrupt
292+
, iBus_ACK
293+
, iBus_ERR
294+
, iBus_DAT_MISO
295+
, dBus_ACK
296+
, dBus_ERR
297+
, dBus_DAT_MISO
298+
) = vecToTuple (indicesI @13)
299299

300300
( iBus_CYC
301-
:> iBus_STB
302-
:> iBus_WE
303-
:> iBus_ADR
304-
:> iBus_DAT_MOSI
305-
:> iBus_SEL
306-
:> iBus_CTI
307-
:> iBus_BTE
308-
:> dBus_CYC
309-
:> dBus_STB
310-
:> dBus_WE
311-
:> dBus_ADR
312-
:> dBus_DAT_MOSI
313-
:> dBus_SEL
314-
:> dBus_CTI
315-
:> dBus_BTE
316-
:> Nil
317-
) = (\x -> extend @_ @16 @13 x + 1) <$> indicesI @16
301+
, iBus_STB
302+
, iBus_WE
303+
, iBus_ADR
304+
, iBus_DAT_MOSI
305+
, iBus_SEL
306+
, iBus_CTI
307+
, iBus_BTE
308+
, dBus_CYC
309+
, dBus_STB
310+
, dBus_WE
311+
, dBus_ADR
312+
, dBus_DAT_MOSI
313+
, dBus_SEL
314+
, dBus_CTI
315+
, dBus_BTE
316+
) = vecToTuple $ (\x -> extend @_ @16 @13 x + 1) <$> indicesI @16
318317

319318
cpu = extend @_ @_ @1 dBus_BTE + 1
320319
in

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