-
.align <n>
If necessary, add bytes to the current section until the least-significant
<n> bits of the section's location counter are 0. This is equivalent to
.balign <2**n>.
-
.ascii "<string>"...
.asciz "<string>"...
expects 0 or more string literals separated by commas, where each
string literal is enclosed in double quotes ("). Each ASCII character
of the string is assembled into consecutive locations in the current
section. .asciz adds an additional zero byte after the last
character.
-
.balign <n>
<n> must be a power of two. If necessary, add bytes to the current
section until the section's location counter is an exact multiple of
<n>.
-
.bss
Subsequent assembly output will be placed in the bss (block static
storage) section of memory. See the "Built-in loader" section for
details about how the assembler organizes memory. Typically, the
bss section contains the uninitialized storage for the program.
-
.breakpoint
Set an execution breakpoint at the current line. Execution will
pause when it reaches the first instruction following this line.
-
.byte <expression>...
Expects zero or more expressions, separated by commas. The value of
each expression is assembled into the next 8-bit byte of the current section.
-
.cache <blocksize>, <nlines>, <nways>, <replacement>, <writes>
Expects five parameters that describe the architecture of a particular
set-associative cache. The performance of this cache will be reported
during the simulation. To compare different cache architectures, you
can have multiple .cache statements in a program. The cache model
records each memory access, determining if it's a hit (location found
in cache) or miss (location not found in cache). The model tracks the
address of each cached memory location in each subcache, along with
"valid" and "dirty" state bits for each cache line.
<blocksize> must be a power of two. It specifies the number of
32-bit words in each line of the cache.
<nlines> must be a power of two. It specifies the number of lines
in each "way" (subcache) of the set associative cache.
<nways> specifies the number of "ways" (subcaches) in the cache.
Each subcache operates in parallel with other subcaches as an
independent direct-mapped cache. The contents of a particular address
can be cached in any of the subcaches.
<replacement> must be one of lru (least-recently used), fifo
(first-in, first-out), random (randomly selected), or cycle (cycle
through the subcaches in order). Determines how the cache chooses
which subcache to hold the contents of an address not currently
cached.
<writes> must be one of writeback or writethrough.
-
.data
Subsequent assembly output will be placed in the data
section of memory. See the "Built-in loader" section for
details about how the assembler organizes memory. Typically,
the data section contains the initialized storage for the
program.
-
.endm
See the "Macros" section above.
-
.global <symbol>...
Expects zero or more symbol names, separated by commas. Documents
which symbols the author expects to be referenced by files outside
of the current file. In ASim, this directive has affect on the
assembly output.
-
.hword <expression>...
Expects zero or more expressions, separated by commas. The value of
each expression is assembled into the next 16-bit halfword (2 bytes)
of the current section. There is an implicit .align 1 before each
.hword directive.
-
.include "<buffer_name>"
Expects a single string, which is the name of another editor buffer.
Stop assembling from the current buffer and switch to assembling from
the named buffer. When the end of that buffer is reached, resume
assembling from the next line of the current buffer.
-
.long <expression>...
Expects zero or more expressions, separated by commas. The value of
each expression is assembled into the next 64-bit word (8 bytes)
of the current section. There is an implicit .align 3 before each
.long directive.
-
.macro
See the "Macros" section above.
-
.mverify <expression>, <expression>...
This directive causes ASim to verify the contents of specified memory
location after simulation is stopped when reaching a hlt instruction.
The directive has the form .mverify addr, expect0, expect1, ... where addr is
the (starting) address of one or more consecutive 32-bit memory words
whose contents should be verified. expect0 is the expected contents
of the first 32-bit word, expect1 is the expected contents of the
second 32-bit word, and so on. Your test code can include as many
.mverify directives as needed.
-
.p2align
If necessary, add bytes to the current section until the least-significant
<n> bits of the section's location counter are 0. This is equivalent to
.balign <2**n>. This directive is an alias for .align.
-
.quad <expression>...
Expects zero or more expressions, separated by commas. The value of
each expression is assembled into the next 64-bit word (8 bytes)
of the current section. There is an implicit .align 3 before each
.quad directive. This directive is an alias for .long.
-
.section <section> [, <address_space>]
<section> should be one of .text, .data, .bss. Subsequent
assembly output will be placed in the specified section of memory.
<address_space> is an optional second argument specifying the
name of an address space. If not specified, it defaults to the
current address space. At the start of assembly, the current
address space is "kernel". See the "Built-in loader" section for
details about how the assembler organizes memory.
-
.text
Subsequent assembly output will be placed in the text
section of memory. See the "Built-in loader" section for
details about how the assembler organizes memory. Typically,
the text section contains the assembled instructions for the
program.
-
.word <expression>...
Expects zero or more expressions, separated by commas. The value of
each expression is assembled into the next 32-bit word (4 bytes)
of the current section. There is an implicit .align 2 before each
.word directive.