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tanchengtancheng
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[feature] Include mapping for verification
1 parent a4fb27c commit 9e9277a

5 files changed

Lines changed: 107 additions & 180 deletions

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‎include/NeuraDialect/Mapping/HeuristicMapping/HeuristicMapping.h‎

Lines changed: 9 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -13,14 +13,20 @@ class HeuristicMapping : public MappingStrategy {
1313
public:
1414
HeuristicMapping(int max_location_to_try = 5, int max_backtrack_depth = 3)
1515
: max_location_to_try(max_location_to_try), max_backtrack_depth(3) {}
16+
1617
bool map(std::vector<Operation *> &sorted_ops,
1718
const Architecture &architecture,
1819
MappingState &mapping_state) override;
20+
1921
std::string getName() const override {
20-
if (max_backtrack_depth == 1 && max_location_to_try == INT_MAX) {
22+
if (max_location_to_try == 1 &&
23+
max_backtrack_depth == 1) {
24+
return "simple";
25+
} else if (max_location_to_try == INT_MAX &&
26+
max_backtrack_depth == 1) {
2127
return "greedy";
22-
} else if (max_backtrack_depth == INT_MAX &&
23-
max_location_to_try == INT_MAX) {
28+
} else if (max_location_to_try == INT_MAX &&
29+
max_backtrack_depth == INT_MAX) {
2430
return "exhaustive";
2531
} else {
2632
return "heuristic";

‎lib/NeuraDialect/Mapping/MappingState.cpp‎

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -244,6 +244,20 @@ void MappingState::encodeMappingState() {
244244
mlir::IntegerAttr::get(mlir::IntegerType::get(ctx, 32),
245245
loc.time_step))});
246246
mapping_entries.push_back(dict);
247+
} else if (loc.resource->getKind() == ResourceKind::Register) {
248+
kind_str = "register";
249+
auto dict = mlir::DictionaryAttr::get(
250+
ctx, {mlir::NamedAttribute(mlir::StringAttr::get(ctx, "resource"),
251+
mlir::StringAttr::get(ctx, kind_str)),
252+
mlir::NamedAttribute(
253+
mlir::StringAttr::get(ctx, "id"),
254+
mlir::IntegerAttr::get(mlir::IntegerType::get(ctx, 32),
255+
loc.resource->getId())),
256+
mlir::NamedAttribute(
257+
mlir::StringAttr::get(ctx, "time_step"),
258+
mlir::IntegerAttr::get(mlir::IntegerType::get(ctx, 32),
259+
loc.time_step))});
260+
mapping_entries.push_back(dict);
247261
} else {
248262
kind_str = "unknown";
249263
auto dict = mlir::DictionaryAttr::get(

‎lib/NeuraDialect/Mapping/mapping_util.cpp‎

Lines changed: 5 additions & 100 deletions
Original file line numberDiff line numberDiff line change
@@ -293,22 +293,13 @@ bool mlir::neura::tryRouteBackwardMove(Operation *mov_op, MappingLoc src_loc,
293293
Register *mlir::neura::getAvailableRegister(
294294
const MappingState &state, Tile *tile, int start_time, int exclusive_end_time) {
295295
for (Register *reg : tile->getRegisters()) {
296+
// FIXME: We may need constrain the register availability to the conflicting
297+
// input channel (either the input channel or a register file on the same input
298+
// direction could be active at one time).
296299
if (state.isAvailableAcrossTimeInRange(reg, start_time, exclusive_end_time)) {
297-
llvm::errs() << "[getAvailableRegister] Found available register: "
298-
<< reg->getId() << " in register_file: " << reg->getRegisterFile()->getId()
299-
<< " in register_file_cluster: "
300-
<< reg->getRegisterFile()->getRegisterFileCluster()->getId()
301-
<< " at tile: " << tile->getId()
302-
<< " from time step: " << start_time
303-
<< " to end time step: " << exclusive_end_time << "\n";
304300
return reg;
305301
}
306302
}
307-
// llvm::errs() << "[getAvailableRegister] No available register found in tile: "
308-
// << tile->getId() << " from time step: " << start_time
309-
// << " to end time step: " << exclusive_end_time << "\n";
310-
// llvm::errs() << "[cheng] tile->getRegisters() size: "
311-
// << tile->getRegisters().size() << "\n";
312303
return nullptr;
313304
}
314305

@@ -355,50 +346,9 @@ bool mlir::neura::tryRouteDataMove(Operation *mov_op, MappingLoc src_loc,
355346
return true;
356347
}
357348

358-
// // The last link can be held from arrival_time to dst_time - 1.
359-
// // TODO: We actually don't need to occupy the last link if the registers
360-
// // within the tile can be explicitly represented.
361-
// // https://github.com/coredac/dataflow/issues/52.
362349
assert(!current_path.empty() &&
363350
"Path should not be empty when checking last link");
364351

365-
// bool all_free = true;
366-
// MappingLoc last_link_loc = current_path.back();
367-
// // llvm::errs() << "[cheng] checking Last link loc: "
368-
// // << last_link_loc.resource->getType() << "#"
369-
// // << last_link_loc.resource->getId()
370-
// // << " @t=" << last_link_loc.time_step << "\n";
371-
// std::vector<MappingLoc> last_link_occupying;
372-
// for (int t = current_step; t < deadline_step; ++t) {
373-
// MappingLoc repeated{last_link_loc.resource, t};
374-
// last_link_occupying.push_back(repeated);
375-
// if (!state.isAvailableAcrossTime(repeated)) {
376-
// all_free = false;
377-
// // llvm::errs() << "[CHENG] target repeated: " << repeated.resource->getType() << "#"
378-
// // << repeated.resource->getId() << " @t=" << repeated.time_step << "\n";
379-
// // Operation *culprit_op = state.getOpAtLocAcrossTime(repeated).value();
380-
// // llvm::errs() << "[DEBUG] who is occupying the last link: "
381-
// // << *culprit_op << "\n";
382-
// // for (auto ll : state.getAllLocsOfOp(culprit_op)) {
383-
// // llvm::errs() << "[DEBUG] Occupying loc: "
384-
// // << ll.resource->getType() << "#" << ll.resource->getId()
385-
// // << " @t=" << ll.time_step << "\n";
386-
// // }
387-
// break;
388-
// }
389-
// }
390-
// if (all_free) {
391-
// path_out = current_path;
392-
// path_out.insert(path_out.end(), last_link_occupying.begin(),
393-
// last_link_occupying.end());
394-
// return true;
395-
// } else {
396-
// llvm::errs() << "[tryRouteDataMove] Last link [" <<
397-
// dyn_cast<Link>(last_link_loc.resource)->getSrcTile()->getId() << ","
398-
// << dyn_cast<Link>(last_link_loc.resource)->getDstTile()->getId() << "] is not available from "
399-
// << current_step << " to " << deadline_step << "\n";
400-
// }
401-
402352
Register *available_register =
403353
getAvailableRegister(state, dst_tile, current_step, deadline_step);
404354
if (!available_register) {
@@ -468,48 +418,6 @@ Operation *mlir::neura::getMaterializedProducer(Value operand) {
468418
return materialized_producer;
469419
}
470420

471-
bool mlir::neura::tryHeuristicMapping(std::vector<Operation *> &sorted_ops,
472-
const Architecture &architecture,
473-
MappingState &mapping_state) {
474-
DenseSet<Operation *> visited;
475-
476-
for (Operation *op : sorted_ops) {
477-
// TODO: Build up util func to distinguish materialized and non-materialized
478-
// ops.
479-
if (isa<neura::DataMovOp, neura::CtrlMovOp, neura::ReserveOp>(op)) {
480-
continue;
481-
}
482-
483-
std::vector<MappingLoc> sorted_locs =
484-
calculateAward(op, architecture, mapping_state);
485-
// auto target_loc = getLocWithMinCost(loc_with_cost);
486-
if (sorted_locs.empty()) {
487-
llvm::errs() << "[DEBUG] No locations found for op: " << *op << "\n";
488-
return false; // No locations available for this operation.
489-
}
490-
assert(!sorted_locs.empty() &&
491-
"No locations found for the operation to map");
492-
MappingLoc target_loc = sorted_locs.front();
493-
if (placeAndRoute(op, target_loc, mapping_state)) {
494-
llvm::errs() << "[DEBUG] Successfully scheduled op: " << *op
495-
<< " at loc: " << target_loc.resource->getType() << "#"
496-
<< target_loc.resource->getId()
497-
<< " @t=" << target_loc.time_step << "\n";
498-
continue;
499-
} else {
500-
llvm::errs() << "[DEBUG] Failed to schedule op: " << *op
501-
<< "; target loc: " << target_loc.resource->getType() << "#"
502-
<< target_loc.resource->getId()
503-
<< " @t=" << target_loc.time_step << "\n";
504-
}
505-
// TODO: Optimization -- backtrack a few times if failed to schedule the op.
506-
// https://github.com/coredac/dataflow/issues/59
507-
return false;
508-
}
509-
510-
return true;
511-
}
512-
513421
bool mlir::neura::canReachLocInTime(const std::vector<Operation *> &producers,
514422
const MappingLoc &target_loc,
515423
int deadline_step,
@@ -760,11 +668,6 @@ bool mlir::neura::placeAndRoute(Operation *op, const MappingLoc &target_loc,
760668
std::vector<MappingLoc> route_path;
761669
if (tryRouteForwardMove(data_move, src_loc, target_loc, mapping_state,
762670
route_path)) {
763-
// for (const MappingLoc &loc : route_path) {
764-
// llvm::errs() << "[DEBUG] Route path loc: " << loc.resource->getType()
765-
// << "#" << loc.resource->getId() << " @t=" << loc.time_step
766-
// << "\n";
767-
// }
768671
// Reserves the route for the data move operation.
769672
mapping_state.reserveRoute(data_move, route_path);
770673
routed_operands.push_back(data_move);
@@ -815,6 +718,8 @@ bool mlir::neura::placeAndRoute(Operation *op, const MappingLoc &target_loc,
815718
continue;
816719
}
817720
llvm::errs() << "[DEBUG] Failed to route ctrl_mov: " << *ctrl_mov
721+
<< " from " << target_loc.resource->getType() << "#"
722+
<< target_loc.resource->getId() << " @t=" << target_loc.time_step
818723
<< " to " << backward_loc.resource->getType() << "#"
819724
<< backward_loc.resource->getId()
820725
<< " @t=" << backward_loc.time_step << "; so unschedule op\n";

‎lib/NeuraDialect/Transforms/MapToAcceleratorPass.cpp‎

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -52,7 +52,9 @@ struct MapToAcceleratorPass
5252
StringRef mappingStrategy_stringRef(mappingStrategy.getValue());
5353
// Creates a mapping strategy based on the provided option.
5454
std::unique_ptr<MappingStrategy> mapping_strategy;
55-
if (mappingStrategy_stringRef == "greedy") {
55+
if (mappingStrategy_stringRef == "simple") {
56+
mapping_strategy = std::make_unique<HeuristicMapping>(1, 1);
57+
} else if (mappingStrategy_stringRef == "greedy") {
5658
mapping_strategy = std::make_unique<HeuristicMapping>(INT_MAX, 1);
5759
} else if (mappingStrategy_stringRef == "exhaustive") {
5860
mapping_strategy = std::make_unique<HeuristicMapping>(INT_MAX, INT_MAX);

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