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Merged
tancheng merged 8 commits into from
Oct 17, 2025
Merged

add support to max_ii #153

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6141ff2
add support to max_ii
n0thingNoob Oct 13, 2025
f2c4d7b
change to 32 regs
n0thingNoob Oct 13, 2025
6f7b21e
fix arch_spec handler and add support for the arg value in code_gen pass
n0thingNoob Oct 14, 2025
9b2478c
add testbench folder to test, including fir and histogram's kernel code
n0thingNoob Oct 16, 2025
77a4a5f
Refactor variable names to snake_case in MapToAcceleratorPass
n0thingNoob Oct 17, 2025
2c42a43
modify variable names
n0thingNoob Oct 17, 2025
c48b097
Update GenerateCodePass.cpp, add TODO for Issue #154
n0thingNoob Oct 17, 2025
cd34766
Remove testbench directory from remote repository
n0thingNoob Oct 17, 2025
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8 changes: 8 additions & 0 deletions lib/NeuraDialect/Transforms/GenerateCodePass.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -133,6 +133,11 @@ static std::string getConstantLiteral(Operation *op) {
return "#" + std::to_string(integer_attr.getInt());
if (auto float_attr = dyn_cast<FloatAttr>(value_attr))
return "#" + std::to_string(float_attr.getValueAsDouble());
//TODO： Issue #154: handle argument situations.
// if (auto string_attr = dyn_cast<StringAttr>(value_attr)) {
// std::string value = string_attr.getValue().str();
// return value;
// }
}
return "#0";
}
Expand All @@ -143,6 +148,9 @@ static std::string getConstantLiteral(Operation *op) {
return "#" + std::to_string(integer_attr.getInt());
if (auto float_attr = dyn_cast<FloatAttr>(constant_value_attr))
return "#" + std::to_string(float_attr.getValueAsDouble());
//TODO： Issue #154: handle argument situations.
// if (auto string_attr = dyn_cast<StringAttr>(constant_value_attr))
// return string_attr.getValue().str();
}

return "";
Expand Down
85 changes: 46 additions & 39 deletions lib/NeuraDialect/Transforms/MapToAcceleratorPass.cpp
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Expand Up @@ -538,7 +538,7 @@ mlir::neura::BaseTopology parseTopologyString(const std::string& topology_str) {
}

// Helper function to parse architecture YAML configuration.
bool parseArchitectureYAML(llvm::yaml::Document &doc, int &width, int &height,
bool parseArchitectureYAML(llvm::yaml::Document &doc, int &width, int &height, int &max_ii,
mlir::neura::TileDefaults &tile_defaults,
std::vector<mlir::neura::TileOverride> &tile_overrides,
mlir::neura::LinkDefaults &link_defaults,
Expand All @@ -550,66 +550,71 @@ bool parseArchitectureYAML(llvm::yaml::Document &doc, int &width, int &height,
return false;
}

auto *rootMap = llvm::dyn_cast<llvm::yaml::MappingNode>(root);
if (!rootMap) {
auto *root_map = llvm::dyn_cast<llvm::yaml::MappingNode>(root);
if (!root_map) {
llvm::errs() << "[MapToAcceleratorPass] YAML root is not a mapping\n";
return false;
}

// Iterate root mapping ONCE; find 'architecture' and 'tile_defaults'.
for (auto &keyValuePair : *rootMap) {
auto *keyNode = llvm::dyn_cast_or_null<llvm::yaml::ScalarNode>(keyValuePair.getKey());
if (!keyNode) continue;
for (auto &key_value_pair : *root_map) {
auto *key_node = llvm::dyn_cast_or_null<llvm::yaml::ScalarNode>(key_value_pair.getKey());
if (!key_node) continue;

llvm::SmallString<64> keyString;
llvm::StringRef keyRef = keyNode->getValue(keyString);
llvm::SmallString<64> key_string;
llvm::StringRef key_ref = key_node->getValue(key_string);

if (keyRef == "architecture") {
auto *architectureMap = llvm::dyn_cast_or_null<llvm::yaml::MappingNode>(keyValuePair.getValue());
if (!architectureMap) continue;
if (key_ref == "architecture") {
auto *architecture_map = llvm::dyn_cast_or_null<llvm::yaml::MappingNode>(key_value_pair.getValue());
if (!architecture_map) continue;

// Iterate architecture mapping ONCE; read width/height in the same pass.
for (auto &architectureKeyValuePair : *architectureMap) {
auto *architectureKeyNode = llvm::dyn_cast_or_null<llvm::yaml::ScalarNode>(architectureKeyValuePair.getKey());
if (!architectureKeyNode) continue;
for (auto &architecture_key_value_pair : *architecture_map) {
auto *architecture_key_node = llvm::dyn_cast_or_null<llvm::yaml::ScalarNode>(architecture_key_value_pair.getKey());
if (!architecture_key_node) continue;

llvm::SmallString<64> architectureKeyString;
llvm::StringRef architectureKeyRef = architectureKeyNode->getValue(architectureKeyString);
if (architectureKeyRef != "width" && architectureKeyRef != "height") continue;

auto *architectureValueNode = llvm::dyn_cast_or_null<llvm::yaml::ScalarNode>(architectureKeyValuePair.getValue());
if (!architectureValueNode) continue;

llvm::SmallString<64> architectureValueString;
llvm::StringRef architectureValueRef = architectureValueNode->getValue(architectureValueString);
long long tempValue = 0;
if (!architectureValueRef.getAsInteger(10, tempValue)) {
if (architectureKeyRef == "width") width = static_cast<int>(tempValue);
if (architectureKeyRef == "height") height = static_cast<int>(tempValue);
llvm::SmallString<64> architecture_key_string;
llvm::StringRef architecture_key_ref = architecture_key_node->getValue(architecture_key_string);
if (architecture_key_ref == "width" || architecture_key_ref == "height" || architecture_key_ref == "max_allowed_ii_by_hw") {
auto *architecture_value_node = llvm::dyn_cast_or_null<llvm::yaml::ScalarNode>(architecture_key_value_pair.getValue());
if (!architecture_value_node) continue;

llvm::SmallString<64> architecture_value_string;
llvm::StringRef architecture_value_ref = architecture_value_node->getValue(architecture_value_string);
long long temp_value = 0;
if (!architecture_value_ref.getAsInteger(10, temp_value)) {
if (architecture_key_ref == "width") width = static_cast<int>(temp_value);
if (architecture_key_ref == "height") height = static_cast<int>(temp_value);
if (architecture_key_ref == "max_allowed_ii_by_hw") {
max_ii = static_cast<int>(temp_value);
}
}
} else {
continue;
}
}
} else if (keyRef == "tile_defaults") {
auto *tile_defaults_map = llvm::dyn_cast_or_null<llvm::yaml::MappingNode>(keyValuePair.getValue());
} else if (key_ref == "tile_defaults") {
auto *tile_defaults_map = llvm::dyn_cast_or_null<llvm::yaml::MappingNode>(key_value_pair.getValue());
if (tile_defaults_map) {
parseTileDefaults(tile_defaults_map, tile_defaults);
}
} else if (keyRef == "tile_overrides") {
auto *tile_overrides_seq = llvm::dyn_cast_or_null<llvm::yaml::SequenceNode>(keyValuePair.getValue());
} else if (key_ref == "tile_overrides") {
auto *tile_overrides_seq = llvm::dyn_cast_or_null<llvm::yaml::SequenceNode>(key_value_pair.getValue());
if (tile_overrides_seq) {
parseTileOverrides(tile_overrides_seq, tile_overrides);
}
} else if (keyRef == "link_defaults") {
auto *link_defaults_map = llvm::dyn_cast_or_null<llvm::yaml::MappingNode>(keyValuePair.getValue());
} else if (key_ref == "link_defaults") {
auto *link_defaults_map = llvm::dyn_cast_or_null<llvm::yaml::MappingNode>(key_value_pair.getValue());
if (link_defaults_map) {
parseLinkDefaults(link_defaults_map, link_defaults);
}
} else if (keyRef == "link_overrides") {
auto *link_overrides_seq = llvm::dyn_cast_or_null<llvm::yaml::SequenceNode>(keyValuePair.getValue());
} else if (key_ref == "link_overrides") {
auto *link_overrides_seq = llvm::dyn_cast_or_null<llvm::yaml::SequenceNode>(key_value_pair.getValue());
if (link_overrides_seq) {
parseLinkOverrides(link_overrides_seq, link_overrides);
}
} else if (keyRef == "base_topology") {
auto *topology_node = llvm::dyn_cast_or_null<llvm::yaml::ScalarNode>(keyValuePair.getValue());
} else if (key_ref == "base_topology") {
auto *topology_node = llvm::dyn_cast_or_null<llvm::yaml::ScalarNode>(key_value_pair.getValue());
if (topology_node) {
llvm::SmallString<64> topology_string;
llvm::StringRef topology_ref = topology_node->getValue(topology_string);
Expand Down Expand Up @@ -739,6 +744,7 @@ struct MapToAcceleratorPass
std::string architecture_spec_file = mlir::neura::getArchitectureSpecFile();
int yaml_width = -1;
int yaml_height = -1;
int yaml_max_ii = 20; // Default max_ii = 20
mlir::neura::TileDefaults yaml_tile_defaults;
std::vector<mlir::neura::TileOverride> tile_overrides;
mlir::neura::LinkDefaults yaml_link_defaults;
Expand Down Expand Up @@ -773,7 +779,7 @@ struct MapToAcceleratorPass
}

// Parse YAML configuration
if (!parseArchitectureYAML(firstDoc, yaml_width, yaml_height, yaml_tile_defaults, tile_overrides, yaml_link_defaults, link_overrides, base_topology)) {
if (!parseArchitectureYAML(firstDoc, yaml_width, yaml_height, yaml_max_ii, yaml_tile_defaults, tile_overrides, yaml_link_defaults, link_overrides, base_topology)) {
return;
}

Expand Down Expand Up @@ -845,7 +851,8 @@ struct MapToAcceleratorPass
int res_mii = calculateResMii(func, architecture);

const int possibleMinII = std::max(rec_mii, res_mii);
constexpr int maxII = 20;
const int maxII = yaml_max_ii; // Use YAML config (default 20 if not specified)

std::vector<Operation *> topologically_sorted_ops =
getTopologicallySortedOps(func);
if (topologically_sorted_ops.empty()) {
Expand Down
5 changes: 3 additions & 2 deletions test/arch_spec/arch_spec_example.yaml
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Original file line number Diff line number Diff line change
@@ -1,8 +1,9 @@
architecture:
name: "NeuraCGRA"
version: "1.0"
width: 8
height: 8
width: 4
height: 4
max_allowed_ii_by_hw: 20

tile_defaults:
num_registers: 128
Expand Down
1 change: 1 addition & 0 deletions test/arch_spec/architecture.yaml
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Expand Up @@ -3,6 +3,7 @@ architecture:
version: "1.0"
width: 4
height: 4
max_allowed_ii_by_hw: 20

tile_defaults:
num_registers: 32
Expand Down