diff --git a/.gitignore b/.gitignore
new file mode 100644
index 00000000..81f8dda4
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,3 @@
+.cache/
+build/
+test/lit.cfg
\ No newline at end of file
diff --git a/include/ArchitectureSpec/architecture.json b/include/ArchitectureSpec/architecture.json
new file mode 100644
index 00000000..0b66c06e
--- /dev/null
+++ b/include/ArchitectureSpec/architecture.json
@@ -0,0 +1,125 @@
+{
+  "architecture": {
+    "name": "NeuraCGRA",
+    "version": "1.0",
+    "width": 4,
+    "height": 4
+  },
+  "tile_defaults": {
+    "num_registers": 64,
+    "default_ports": [
+      "N",
+      "S",
+      "W",
+      "E"
+    ],
+    "operations": [
+      "add",
+      "mul",
+      "sub"
+    ]
+  },
+  "link_defaults": {
+    "latency": 1,
+    "bandwidth": 32
+  },
+  "connectivity": "mesh",
+  "links": [
+    {
+      "id": 0,
+      "x": 0, 
+      "y": 0,
+      "src_tile": 0,
+      "dst_tile": 1,
+      "src_port": "E",
+      "dst_port": "W",
+      "latency": 1,
+      "bandwidth": 32
+    },
+    {
+      "id": 1,
+      "x": 1,
+      "y": 0,
+      "src_tile": 0,
+      "dst_tile": 4,
+      "src_port": "S",
+      "dst_port": "N"
+    }
+  ],
+  "tile_overrides": [
+    {
+      "id": 0,
+      "x": 0,
+      "y": 0,
+      "operations": [
+        "load"
+      ],
+      "num_registers": 32,
+      "ports": [
+        "S",
+        "E"
+      ]
+    },
+    {
+      "id": 3,
+      "x": 3,
+      "y": 0,
+      "operations": [
+        "store"
+      ],
+      "num_registers": 32,
+      "ports": [
+        "W"
+      ]
+    },
+    {
+      "id": 5,
+      "x": 1,
+      "y": 1,
+      "operations": [
+        "add",
+        "mul"
+      ],
+      "num_registers": 32,
+      "memory": {
+        "capacity": 2048
+      },
+      "ports": [
+        "N",
+        "S",
+        "E",
+        "W"
+      ]
+    },
+    {
+      "id": 6,
+      "x": 2,
+      "y": 1,
+      "operations": [],
+      "num_registers": 32,
+      "ports": [
+        "E",
+        "W"
+      ]
+    }
+  ],
+  "extensions": {
+    "crossbar": false
+  },
+  "simulator": {
+    "execution_model": "serial",
+    "logging": {
+      "enabled": true,
+      "file": "output.log"
+    },
+    "driver": {
+      "name": "Driver",
+      "frequency": "1GHz"
+    },
+    "device": {
+      "name": "Device",
+      "frequency": "1GHz",
+      "bind_to_architecture": true
+    }
+  }
+}
\ No newline at end of file
diff --git a/include/ArchitectureSpec/architecture.yaml b/include/ArchitectureSpec/architecture.yaml
new file mode 100644
index 00000000..4fab6fd9
--- /dev/null
+++ b/include/ArchitectureSpec/architecture.yaml
@@ -0,0 +1,85 @@
+architecture:
+  name: "NeuraCGRA"
+  version: "1.0"
+  width: 4
+  height: 4
+
+tile_defaults:
+  num_registers: 64
+  default_ports: ["N", "S", "W", "E"]
+  operations: ["add", "mul", "sub"]  # default ALU instructions
+
+link_defaults:
+  latency: 1
+  bandwidth: 32
+
+connectivity: "mesh"
+
+links:
+  - id: 0
+    x: 0
+    y: 0
+    src_tile: 0
+    dst_tile: 1
+    src_port: "E"
+    dst_port: "W"
+    latency: 1
+    bandwidth: 32
+
+  - id: 1
+    x: 1
+    y: 0
+    src_tile: 0
+    dst_tile: 4
+    src_port: "S"
+    dst_port: "N"
+
+tile_overrides:
+  - id: 0
+    x: 0
+    y: 0
+    operations: ["load"]
+    num_registers: 32
+    ports: ["S", "E"]
+
+  - id: 3
+    x: 3
+    y: 0
+    operations: ["store"]
+    num_registers: 32
+    ports: ["W"]
+
+  - id: 5
+    x: 1
+    y: 1
+    operations: ["add", "mul"]
+    num_registers: 32
+    memory:
+      capacity: 2048
+    ports: ["N", "S", "E", "W"]  # optional: matches defaults
+
+  - id: 6
+    x: 2
+    y: 1
+    operations: []
+    num_registers: 32
+    ports: ["E", "W"]
+
+extensions:
+  crossbar: false
+
+simulator:
+  execution_model: "serial"
+
+  logging:
+    enabled: true
+    file: "output.log"
+
+  driver:
+    name: "Driver"
+    frequency: "1GHz"
+
+  device:
+    name: "Device"
+    frequency: "1GHz"
+    bind_to_architecture: true
diff --git a/include/ArchitectureSpec/yaml2json.py b/include/ArchitectureSpec/yaml2json.py
new file mode 100644
index 00000000..1f9b8785
--- /dev/null
+++ b/include/ArchitectureSpec/yaml2json.py
@@ -0,0 +1,33 @@
+import yaml
+import json
+import sys
+import os
+
+def convert_yaml_to_json(yaml_path, json_path=None):
+    if not os.path.isfile(yaml_path):
+        print(f"Error: File '{yaml_path}' not found.")
+        return
+
+    with open(yaml_path, 'r') as f:
+        try:
+            data = yaml.safe_load(f)
+        except yaml.YAMLError as e:
+            print(f"YAML parse error: {e}")
+            return
+
+    if json_path is None:
+        json_path = os.path.splitext(yaml_path)[0] + ".json"
+
+    with open(json_path, 'w') as f:
+        json.dump(data, f, indent=2)
+    
+    print(f"✅ Converted '{yaml_path}' to '{json_path}'")
+
+if __name__ == "__main__":
+    if len(sys.argv) < 2:
+        print("Usage: python yaml2json.py <input.yaml> [output.json]")
+        sys.exit(1)
+
+    yaml_file = sys.argv[1]
+    json_file = sys.argv[2] if len(sys.argv) > 2 else None
+    convert_yaml_to_json(yaml_file, json_file)