diff --git a/Makefile b/Makefile index 25997017..c1f13247 100644 --- a/Makefile +++ b/Makefile @@ -351,7 +351,7 @@ help: "| where is at least 4850000000 Hz |\n"\ "| |\n"\ "| HWM_CHIPSET= |\n"\ - "| where is W83627 or IT8720 or COMPATIBLE |\n"\ + "| where is W83627; IT8720; AMD_VCO or COMPATIBLE |\n"\ "| |\n"\ "| Performance Counters: |\n"\ "| ------------------------------------------------------- |\n"\ diff --git a/README.md b/README.md index 606db196..9216fd79 100644 --- a/README.md +++ b/README.md @@ -542,7 +542,7 @@ o---------------------------------------------------------------o | where is at least 4850000000 Hz | | | | HWM_CHIPSET= | -| where is W83627 or IT8720 or COMPATIBLE | +| where is W83627; IT8720; AMD_VCO or COMPATIBLE | | | | Performance Counters: | | ------------------------------------------------------- | diff --git a/x86_64/corefreqd.c b/x86_64/corefreqd.c index 15b6c706..71db24e7 100644 --- a/x86_64/corefreqd.c +++ b/x86_64/corefreqd.c @@ -784,48 +784,48 @@ static void (*ComputeVoltage_AMD_RMB_Matrix[4])(struct FLIP_FLOP*, [FORMULA_SCOPE_PKG ] = ComputeVoltage_AMD_RMB_PerPkg }; -static void ComputeVoltage_AMD_19_61h( struct FLIP_FLOP *CFlip, - RO(SHM_STRUCT) *RO(Shm), - unsigned int cpu ) +static void ComputeVoltage_AMD_VCO( struct FLIP_FLOP *CFlip, + RO(SHM_STRUCT) *RO(Shm), + unsigned int cpu ) { - COMPUTE_VOLTAGE(AMD_19_61h, + COMPUTE_VOLTAGE(AMD_VCO, CFlip->Voltage.Vcore, CFlip->Voltage.VID); Core_ComputeVoltageLimits(&RO(Shm)->Cpu[cpu], CFlip); } -#define ComputeVoltage_AMD_19_61h_PerSMT ComputeVoltage_AMD_19_61h +#define ComputeVoltage_AMD_VCO_PerSMT ComputeVoltage_AMD_VCO -static void ComputeVoltage_AMD_19_61h_PerCore( struct FLIP_FLOP *CFlip, - RO(SHM_STRUCT) *RO(Shm), - unsigned int cpu ) +static void ComputeVoltage_AMD_VCO_PerCore( struct FLIP_FLOP *CFlip, + RO(SHM_STRUCT) *RO(Shm), + unsigned int cpu ) { if ((RO(Shm)->Cpu[cpu].Topology.ThreadID == 0) || (RO(Shm)->Cpu[cpu].Topology.ThreadID == -1)) { - ComputeVoltage_AMD_19_61h(CFlip, RO(Shm), cpu); + ComputeVoltage_AMD_VCO(CFlip, RO(Shm), cpu); } } -static void ComputeVoltage_AMD_19_61h_PerPkg( struct FLIP_FLOP *CFlip, - RO(SHM_STRUCT) *RO(Shm), - unsigned int cpu ) +static void ComputeVoltage_AMD_VCO_PerPkg( struct FLIP_FLOP *CFlip, + RO(SHM_STRUCT) *RO(Shm), + unsigned int cpu ) { if (cpu == RO(Shm)->Proc.Service.Core) { - ComputeVoltage_AMD_19_61h(CFlip, RO(Shm), cpu); + ComputeVoltage_AMD_VCO(CFlip, RO(Shm), cpu); } } -static void (*ComputeVoltage_AMD_19_61h_Matrix[4])(struct FLIP_FLOP*, +static void (*ComputeVoltage_AMD_VCO_Matrix[4])(struct FLIP_FLOP*, RO(SHM_STRUCT)*, unsigned int) = \ { [FORMULA_SCOPE_NONE] = ComputeVoltage_None, - [FORMULA_SCOPE_SMT ] = ComputeVoltage_AMD_19_61h_PerSMT, - [FORMULA_SCOPE_CORE] = ComputeVoltage_AMD_19_61h_PerCore, - [FORMULA_SCOPE_PKG ] = ComputeVoltage_AMD_19_61h_PerPkg + [FORMULA_SCOPE_SMT ] = ComputeVoltage_AMD_VCO_PerSMT, + [FORMULA_SCOPE_CORE] = ComputeVoltage_AMD_VCO_PerCore, + [FORMULA_SCOPE_PKG ] = ComputeVoltage_AMD_VCO_PerPkg }; static void ComputeVoltage_Winbond_IO( struct FLIP_FLOP *CFlip, @@ -1102,8 +1102,14 @@ static void *Core_Cycle(void *arg) case VOLTAGE_KIND_AMD_RMB: ComputeVoltageFormula = ComputeVoltage_AMD_RMB_Matrix; break; - case VOLTAGE_KIND_AMD_19_61h: - ComputeVoltageFormula = ComputeVoltage_AMD_19_61h_Matrix; + case VOLTAGE_KIND_ZEN3_VCO: + ComputeVoltageFormula = ComputeVoltage_AMD_VCO_Matrix; + break; + case VOLTAGE_KIND_ZEN4_VCO: + ComputeVoltageFormula = ComputeVoltage_AMD_VCO_Matrix; + break; + case VOLTAGE_KIND_ZEN5_VCO: + ComputeVoltageFormula = ComputeVoltage_AMD_VCO_Matrix; break; case VOLTAGE_KIND_WINBOND_IO: ComputeVoltageFormula = ComputeVoltage_Winbond_IO_Matrix; @@ -8784,13 +8790,36 @@ static void Pkg_ComputeVoltage_AMD_RMB(struct PKG_FLIP_FLOP *PFlip) PFlip->Voltage.VID.SOC); } -static void Pkg_ComputeVoltage_AMD_19_61h(struct PKG_FLIP_FLOP *PFlip) +static void Pkg_ComputeVoltage_ZEN3_VCO(struct PKG_FLIP_FLOP *PFlip) { - COMPUTE_VOLTAGE(AMD_19_61h, + COMPUTE_VOLTAGE(AMD_VCO, PFlip->Voltage.CPU, PFlip->Voltage.VID.CPU); -/*TODO - COMPUTE_VOLTAGE(AMD_19_61h, + + COMPUTE_VOLTAGE(AMD_17h, + PFlip->Voltage.SOC, + PFlip->Voltage.VID.SOC); +} + +static void Pkg_ComputeVoltage_ZEN4_VCO(struct PKG_FLIP_FLOP *PFlip) +{ + COMPUTE_VOLTAGE(AMD_VCO, + PFlip->Voltage.CPU, + PFlip->Voltage.VID.CPU); + + COMPUTE_VOLTAGE(AMD_RMB, + PFlip->Voltage.SOC, + PFlip->Voltage.VID.SOC); +} + +static void Pkg_ComputeVoltage_ZEN5_VCO(struct PKG_FLIP_FLOP *PFlip) +{ + COMPUTE_VOLTAGE(AMD_VCO, + PFlip->Voltage.CPU, + PFlip->Voltage.VID.CPU); + +/*TODO(Unknown SOC voltage register) + COMPUTE_VOLTAGE(AMD_VCO, PFlip->Voltage.SOC, PFlip->Voltage.VID.SOC); */ } @@ -8951,8 +8980,14 @@ REASON_CODE Core_Manager(REF *Ref) case VOLTAGE_KIND_AMD_RMB: Pkg_ComputeVoltageFormula = Pkg_ComputeVoltage_AMD_RMB; break; - case VOLTAGE_KIND_AMD_19_61h: - Pkg_ComputeVoltageFormula = Pkg_ComputeVoltage_AMD_19_61h; + case VOLTAGE_KIND_ZEN3_VCO: + Pkg_ComputeVoltageFormula = Pkg_ComputeVoltage_ZEN3_VCO; + break; + case VOLTAGE_KIND_ZEN4_VCO: + Pkg_ComputeVoltageFormula = Pkg_ComputeVoltage_ZEN4_VCO; + break; + case VOLTAGE_KIND_ZEN5_VCO: + Pkg_ComputeVoltageFormula = Pkg_ComputeVoltage_ZEN5_VCO; break; case VOLTAGE_KIND_WINBOND_IO: Pkg_ComputeVoltageFormula = Pkg_ComputeVoltage_Winbond_IO; diff --git a/x86_64/corefreqk.h b/x86_64/corefreqk.h index fb77f935..55ae030c 100644 --- a/x86_64/corefreqk.h +++ b/x86_64/corefreqk.h @@ -628,6 +628,8 @@ ASM_COUNTERx7(r10, r11, r12, r13, r14, r15,r9,r8,ASM_RDTSCP,mem_tsc,__VA_ARGS__) #define COMPATIBLE 0xffff #define W83627 0x5ca3 #define IT8720 0x8720 +/* Voltage Curve Optimizer */ +#define AMD_VCO 0xfacc /* * --- Core_AMD_SMN_Read and Core_AMD_SMN_Write --- @@ -12222,7 +12224,15 @@ static ARCH Arch[ARCHITECTURES] = { .ClockMod = ClockMod_AMD_Zen, .TurboClock = TurboClock_AMD_Zen, .thermalFormula = THERMAL_FORMULA_AMD_ZEN3, +#if defined(HWM_CHIPSET) +#if (HWM_CHIPSET == AMD_VCO) + .voltageFormula = VOLTAGE_FORMULA_ZEN3_VCO, +#else + .voltageFormula = VOLTAGE_FORMULA_AMD_19h, +#endif +#else .voltageFormula = VOLTAGE_FORMULA_AMD_19h, +#endif .powerFormula = POWER_FORMULA_AMD_19h, .PCI_ids = PCI_AMD_19h_ids, .Uncore = { @@ -12390,7 +12400,15 @@ static ARCH Arch[ARCHITECTURES] = { .ClockMod = ClockMod_AMD_Zen, .TurboClock = TurboClock_AMD_Zen, .thermalFormula = THERMAL_FORMULA_AMD_ZEN4, - .voltageFormula = VOLTAGE_FORMULA_AMD_19_61h, +#if defined(HWM_CHIPSET) +#if (HWM_CHIPSET == AMD_VCO) + .voltageFormula = VOLTAGE_FORMULA_ZEN4_VCO, +#else + .voltageFormula = VOLTAGE_FORMULA_AMD_ZEN4, +#endif +#else + .voltageFormula = VOLTAGE_FORMULA_AMD_ZEN4, +#endif .powerFormula = POWER_FORMULA_AMD_19h, .PCI_ids = PCI_AMD_19h_ids, .Uncore = { @@ -12582,7 +12600,15 @@ static ARCH Arch[ARCHITECTURES] = { .ClockMod = ClockMod_AMD_Zen, .TurboClock = TurboClock_AMD_Zen, .thermalFormula = THERMAL_FORMULA_AMD_1Ah, +#if defined(HWM_CHIPSET) +#if (HWM_CHIPSET == AMD_VCO) + .voltageFormula = VOLTAGE_FORMULA_ZEN5_VCO, +#else .voltageFormula = VOLTAGE_FORMULA_AMD_1Ah, +#endif +#else + .voltageFormula = VOLTAGE_FORMULA_AMD_1Ah, +#endif .powerFormula = POWER_FORMULA_AMD_1Ah, .PCI_ids = PCI_AMD_1Ah_ids, .Uncore = { diff --git a/x86_64/coretypes.h b/x86_64/coretypes.h index 2924cd44..152cde92 100644 --- a/x86_64/coretypes.h +++ b/x86_64/coretypes.h @@ -582,7 +582,9 @@ enum VOLTAGE_KIND { VOLTAGE_KIND_AMD_15h = 0b000001000001000000000000, VOLTAGE_KIND_AMD_17h = 0b000100000001000000000000, VOLTAGE_KIND_AMD_RMB = 0b000010000001000000000000, - VOLTAGE_KIND_AMD_19_61h = 0b000000100001000000000000, + VOLTAGE_KIND_ZEN3_VCO = 0b000000100001000000000000, + VOLTAGE_KIND_ZEN4_VCO = 0b000000010001000000000000, + VOLTAGE_KIND_ZEN5_VCO = 0b000000001001000000000000, VOLTAGE_KIND_WINBOND_IO = 0b001000000000000000000000, VOLTAGE_KIND_ITETECH_IO = 0b010000000000000000000000 }; @@ -602,7 +604,9 @@ VOLTAGE_FORMULA_AMD_15h =(VOLTAGE_KIND_AMD_15h << 8) | FORMULA_SCOPE_SMT, VOLTAGE_FORMULA_AMD_17h =(VOLTAGE_KIND_AMD_17h << 8) | FORMULA_SCOPE_SMT, VOLTAGE_FORMULA_AMD_RMB =(VOLTAGE_KIND_AMD_RMB << 8) | FORMULA_SCOPE_PKG, VOLTAGE_FORMULA_AMD_ZEN4 =(VOLTAGE_KIND_AMD_RMB << 8) | FORMULA_SCOPE_SMT, -VOLTAGE_FORMULA_AMD_19_61h =(VOLTAGE_KIND_AMD_19_61h << 8) | FORMULA_SCOPE_SMT, +VOLTAGE_FORMULA_ZEN3_VCO =(VOLTAGE_KIND_ZEN3_VCO << 8) | FORMULA_SCOPE_SMT, +VOLTAGE_FORMULA_ZEN4_VCO =(VOLTAGE_KIND_ZEN4_VCO << 8) | FORMULA_SCOPE_SMT, +VOLTAGE_FORMULA_ZEN5_VCO =(VOLTAGE_KIND_ZEN5_VCO << 8) | FORMULA_SCOPE_SMT, VOLTAGE_FORMULA_WINBOND_IO =(VOLTAGE_KIND_WINBOND_IO << 8) | FORMULA_SCOPE_PKG, VOLTAGE_FORMULA_ITETECH_IO =(VOLTAGE_KIND_ITETECH_IO << 8) | FORMULA_SCOPE_PKG }; @@ -781,7 +785,7 @@ POWER_FORMULA_AMD_17h =(POWER_KIND_AMD_17h << 8) | FORMULA_SCOPE_CORE #define COMPUTE_VOLTAGE_AMD_RMB(Vcore, VID) \ (Vcore = 0.00625 * (double) (VID)) -#define COMPUTE_VOLTAGE_AMD_19_61h(Vcore, VID) \ +#define COMPUTE_VOLTAGE_AMD_VCO(Vcore, VID) \ ( Vcore = 2.09 - ((0.005 * (double) (VID)) + 0.245) ) #define COMPUTE_VOLTAGE_WINBOND_IO(Vcore, VID) \