From 9235fb32ec4a13f4218d07c5bb7d9fa657d5dd6a Mon Sep 17 00:00:00 2001
From: CyrIng <labs@cyring.fr>
Date: Tue, 9 Jul 2024 20:13:58 +0200
Subject: [PATCH] [AArch64] Workaround to Package discrete voltage: the highest
 Vcore

---
 aarch64/corefreqd.c | 10 +++++++++-
 aarch64/corefreqk.c |  7 -------
 2 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/aarch64/corefreqd.c b/aarch64/corefreqd.c
index 535cff18..617ba504 100644
--- a/aarch64/corefreqd.c
+++ b/aarch64/corefreqd.c
@@ -1706,6 +1706,7 @@ REASON_CODE Core_Manager(REF *Ref)
 		];
 
 	PFlip->Thermal.Temp = 0;
+	PFlip->Voltage.VID.CPU = 0;
 	/*	Reset the averages & the max frequency			*/
 	RO(Shm)->Proc.Avg.Turbo = 0;
 	RO(Shm)->Proc.Avg.C0    = 0;
@@ -1799,7 +1800,11 @@ REASON_CODE Core_Manager(REF *Ref)
 		if (CFlop->Thermal.Temp > PFlip->Thermal.Temp)
 			PFlip->Thermal.Temp = CFlop->Thermal.Temp;
 	}
-
+	/*	Workaround to a Package discrete voltage: the highest Vcore */
+	if (!RO(Proc)->PowerThermal.VID.CPU) {
+		if (CFlop->Voltage.VID > PFlip->Voltage.VID.CPU)
+			PFlip->Voltage.VID.CPU = CFlop->Voltage.VID;
+	}
 	/*	Workaround to RAPL Package counter: sum of all Cores	*/
 	Pkg_ComputePowerFormula(RW(Proc), CFlop);
 
@@ -1908,7 +1913,10 @@ REASON_CODE Core_Manager(REF *Ref)
 	Pkg_ComputeThermalFormula(PFlip, SProc);
       }
 	/*	Package Voltage formulas				*/
+      if (RO(Proc)->PowerThermal.VID.CPU)
+      {
 	PFlip->Voltage.VID.CPU = RO(Proc)->PowerThermal.VID.CPU;
+      }
 	PFlip->Voltage.VID.SOC = RO(Proc)->PowerThermal.VID.SOC;
 
 	Pkg_ComputeVoltageFormula(PFlip);
diff --git a/aarch64/corefreqk.c b/aarch64/corefreqk.c
index 524eb7af..03d45125 100644
--- a/aarch64/corefreqk.c
+++ b/aarch64/corefreqk.c
@@ -3406,13 +3406,6 @@ static enum hrtimer_restart Cycle_GenericMachine(struct hrtimer *pTimer)
 	case FORMULA_SCOPE_NONE:
 		break;
 	}
-	if (((PUBLIC(RO(Proc))->Features.Hybrid)
-	  && (Core->Bind == PUBLIC(RO(Proc))->Service.Hybrid))
-	 || (Core->Bind == PUBLIC(RO(Proc))->Service.Core))
-	{
-		PUBLIC(RO(Proc))->PowerThermal.VID.CPU = \
-			PRIVATE(OF(Core, AT(Core->Bind)))->OPP[index].VID;
-	}
     }
     #endif /* CONFIG_PM_OPP */
 	BITSET(LOCKLESS, PUBLIC(RW(Core, AT(cpu)))->Sync.V, NTFY);