diff --git a/piel/tools/__init__.py b/piel/tools/__init__.py
index eb342c20..05addba6 100644
--- a/piel/tools/__init__.py
+++ b/piel/tools/__init__.py
@@ -1,12 +1,3 @@
-# from .amaranth import *
-# from .cocotb import *
-# from .gdsfactory import *
-# from .openlane import *
-# from .hdl21 import *
-# from .sax import *
-# from .qutip import *
-
-# TODO migrate to this
 from . import amaranth
 from . import cocotb
 from . import gdsfactory
diff --git a/piel/tools/amaranth/export.py b/piel/tools/amaranth/export.py
index ead8826b..43ae9565 100644
--- a/piel/tools/amaranth/export.py
+++ b/piel/tools/amaranth/export.py
@@ -3,21 +3,18 @@
 It handles the conversion and export process, integrating with a specified file system structure.
 """
 
-import amaranth as am
-from amaranth.back import verilog
-import types
-
+from typing import Any, Literal
 from ...file_system import return_path
 from ...project_structure import get_module_folder_type_location
 from ...types import PathTypes, TruthTable
 
 
 def generate_verilog_from_amaranth_truth_table(
-    amaranth_module: am.Elaboratable,
+    amaranth_module: Any,
     truth_table: TruthTable,
     target_file_name: str,
     target_directory: PathTypes,
-    backend=verilog,
+    backend: Literal["verilog", "vhdl"] = "verilog",
 ) -> None:
     """
     Exports an Amaranth module to Verilog code and writes it to a specified path.
@@ -50,6 +47,21 @@ def generate_verilog_from_amaranth_truth_table(
         >>> )
         >>> generate_verilog_from_amaranth_truth_table(am_module, truth_table, "output.v", "/path/to/save")
     """
+    import amaranth as am
+    import types
+
+    if backend == "verilog":
+        from amaranth.back import verilog
+
+        backend = verilog
+    elif backend == "vhdl":
+        raise NotImplementedError("This backend is not yet implemented.")
+
+    if isinstance(amaranth_module, am.Elaboratable):
+        pass
+    else:
+        raise AttributeError("Amaranth module should be am.Elaboratable")
+
     ports_list = truth_table.ports_list
 
     if isinstance(target_directory, types.ModuleType):
diff --git a/piel/tools/amaranth/verify.py b/piel/tools/amaranth/verify.py
index 61b61cd4..be168be3 100644
--- a/piel/tools/amaranth/verify.py
+++ b/piel/tools/amaranth/verify.py
@@ -1,7 +1,4 @@
-import amaranth as am
-from amaranth.sim import Simulator, Delay
-import types
-from typing import Literal
+from typing import Literal, Any
 
 from ...project_structure import get_module_folder_type_location
 from ...file_system import return_path
@@ -12,7 +9,7 @@
 
 
 def verify_amaranth_truth_table(
-    truth_table_amaranth_module: am.Elaboratable,
+    truth_table_amaranth_module: Any,
     truth_table: TruthTable,
     vcd_file_name: str,
     target_directory: PathTypes,
@@ -51,6 +48,15 @@ def verify_amaranth_truth_table(
         >>> )
         >>> verify_amaranth_truth_table(am_module, truth_table, "output.vcd", "/path/to/save")
     """
+    import amaranth as am
+    from amaranth.sim import Simulator, Delay
+    import types
+
+    if isinstance(truth_table_amaranth_module, am.Elaboratable):
+        pass
+    else:
+        raise AttributeError("Amaranth module should be am.Elaboratable")
+
     inputs = truth_table.input_ports
     outputs = truth_table.output_ports
     truth_table_df = truth_table.dataframe