diff --git a/docs/examples/10_demo_full_flow/10_demo_full_flow.py b/docs/examples/07_full_flow_demo_electronic_photonic/07_full_flow_demo_electronic_photonic.py similarity index 91% rename from docs/examples/10_demo_full_flow/10_demo_full_flow.py rename to docs/examples/07_full_flow_demo_electronic_photonic/07_full_flow_demo_electronic_photonic.py index bc540143..87214768 100644 --- a/docs/examples/10_demo_full_flow/10_demo_full_flow.py +++ b/docs/examples/07_full_flow_demo_electronic_photonic/07_full_flow_demo_electronic_photonic.py @@ -521,4 +521,16 @@ class TransientTb: # ## 5a. Putting it all together +# #### A DAC-Driven Mixed Signal Simulation + +# #### Automation + +# Now, these transient simulations are something you might want to very configure depending on the type of signals that you might want to verify. However, we can provide some basic parameterised simple functions such as step responses and so on. So instead of having to write everything above, you can also just run the following. + +# One desired output of an electrical model simulation is an extraction of the power consumption of the circuit. Fundamentally, this is dependent on the time and the operation performed. Hence, to estimate an average power consumption, it is more effective to define the power consumption of a particular operation, and extract the power consumption for the frequency at which this operation is performed. +# +# In this case, we are defining the energy of the operation at particular nodes of the circuit. For example, we know a resisitve heater will dissipate all of its current consumption as thermal power. However, we also need to evaluate the whole circuit. We can know how much energy our DC or RF power supply is providing by measuring the voltage and current supplied accordingly. In a digital circuit, depending on the frequency of the operation, we know how often there is a signal rise and fall, in both cases forcing digital transistors to operate in the linear regime and consuming more power than in saturation mode. We also need to account the range of time the signals are in saturation mode, as even in CMOS idle state there is a minimal power consumption that is important as the circuit scales into VLSI/EP. +# +# Note that through the SPICE simulations, we can extract the energy required at each operation with greater accuracy than analytically and the complexity of this is configuring the testbench appropriately in order to account for this. + # ## 5b. What comes next? diff --git a/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/docs/README.md b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/docs/README.md new file mode 100644 index 00000000..eead5102 --- /dev/null +++ b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/docs/README.md @@ -0,0 +1 @@ +full_flow_demo diff --git a/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/__init__.py b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/__init__.py similarity index 100% rename from docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/__init__.py rename to docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/__init__.py diff --git a/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/analogue/__init__.py b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/analogue/__init__.py similarity index 100% rename from docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/analogue/__init__.py rename to docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/analogue/__init__.py diff --git a/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/components/__init__.py b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/components/__init__.py similarity index 100% rename from docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/components/__init__.py rename to docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/components/__init__.py diff --git a/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/components/analogue/__init__.py b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/components/analogue/__init__.py similarity index 100% rename from docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/components/analogue/__init__.py rename to docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/components/analogue/__init__.py diff --git a/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/components/digital/__init__.py b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/components/digital/__init__.py similarity index 100% rename from docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/components/digital/__init__.py rename to docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/components/digital/__init__.py diff --git a/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/components/photonics/__init__.py b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/components/photonics/__init__.py similarity index 100% rename from docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/components/photonics/__init__.py rename to docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/components/photonics/__init__.py diff --git a/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/models/__init__.py b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/models/__init__.py similarity index 100% rename from docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/models/__init__.py rename to docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/models/__init__.py diff --git a/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/models/analogue/__init__.py b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/models/analogue/__init__.py similarity index 100% rename from docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/models/analogue/__init__.py rename to docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/models/analogue/__init__.py diff --git a/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/models/frequency/__init__.py b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/models/frequency/__init__.py similarity index 100% rename from docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/models/frequency/__init__.py rename to docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/models/frequency/__init__.py diff --git a/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/models/logic/__init__.py b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/models/logic/__init__.py similarity index 100% rename from docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/models/logic/__init__.py rename to docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/models/logic/__init__.py diff --git a/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/models/physical/__init__.py b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/models/physical/__init__.py similarity index 100% rename from docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/models/physical/__init__.py rename to docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/models/physical/__init__.py diff --git a/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/models/transient/__init__.py b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/models/transient/__init__.py similarity index 100% rename from docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/models/transient/__init__.py rename to docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/models/transient/__init__.py diff --git a/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/photonic/__init__.py b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/photonic/__init__.py similarity index 100% rename from docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/photonic/__init__.py rename to docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/photonic/__init__.py diff --git a/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/src/our_truth_table_module.v b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/src/our_truth_table_module.v similarity index 100% rename from docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/src/our_truth_table_module.v rename to docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/src/our_truth_table_module.v diff --git a/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/src/truth_table_module.v b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/src/truth_table_module.v similarity index 100% rename from docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/src/truth_table_module.v rename to docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/src/truth_table_module.v diff --git a/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/tb/Makefile b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/tb/Makefile new file mode 100644 index 00000000..7313ede8 --- /dev/null +++ b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/tb/Makefile @@ -0,0 +1,8 @@ +#!/bin/bash +# Makefile +SIM ?= icarus +TOPLEVEL_LANG ?= verilog +VERILOG_SOURCES += /home/daquintero/phd/piel_private/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/src/truth_table_module.v +TOPLEVEL := top +MODULE := test_top +include $(shell cocotb-config --makefiles)/Makefile.sim diff --git a/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/tb/__init__.py b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/tb/__init__.py similarity index 100% rename from docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/tb/__init__.py rename to docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/tb/__init__.py diff --git a/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/tb/out/truth_table_test_results.csv b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/tb/out/truth_table_test_results.csv similarity index 100% rename from docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/tb/out/truth_table_test_results.csv rename to docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/tb/out/truth_table_test_results.csv diff --git a/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/tb/run_cocotb_simulation.sh b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/tb/run_cocotb_simulation.sh similarity index 59% rename from docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/tb/run_cocotb_simulation.sh rename to docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/tb/run_cocotb_simulation.sh index c625ec78..4976fb9d 100644 --- a/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/tb/run_cocotb_simulation.sh +++ b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/tb/run_cocotb_simulation.sh @@ -1,2 +1,2 @@ -cd /home/daquintero/phd/piel_private/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/tb; -make \ No newline at end of file +cd /home/daquintero/phd/piel_private/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/tb; +make diff --git a/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/tb/test_top.py b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/tb/test_top.py similarity index 100% rename from docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/tb/test_top.py rename to docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/full_flow_demo/tb/test_top.py diff --git a/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/setup.py b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/setup.py new file mode 100644 index 00000000..a777d3f2 --- /dev/null +++ b/docs/examples/07_full_flow_demo_electronic_photonic/full_flow_demo/setup.py @@ -0,0 +1,12 @@ +#!/usr/bin/env python +from distutils.core import setup + +setup( + name="full_flow_demo", + version="0.0.1", + description="Example empty piel project.", + author="Dario Quintero", + author_email="darioaquintero@gmail.com", + url="https://github.com/daquintero/piel", + packages=["full_flow_demo"], +) diff --git a/docs/examples/07_mixed_signal_photonic_cosimulation/07_mixed_signal_photonic_cosimulation.py b/docs/examples/07_mixed_signal_photonic_cosimulation/07_mixed_signal_photonic_cosimulation.py deleted file mode 100644 index 0186f780..00000000 --- a/docs/examples/07_mixed_signal_photonic_cosimulation/07_mixed_signal_photonic_cosimulation.py +++ /dev/null @@ -1,117 +0,0 @@ -# # Mixed-Signal & Photonic Cosimulation - -# + -import hdl21 as h -import gdsfactory as gf -import piel -import sky130 -import sky130_hdl21 - -from bokeh.io import output_notebook -from gdsfactory.config import rich_output -from gplugins.schematic_editor import SchematicEditor - -gf.config.rich_output() - -# %env BOKEH_ALLOW_WS_ORIGIN=* - -output_notebook() - - -# - - -# ## An Inverter-Driven Thermo-Optic Switch - -# In this example, we will implement a basic co-simulation between photonics and electronics. - -# Let's consider our thermo-optic resistive load: - - -def our_custom_resistor_hdl21_module(): - # TODO add custom PDK - from piel import straight_heater_metal_simple - import functools - from gdsfactory.generic_tech import get_generic_pdk - - generic_pdk = get_generic_pdk() - generic_pdk.activate() - - # Defines the resistance parameters - our_resistive_heater = functools.partial( - straight_heater_metal_simple, ohms_per_square=2 - ) - - our_resistive_heater_netlist = our_resistive_heater().get_netlist( - allow_multiple=True, exclude_port_types="optical" - ) - - our_resistive_heater_spice_netlist = piel.gdsfactory_netlist_with_hdl21_generators( - our_resistive_heater_netlist - ) - our_resistive_heater_circuit = piel.construct_hdl21_module( - spice_netlist=our_resistive_heater_spice_netlist - ) - return our_resistive_heater_circuit - - -# + -# our_custom_resistor_hdl21_module() -# - - -# First, we implement the SPICE model of our inverter in the sky130 process as continuing from a previous example. - - -@h.module -class SkyInv: - """An inverter, demonstrating using PDK modules""" - - # Create some IO - i, o, VDD, VSS = h.Ports(4) - - p = sky130_hdl21.Sky130MosParams(w=1, l=1) - - # And create some transistors! - ps = sky130_hdl21.primitives.PMOS_1p8V_STD(p)(d=o, g=i, s=VDD, b=VDD) - ns = sky130_hdl21.primitives.NMOS_1p8V_STD(p)(d=VSS, g=i, s=o, b=VSS) - - -# Let's configure a basic DC-sweep simulation of this inverter driving a resistive load, which would be equivalent to our thermo-optic switch - - -@h.module -class OperatingPointTb: - """# Basic Extracted Device DC Operating Point Testbench""" - - VSS = h.Port() # The testbench interface: sole port VSS - GROUND - VDD = h.Vdc(dc=1)(n=VSS) # A DC voltage source - - load_resistor = sky130_hdl21.ress["GEN_PO"] - load_resistor.n = VSS - - inv = SkyInv(i=VDD.p, VDD=VDD.p, VSS=VSS) - load_resistor.p = inv.o - - -simple_operating_point_simulation = piel.configure_operating_point_simulation( - testbench=OperatingPointTb, name="simple_operating_point_simulation" -) -results = piel.run_simulation(simulation=simple_operating_point_simulation) -results - -# ## A DAC-Driven Mixed Signal Simulation - -# #### Automation - -# Now, these transient simulations are something you might want to very configure depending on the type of signals that you might want to verify. However, we can provide some basic parameterised simple functions such as step responses and so on. So instead of having to write everything above, you can also just run the following. - -# One desired output of an electrical model simulation is an extraction of the power consumption of the circuit. Fundamentally, this is dependent on the time and the operation performed. Hence, to estimate an average power consumption, it is more effective to define the power consumption of a particular operation, and extract the power consumption for the frequency at which this operation is performed. -# -# In this case, we are defining the energy of the operation at particular nodes of the circuit. For example, we know a resisitve heater will dissipate all of its current consumption as thermal power. However, we also need to evaluate the whole circuit. We can know how much energy our DC or RF power supply is providing by measuring the voltage and current supplied accordingly. In a digital circuit, depending on the frequency of the operation, we know how often there is a signal rise and fall, in both cases forcing digital transistors to operate in the linear regime and consuming more power than in saturation mode. We also need to account the range of time the signals are in saturation mode, as even in CMOS idle state there is a minimal power consumption that is important as the circuit scales into VLSI/EP. -# -# Note that through the SPICE simulations, we can extract the energy required at each operation with greater accuracy than analytically and the complexity of this is configuring the testbench appropriately in order to account for this. - -# - -# - -# diff --git a/docs/examples/10_demo_full_flow/full_flow_demo/docs/README.md b/docs/examples/10_demo_full_flow/full_flow_demo/docs/README.md deleted file mode 100644 index a0a6cd9c..00000000 --- a/docs/examples/10_demo_full_flow/full_flow_demo/docs/README.md +++ /dev/null @@ -1 +0,0 @@ -full_flow_demo \ No newline at end of file diff --git a/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/tb/Makefile b/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/tb/Makefile deleted file mode 100644 index cc9f2513..00000000 --- a/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/tb/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -#!/bin/bash -# Makefile -SIM ?= icarus -TOPLEVEL_LANG ?= verilog -VERILOG_SOURCES += /home/daquintero/phd/piel_private/docs/examples/10_demo_full_flow/full_flow_demo/full_flow_demo/src/truth_table_module.v -TOPLEVEL := top -MODULE := test_top -include $(shell cocotb-config --makefiles)/Makefile.sim \ No newline at end of file diff --git a/docs/examples/10_demo_full_flow/full_flow_demo/setup.py b/docs/examples/10_demo_full_flow/full_flow_demo/setup.py deleted file mode 100644 index 7943f704..00000000 --- a/docs/examples/10_demo_full_flow/full_flow_demo/setup.py +++ /dev/null @@ -1,11 +0,0 @@ -#!/usr/bin/env python -from distutils.core import setup - -setup(name="full_flow_demo", - version="0.0.1", - description="Example empty piel project." -, author="Dario Quintero", - author_email="darioaquintero@gmail.com", - url="https://github.com/daquintero/piel", - packages=['full_flow_demo'], -) \ No newline at end of file diff --git a/docs/resources/fsic_2024_presentation/index.rst b/docs/resources/fsic_2024_presentation/index.rst index f0675af0..3a020f93 100644 --- a/docs/resources/fsic_2024_presentation/index.rst +++ b/docs/resources/fsic_2024_presentation/index.rst @@ -24,7 +24,7 @@ Outline - Was working on quantum photonic systems and it was a massive pain to simulate how the system behaved. - TODO possibly talk about design flows if need be - Let's go through an example. - - Create a 10_full_flow example. + - Finish 07_full_flow_electronic_photonic_demo. - Say, we have an optical function we want to demonstrate or implement, extract the logic for that. - Go through the flow of implementing that logic via amaranth, syntheziging that logic via openlane, extracting performance parameters accordingly, modelling the analog amplifier accordingly and implementing it via gdsfactory with sky130 - Model the component with analog, digital circuits simulators accordingly. In the future, add the mixed-signal with full-concurrency for photonic time-domain signals.