diff --git a/docs/examples/08_basic_interconnection_modelling/08_basic_interconnection_modelling.py b/docs/examples/08_basic_interconnection_modelling/08_basic_interconnection_modelling.py
index e5b0c130..ae714c2b 100644
--- a/docs/examples/08_basic_interconnection_modelling/08_basic_interconnection_modelling.py
+++ b/docs/examples/08_basic_interconnection_modelling/08_basic_interconnection_modelling.py
@@ -13,6 +13,7 @@
 #
 # As such, understanding interconnection effects turns out to be pretty important in these type of systems.
 
+# +
 from piel.models.physical.electrical.cable import (
     calculate_coaxial_cable_geometry,
     calculate_coaxial_cable_heat_transfer,
@@ -22,6 +23,11 @@
     CoaxialCableMaterialSpecificationType,
 )
 
+import matplotlib.pyplot as plt
+import pandas as pd
+
+# -
+
 # ## Basic Thermal Modelling
 
 # ### Modelling a DC Wire
@@ -174,6 +180,8 @@
 
 import piel.experimental as pe
 
+dir(pe.types)
+
 
 # ## Frequency-Domain Analysis
 #
@@ -201,7 +209,9 @@
 # </figure>
 
 
-calibrated_open_data_file = "measurement_data/calibration_kit_vna_cal_at_vna_ports/open_port1.s2p"
+calibrated_open_data_file = (
+    "measurement_data/calibration_kit_vna_cal_at_vna_ports/open_port1.s2p"
+)
 calibrated_vna_port1_open_network = hfss_touchstone_2_network(calibrated_open_data_file)
 calibrated_vna_port1_open_network.plot_s_db()
 
@@ -211,7 +221,9 @@
 
 # Now, let's connect a short calibration port into one of the VNA ports. You can note that obviously the insertion loss doesn't change as this is just a port to port measurement.
 
-calibrated_short_data_file = "measurement_data/calibration_kit_vna_cal_at_vna_ports/short_port1.s2p"
+calibrated_short_data_file = (
+    "measurement_data/calibration_kit_vna_cal_at_vna_ports/short_port1.s2p"
+)
 calibrated_vna_port1_short_network = hfss_touchstone_2_network(
     calibrated_short_data_file
 )
@@ -219,7 +231,9 @@
 
 # #### A HW Calibrated Load Measurement
 
-calibrated_load_data_file = "measurement_data/calibration_kit_vna_cal_at_vna_ports/load_port1.s2p"
+calibrated_load_data_file = (
+    "measurement_data/calibration_kit_vna_cal_at_vna_ports/load_port1.s2p"
+)
 calibrated_vna_port1_load_network = hfss_touchstone_2_network(calibrated_load_data_file)
 calibrated_vna_port1_load_network.plot_s_db()
 
@@ -230,7 +244,9 @@
 # <figcaption align = "center"> YOUR CAPTION </figcaption>
 # </figure>
 
-calibrated_through_data_file = "measurement_data/calibration_kit_vna_cal_at_vna_ports/through_port1_port2.s2p"
+calibrated_through_data_file = (
+    "measurement_data/calibration_kit_vna_cal_at_vna_ports/through_port1_port2.s2p"
+)
 calibrated_vna_through_network = hfss_touchstone_2_network(calibrated_through_data_file)
 calibrated_vna_through_network.plot_s_db()
 
@@ -314,9 +330,7 @@
 
 
 # +
-def construct_calibration_networks(
-    measurements_directory: piel.PathTypes
-):
+def construct_calibration_networks(measurements_directory: piel.PathTypes):
     """
     This function takes a directory with a collection of ``.s2p`` measurements and constructs the relevant calibration measurements accordingly.
     In this case, this function is meant to filter out files which follow the following directory structure.
@@ -348,48 +362,50 @@ def construct_calibration_networks(
 
     # Now we iterate on this directory to list all the files
     for file in files:
-
         # TODO possibly do the .s1p files here.
-        if file.endswith('.s2p'):
-
+        if file.endswith(".s2p"):
             # Construct the relevant file names
             file_name = directory / file
 
             # Filter for .s2p files according to relevant measrurements
-            if 'through' in file:
-                through_network = hfss_touchstone_2_network(
-                    file_name
-                )
+            if "through" in file:
+                through_network = hfss_touchstone_2_network(file_name)
                 raw_networks["through"] = through_network
                 networks["through"] = through_network
 
             for one_port_reference_name_i in one_port_references:
                 if one_port_reference_name_i in file:
                     if "port1" in file:
-                        raw_networks[one_port_reference_name_i][1] = hfss_touchstone_2_network(
-                            file_name
-                        )
+                        raw_networks[one_port_reference_name_i][
+                            1
+                        ] = hfss_touchstone_2_network(file_name)
                     elif "port2" in file:
-                        raw_networks[one_port_reference_name_i][2] = hfss_touchstone_2_network(
-                            file_name
-                        )
+                        raw_networks[one_port_reference_name_i][
+                            2
+                        ] = hfss_touchstone_2_network(file_name)
 
     # Now we need to construct the relevant reciprocal networks from a collection of two-port networks
     for one_port_reference_name_i in one_port_references:
-        for port_i, two_port_network_i in raw_networks[one_port_reference_name_i].items():
+        for port_i, two_port_network_i in raw_networks[
+            one_port_reference_name_i
+        ].items():
             if port_i == 1:
-                port_1_network = skrf.subnetwork(two_port_network_i, [port_i-1])  # 1 port Network from ports_i
+                port_1_network = skrf.subnetwork(
+                    two_port_network_i, [port_i - 1]
+                )  # 1 port Network from ports_i
             if port_i == 2:
-                port_2_network = skrf.subnetwork(two_port_network_i, [port_i-1])  # 1 port Network from ports_i
+                port_2_network = skrf.subnetwork(
+                    two_port_network_i, [port_i - 1]
+                )  # 1 port Network from ports_i
 
         # Combine them together
-        networks[one_port_reference_name_i] = skrf.two_port_reflect(port_1_network, port_2_network)
+        networks[one_port_reference_name_i] = skrf.two_port_reflect(
+            port_1_network, port_2_network
+        )
 
     return networks
 
 
-
-
 # +
 a = construct_calibration_networks(
     measurements_directory="./measurement_data/calibration_kit_vna_cal_at_vna_ports/"
@@ -406,18 +422,18 @@ def construct_calibration_networks(
 measured = [i for i in b.values()]
 
 cal = skrf.calibration.SOLT(
-    ideals = ideal,
-    measured = measured,
+    ideals=ideal,
+    measured=measured,
 )
 
 
-dut.plot_s_db()
-
 # +
 cal.run()
 
 # apply it to a dut
-dut = skrf.Network("/home/daquintero/phd/piel/docs/examples/08_basic_interconnection_modelling/measurement_data/calibration_kit_vna_cal_at_cable_ports/attenuator_20db.s2p")
+dut = skrf.Network(
+    "/home/daquintero/phd/piel/docs/examples/08_basic_interconnection_modelling/measurement_data/calibration_kit_vna_cal_at_cable_ports/attenuator_20db.s2p"
+)
 dut_caled = cal.apply_cal(dut)
 
 # plot results
@@ -432,85 +448,13 @@ def construct_calibration_networks(
     "/home/daquintero/phd/piel/docs/examples/08_basic_interconnection_modelling/measurement_data/calibration_kit_vna_cal_at_vna_ports/attenuator_20db.s2p"
 ).plot_s_db()
 
-# +
-import skrf as rf
-from skrf.calibration import SOLT
-rf.stylely()
-
-# ideal 1-port Networks
-short_ideal = media.short()
-open_ideal = media.open()
-load_ideal = media.match()  # could also be: media.load(Gamma0=0)
-thru_ideal = media.thru()
-
-# forge a two-port network from two one-port networks
-short_ideal_2p = rf.two_port_reflect(short_ideal, short_ideal)
-open_ideal_2p = rf.two_port_reflect(open_ideal, open_ideal)
-load_ideal_2p = rf.two_port_reflect(load_ideal, load_ideal)
-
-# a list of Network types, holding 'ideal' responses
-my_ideals = [
-    short_ideal_2p,    short_ideal_2p,
-    open_ideal_2p,
-    load_ideal_2p,
-    thru_ideal,   # Thru should be the last
-]
-
-# a list of Network types, holding 'measured' responses
-my_measured = [
-    short_measured,
-    open_measured,
-    load_measured,
-    thru_measured,   # Thru should be the last
-]
-
-## create a SOLT instance
-cal = rf.calibration.SOLT(
-    ideals = my_ideals,
-    measured = my_measured,
-    )
-
-# +
-
-.
-# a list of Network types, holding 'measured' responses
-my_measured = [
-    rf.Network('measured/short, short.s2p'),
-    rf.Network('measured/open, open.s2p'),
-    rf.Network('measured/load, load.s2p'),
-    rf.Network('measured/thru.s2p'),
-]
-
-## create a SOLT instance
-cal = SOLT(
-    ideals = my_ideals,
-    measured = my_measured,
-# isolation calibration is optional, it can be removed.
-)
-
-## run, and apply calibration to a DUT
-# run calibration algorithm
-cal.run()
-
-# apply it to a dut
-dut = rf.Network('my_dut.s2p')
-dut_caled = cal.apply_cal(dut)
-
-# plot results
-dut_caled.plot_s_db()
-# save results
-dut_caled.write_touchstone()
-# -
-
 # We can now verify this measurement with the hardware-deembedding up to those two cables.
 
 # #### Comparison with Hardware De-Embedding
 #
 # Say, for the same calibration as the measurements above, we can now measure just the attenuator and compare with the de-embedded reference.
 
-calvna_20db_attenuator_data_file = (
-    "measurement_data/software_deembedding/calvna_20db_attenuator_2082614820.s2p"
-)
+calvna_20db_attenuator_data_file = "measurement_data/software_deembedding/inverse_multiply/calvna_20db_attenuator_2082614820.s2p"
 calvna_20db_attenuator_network = hfss_touchstone_2_network(
     calvna_20db_attenuator_data_file
 )
@@ -529,7 +473,6 @@ def construct_calibration_networks(
 # ![rf_plots_1411MSM](../../_static/img/examples/08_basic_interconnection_modelling/rf_plots_1411MSM.png)
 
 # +
-import matplotlib.pyplot as plt
 
 # 141-1MSM+ cable datasheet model
 data = {
diff --git a/docs/examples/08a_pcb_interposer_characterisation/08a_pcb_interposer_characterisation.py b/docs/examples/08a_pcb_interposer_characterisation/08a_pcb_interposer_characterisation.py
index f56d6272..968a24d8 100644
--- a/docs/examples/08a_pcb_interposer_characterisation/08a_pcb_interposer_characterisation.py
+++ b/docs/examples/08a_pcb_interposer_characterisation/08a_pcb_interposer_characterisation.py
@@ -168,14 +168,14 @@ def create_vna_measurements(
 def calibration_propagation_delay_experiment_instance(
     square_wave_frequency_Hz: float,
 ):
-    oscilloscope = pe.create_two_port_oscilloscope()
-    waveform_generator = pe.create_one_port_square_wave_waveform_generator(
+    oscilloscope = pe.models.create_two_port_oscilloscope()
+    waveform_generator = pe.models.create_one_port_square_wave_waveform_generator(
         peak_to_peak_voltage_V=0.5,
         rise_time_s=1,
         fall_time_s=1,
         frequency_Hz=square_wave_frequency_Hz,
     )
-    splitter = pe.create_power_splitter_1to2()
+    splitter = pe.models.create_power_splitter_1to2()
 
     # List of connections
     experiment_connections = piel.models.create_connection_list_from_ports_lists(
@@ -199,14 +199,14 @@ def calibration_propagation_delay_experiment_instance(
 def pcb_propagation_delay_experiment_instance(
     square_wave_frequency_Hz: float,
 ):
-    oscilloscope = pe.create_two_port_oscilloscope()
-    waveform_generator = pe.create_one_port_square_wave_waveform_generator(
+    oscilloscope = pe.models.create_two_port_oscilloscope()
+    waveform_generator = pe.models.create_one_port_square_wave_waveform_generator(
         peak_to_peak_voltage_V=0.5,
         rise_time_s=1,
         fall_time_s=1,
         frequency_Hz=square_wave_frequency_Hz,
     )
-    splitter = pe.create_power_splitter_1to2()
+    splitter = pe.models.create_power_splitter_1to2()
 
     # List of connections
     experiment_connections = piel.models.create_connection_list_from_ports_lists(
@@ -224,7 +224,7 @@ def pcb_propagation_delay_experiment_instance(
     return experiment_instance
 
 
-oscilloscope = pe.create_two_port_oscilloscope()
+oscilloscope = pe.models.create_two_port_oscilloscope()
 oscilloscope
 
 # Now let's actually create our `Experiment`:
diff --git a/docs/examples/08a_pcb_interposer_characterisation/data/basic_vna_test/0/instance.json b/docs/examples/08a_pcb_interposer_characterisation/data/basic_vna_test/0/instance.json
index b226bc76..587727b0 100644
--- a/docs/examples/08a_pcb_interposer_characterisation/data/basic_vna_test/0/instance.json
+++ b/docs/examples/08a_pcb_interposer_characterisation/data/basic_vna_test/0/instance.json
@@ -1 +1 @@
-"{\"name\":null,\"components\":[{\"name\":\"rf_calibration_pcb\",\"ports\":[{\"name\":\"SIG14\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"RES1\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG1\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG2\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"RES2\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG3\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"OPEN\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SHORT\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG5\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"RES3\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG6\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG7\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"RES4\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG8\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"L50\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null}],\"connections\":[],\"environment\":{\"temperature_K\":273.0,\"region\":null}},{\"name\":\"DPO73304\",\"ports\":[{\"name\":\"PORT1\",\"domain\":\"RF\",\"connector\":null,\"manifold\":null},{\"name\":\"PORT2\",\"domain\":\"RF\",\"connector\":null,\"manifold\":null}],\"connections\":null,\"environment\":{\"temperature_K\":273.0,\"region\":null},\"configuration\":null}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"PORT1\"},{\"name\":\"SIG14\"}]},{\"name\":null,\"ports\":[{\"name\":\"PORT2\"},{\"name\":\"RES1\"}]}],\"goal\":null,\"index\":0,\"date_configured\":\"2024-07-28T17:54:09.993584\",\"date_measured\":null}"
\ No newline at end of file
+"{\"name\":null,\"components\":[{\"name\":\"rf_calibration_pcb\",\"ports\":[{\"name\":\"SIG14\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"RES1\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG1\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG2\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"RES2\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG3\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"OPEN\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SHORT\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG5\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"RES3\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG6\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG7\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"RES4\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG8\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"L50\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null}],\"connections\":[],\"components\":[],\"environment\":{\"temperature_K\":273.0,\"region\":null}},{\"name\":\"DPO73304\",\"ports\":[{\"name\":\"PORT1\",\"domain\":\"RF\",\"connector\":null,\"manifold\":null},{\"name\":\"PORT2\",\"domain\":\"RF\",\"connector\":null,\"manifold\":null}],\"connections\":null,\"components\":[],\"environment\":{\"temperature_K\":273.0,\"region\":null},\"configuration\":null}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"PORT1\"},{\"name\":\"SIG14\"}]},{\"name\":null,\"ports\":[{\"name\":\"PORT2\"},{\"name\":\"RES1\"}]}],\"goal\":null,\"index\":0,\"date_configured\":\"2024-07-29T11:15:57.223001\",\"date_measured\":null}"
diff --git a/docs/examples/08a_pcb_interposer_characterisation/data/basic_vna_test/experiment.json b/docs/examples/08a_pcb_interposer_characterisation/data/basic_vna_test/experiment.json
index 07df0020..1acf9ff1 100644
--- a/docs/examples/08a_pcb_interposer_characterisation/data/basic_vna_test/experiment.json
+++ b/docs/examples/08a_pcb_interposer_characterisation/data/basic_vna_test/experiment.json
@@ -1 +1 @@
-"{\"name\":\"basic_vna_test\",\"goal\":null,\"experiment_instances\":[{\"name\":null,\"components\":[{\"name\":\"rf_calibration_pcb\",\"ports\":[{\"name\":\"SIG14\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"RES1\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG1\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG2\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"RES2\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG3\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"OPEN\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SHORT\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG5\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"RES3\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG6\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG7\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"RES4\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG8\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"L50\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null}],\"connections\":[],\"environment\":{\"temperature_K\":273.0,\"region\":null}},{\"name\":\"DPO73304\",\"ports\":[{\"name\":\"PORT1\",\"domain\":\"RF\",\"connector\":null,\"manifold\":null},{\"name\":\"PORT2\",\"domain\":\"RF\",\"connector\":null,\"manifold\":null}],\"connections\":null,\"environment\":{\"temperature_K\":273.0,\"region\":null},\"configuration\":null}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"PORT1\"},{\"name\":\"SIG14\"}]},{\"name\":null,\"ports\":[{\"name\":\"PORT2\"},{\"name\":\"RES1\"}]}],\"goal\":null,\"index\":0,\"date_configured\":\"2024-07-28T17:54:09.993584\",\"date_measured\":null}]}"
\ No newline at end of file
+"{\"name\":\"basic_vna_test\",\"goal\":null,\"experiment_instances\":[{\"name\":null,\"components\":[{\"name\":\"rf_calibration_pcb\",\"ports\":[{\"name\":\"SIG14\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"RES1\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG1\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG2\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"RES2\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG3\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"OPEN\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SHORT\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG5\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"RES3\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG6\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG7\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"RES4\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"SIG8\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null},{\"name\":\"L50\",\"domain\":\"RF\",\"connector\":\"smp_plug\",\"manifold\":null}],\"connections\":[],\"components\":[],\"environment\":{\"temperature_K\":273.0,\"region\":null}},{\"name\":\"DPO73304\",\"ports\":[{\"name\":\"PORT1\",\"domain\":\"RF\",\"connector\":null,\"manifold\":null},{\"name\":\"PORT2\",\"domain\":\"RF\",\"connector\":null,\"manifold\":null}],\"connections\":null,\"components\":[],\"environment\":{\"temperature_K\":273.0,\"region\":null},\"configuration\":null}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"PORT1\"},{\"name\":\"SIG14\"}]},{\"name\":null,\"ports\":[{\"name\":\"PORT2\"},{\"name\":\"RES1\"}]}],\"goal\":null,\"index\":0,\"date_configured\":\"2024-07-29T11:15:57.223001\",\"date_measured\":null}]}"
diff --git a/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/0/instance.json b/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/0/instance.json
index 1f37ab3f..62fa4804 100644
--- a/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/0/instance.json
+++ b/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/0/instance.json
@@ -1 +1 @@
-"{\"name\":\"pcb_1000000000.0_Hz\",\"components\":[{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"},{\"name\":\"CH2\"}],\"connections\":null},{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"}],\"connections\":null},{\"name\":\"power_splitter_1to2\",\"ports\":[{\"name\":\"IN\"},{\"name\":\"OUT1\"},{\"name\":\"OUT2\"}],\"connections\":null}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"OUT1\"},{\"name\":\"CH1\"}]},{\"name\":null,\"ports\":[{\"name\":\"OUT2\"},{\"name\":\"CH2\"}]}],\"goal\":null,\"index\":null,\"date_configured\":null,\"date_measured\":null}"
\ No newline at end of file
+"{\"name\":\"pcb_1000000000.0_Hz\",\"components\":[{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"},{\"name\":\"CH2\"}],\"connections\":null,\"components\":[]},{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"}],\"connections\":null,\"components\":[]},{\"name\":\"power_splitter_1to2\",\"ports\":[{\"name\":\"IN\"},{\"name\":\"OUT1\"},{\"name\":\"OUT2\"}],\"connections\":null,\"components\":[]}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"OUT1\"},{\"name\":\"CH1\"}]},{\"name\":null,\"ports\":[{\"name\":\"OUT2\"},{\"name\":\"CH2\"}]}],\"goal\":null,\"index\":null,\"date_configured\":null,\"date_measured\":null}"
diff --git a/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/1/instance.json b/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/1/instance.json
index 0c795d7e..84f47398 100644
--- a/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/1/instance.json
+++ b/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/1/instance.json
@@ -1 +1 @@
-"{\"name\":\"calibration_1000000000.0_Hz\",\"components\":[{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"},{\"name\":\"CH2\"}],\"connections\":null},{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"}],\"connections\":null},{\"name\":\"power_splitter_1to2\",\"ports\":[{\"name\":\"IN\"},{\"name\":\"OUT1\"},{\"name\":\"OUT2\"}],\"connections\":null}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"OUT1\"},{\"name\":\"CH1\"}]},{\"name\":null,\"ports\":[{\"name\":\"OUT2\"},{\"name\":\"CH2\"}]}],\"goal\":null,\"index\":null,\"date_configured\":null,\"date_measured\":null}"
\ No newline at end of file
+"{\"name\":\"calibration_1000000000.0_Hz\",\"components\":[{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"},{\"name\":\"CH2\"}],\"connections\":null,\"components\":[]},{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"}],\"connections\":null,\"components\":[]},{\"name\":\"power_splitter_1to2\",\"ports\":[{\"name\":\"IN\"},{\"name\":\"OUT1\"},{\"name\":\"OUT2\"}],\"connections\":null,\"components\":[]}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"OUT1\"},{\"name\":\"CH1\"}]},{\"name\":null,\"ports\":[{\"name\":\"OUT2\"},{\"name\":\"CH2\"}]}],\"goal\":null,\"index\":null,\"date_configured\":null,\"date_measured\":null}"
diff --git a/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/2/instance.json b/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/2/instance.json
index 7d3149d2..f51ee10d 100644
--- a/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/2/instance.json
+++ b/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/2/instance.json
@@ -1 +1 @@
-"{\"name\":\"pcb_3000000000.0_Hz\",\"components\":[{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"},{\"name\":\"CH2\"}],\"connections\":null},{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"}],\"connections\":null},{\"name\":\"power_splitter_1to2\",\"ports\":[{\"name\":\"IN\"},{\"name\":\"OUT1\"},{\"name\":\"OUT2\"}],\"connections\":null}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"OUT1\"},{\"name\":\"CH1\"}]},{\"name\":null,\"ports\":[{\"name\":\"OUT2\"},{\"name\":\"CH2\"}]}],\"goal\":null,\"index\":null,\"date_configured\":null,\"date_measured\":null}"
\ No newline at end of file
+"{\"name\":\"pcb_3000000000.0_Hz\",\"components\":[{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"},{\"name\":\"CH2\"}],\"connections\":null,\"components\":[]},{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"}],\"connections\":null,\"components\":[]},{\"name\":\"power_splitter_1to2\",\"ports\":[{\"name\":\"IN\"},{\"name\":\"OUT1\"},{\"name\":\"OUT2\"}],\"connections\":null,\"components\":[]}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"OUT1\"},{\"name\":\"CH1\"}]},{\"name\":null,\"ports\":[{\"name\":\"OUT2\"},{\"name\":\"CH2\"}]}],\"goal\":null,\"index\":null,\"date_configured\":null,\"date_measured\":null}"
diff --git a/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/3/instance.json b/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/3/instance.json
index d5e09d12..0b69595d 100644
--- a/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/3/instance.json
+++ b/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/3/instance.json
@@ -1 +1 @@
-"{\"name\":\"calibration_3000000000.0_Hz\",\"components\":[{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"},{\"name\":\"CH2\"}],\"connections\":null},{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"}],\"connections\":null},{\"name\":\"power_splitter_1to2\",\"ports\":[{\"name\":\"IN\"},{\"name\":\"OUT1\"},{\"name\":\"OUT2\"}],\"connections\":null}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"OUT1\"},{\"name\":\"CH1\"}]},{\"name\":null,\"ports\":[{\"name\":\"OUT2\"},{\"name\":\"CH2\"}]}],\"goal\":null,\"index\":null,\"date_configured\":null,\"date_measured\":null}"
\ No newline at end of file
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diff --git a/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/4/instance.json b/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/4/instance.json
index 2b934da3..e2366bc7 100644
--- a/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/4/instance.json
+++ b/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/4/instance.json
@@ -1 +1 @@
-"{\"name\":\"pcb_5000000000.0_Hz\",\"components\":[{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"},{\"name\":\"CH2\"}],\"connections\":null},{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"}],\"connections\":null},{\"name\":\"power_splitter_1to2\",\"ports\":[{\"name\":\"IN\"},{\"name\":\"OUT1\"},{\"name\":\"OUT2\"}],\"connections\":null}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"OUT1\"},{\"name\":\"CH1\"}]},{\"name\":null,\"ports\":[{\"name\":\"OUT2\"},{\"name\":\"CH2\"}]}],\"goal\":null,\"index\":null,\"date_configured\":null,\"date_measured\":null}"
\ No newline at end of file
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diff --git a/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/5/instance.json b/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/5/instance.json
index ff703d5a..e4878825 100644
--- a/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/5/instance.json
+++ b/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/5/instance.json
@@ -1 +1 @@
-"{\"name\":\"calibration_5000000000.0_Hz\",\"components\":[{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"},{\"name\":\"CH2\"}],\"connections\":null},{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"}],\"connections\":null},{\"name\":\"power_splitter_1to2\",\"ports\":[{\"name\":\"IN\"},{\"name\":\"OUT1\"},{\"name\":\"OUT2\"}],\"connections\":null}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"OUT1\"},{\"name\":\"CH1\"}]},{\"name\":null,\"ports\":[{\"name\":\"OUT2\"},{\"name\":\"CH2\"}]}],\"goal\":null,\"index\":null,\"date_configured\":null,\"date_measured\":null}"
\ No newline at end of file
+"{\"name\":\"calibration_5000000000.0_Hz\",\"components\":[{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"},{\"name\":\"CH2\"}],\"connections\":null,\"components\":[]},{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"}],\"connections\":null,\"components\":[]},{\"name\":\"power_splitter_1to2\",\"ports\":[{\"name\":\"IN\"},{\"name\":\"OUT1\"},{\"name\":\"OUT2\"}],\"connections\":null,\"components\":[]}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"OUT1\"},{\"name\":\"CH1\"}]},{\"name\":null,\"ports\":[{\"name\":\"OUT2\"},{\"name\":\"CH2\"}]}],\"goal\":null,\"index\":null,\"date_configured\":null,\"date_measured\":null}"
diff --git a/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/6/instance.json b/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/6/instance.json
index ddb94cef..11600714 100644
--- a/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/6/instance.json
+++ b/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/6/instance.json
@@ -1 +1 @@
-"{\"name\":\"pcb_10000000000.0_Hz\",\"components\":[{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"},{\"name\":\"CH2\"}],\"connections\":null},{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"}],\"connections\":null},{\"name\":\"power_splitter_1to2\",\"ports\":[{\"name\":\"IN\"},{\"name\":\"OUT1\"},{\"name\":\"OUT2\"}],\"connections\":null}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"OUT1\"},{\"name\":\"CH1\"}]},{\"name\":null,\"ports\":[{\"name\":\"OUT2\"},{\"name\":\"CH2\"}]}],\"goal\":null,\"index\":null,\"date_configured\":null,\"date_measured\":null}"
\ No newline at end of file
+"{\"name\":\"pcb_10000000000.0_Hz\",\"components\":[{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"},{\"name\":\"CH2\"}],\"connections\":null,\"components\":[]},{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"}],\"connections\":null,\"components\":[]},{\"name\":\"power_splitter_1to2\",\"ports\":[{\"name\":\"IN\"},{\"name\":\"OUT1\"},{\"name\":\"OUT2\"}],\"connections\":null,\"components\":[]}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"OUT1\"},{\"name\":\"CH1\"}]},{\"name\":null,\"ports\":[{\"name\":\"OUT2\"},{\"name\":\"CH2\"}]}],\"goal\":null,\"index\":null,\"date_configured\":null,\"date_measured\":null}"
diff --git a/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/7/instance.json b/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/7/instance.json
index 8f183179..71b6ed19 100644
--- a/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/7/instance.json
+++ b/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/7/instance.json
@@ -1 +1 @@
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\ No newline at end of file
+"{\"name\":\"calibration_10000000000.0_Hz\",\"components\":[{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"},{\"name\":\"CH2\"}],\"connections\":null,\"components\":[]},{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"}],\"connections\":null,\"components\":[]},{\"name\":\"power_splitter_1to2\",\"ports\":[{\"name\":\"IN\"},{\"name\":\"OUT1\"},{\"name\":\"OUT2\"}],\"connections\":null,\"components\":[]}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"OUT1\"},{\"name\":\"CH1\"}]},{\"name\":null,\"ports\":[{\"name\":\"OUT2\"},{\"name\":\"CH2\"}]}],\"goal\":null,\"index\":null,\"date_configured\":null,\"date_measured\":null}"
diff --git a/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/experiment.json b/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/experiment.json
index 250bb7d6..da0d4925 100644
--- a/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/experiment.json
+++ b/docs/examples/08a_pcb_interposer_characterisation/data/multi_frequency_through_propagation_measurement/experiment.json
@@ -1 +1 @@
-"{\"name\":\"multi_frequency_through_propagation_measurement\",\"goal\":\"Test the propagation response at multiple frequencies. Use a through connection to measure the approximate propagation delay through the calibration cables and PCB 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\ No newline at end of file
+"{\"name\":\"multi_frequency_through_propagation_measurement\",\"goal\":\"Test the propagation response at multiple frequencies. Use a through connection to measure the approximate propagation delay through the calibration cables and PCB trace.\",\"experiment_instances\":[{\"name\":\"pcb_1000000000.0_Hz\",\"components\":[{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"},{\"name\":\"CH2\"}],\"connections\":null,\"components\":[]},{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"}],\"connections\":null,\"components\":[]},{\"name\":\"power_splitter_1to2\",\"ports\":[{\"name\":\"IN\"},{\"name\":\"OUT1\"},{\"name\":\"OUT2\"}],\"connections\":null,\"components\":[]}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"OUT1\"},{\"name\":\"CH1\"}]},{\"name\":null,\"ports\":[{\"name\":\"OUT2\"},{\"name\":\"CH2\"}]}],\"goal\":null,\"index\":null,\"date_configured\":null,\"date_measured\":null},{\"name\":\"calibration_1000000000.0_Hz\",\"components\":[{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"},{\"name\":\"CH2\"}],\"connections\":null,\"components\":[]},{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"}],\"connections\":null,\"components\":[]},{\"name\":\"power_splitter_1to2\",\"ports\":[{\"name\":\"IN\"},{\"name\":\"OUT1\"},{\"name\":\"OUT2\"}],\"connections\":null,\"components\":[]}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"OUT1\"},{\"name\":\"CH1\"}]},{\"name\":null,\"ports\":[{\"name\":\"OUT2\"},{\"name\":\"CH2\"}]}],\"goal\":null,\"index\":null,\"date_configured\":null,\"date_measured\":null},{\"name\":\"pcb_3000000000.0_Hz\",\"components\":[{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"},{\"name\":\"CH2\"}],\"connections\":null,\"components\":[]},{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"}],\"connections\":null,\"components\":[]},{\"name\":\"power_splitter_1to2\",\"ports\":[{\"name\":\"IN\"},{\"name\":\"OUT1\"},{\"name\":\"OUT2\"}],\"connections\":null,\"components\":[]}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"OUT1\"},{\"name\":\"CH1\"}]},{\"name\":null,\"ports\":[{\"name\":\"OUT2\"},{\"name\":\"CH2\"}]}],\"goal\":null,\"index\":null,\"date_configured\":null,\"date_measured\":null},{\"name\":\"calibration_3000000000.0_Hz\",\"components\":[{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"},{\"name\":\"CH2\"}],\"connections\":null,\"components\":[]},{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"}],\"connections\":null,\"components\":[]},{\"name\":\"power_splitter_1to2\",\"ports\":[{\"name\":\"IN\"},{\"name\":\"OUT1\"},{\"name\":\"OUT2\"}],\"connections\":null,\"components\":[]}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"OUT1\"},{\"name\":\"CH1\"}]},{\"name\":null,\"ports\":[{\"name\":\"OUT2\"},{\"name\":\"CH2\"}]}],\"goal\":null,\"index\":null,\"date_configured\":null,\"date_measured\":null},{\"name\":\"pcb_5000000000.0_Hz\",\"components\":[{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"},{\"name\":\"CH2\"}],\"connections\":null,\"components\":[]},{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"}],\"connections\":null,\"components\":[]},{\"name\":\"power_splitter_1to2\",\"ports\":[{\"name\":\"IN\"},{\"name\":\"OUT1\"},{\"name\":\"OUT2\"}],\"connections\":null,\"components\":[]}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"OUT1\"},{\"name\":\"CH1\"}]},{\"name\":null,\"ports\":[{\"name\":\"OUT2\"},{\"name\":\"CH2\"}]}],\"goal\":null,\"index\":null,\"date_configured\":null,\"date_measured\":null},{\"name\":\"calibration_5000000000.0_Hz\",\"components\":[{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"},{\"name\":\"CH2\"}],\"connections\":null,\"components\":[]},{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"}],\"connections\":null,\"components\":[]},{\"name\":\"power_splitter_1to2\",\"ports\":[{\"name\":\"IN\"},{\"name\":\"OUT1\"},{\"name\":\"OUT2\"}],\"connections\":null,\"components\":[]}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"OUT1\"},{\"name\":\"CH1\"}]},{\"name\":null,\"ports\":[{\"name\":\"OUT2\"},{\"name\":\"CH2\"}]}],\"goal\":null,\"index\":null,\"date_configured\":null,\"date_measured\":null},{\"name\":\"pcb_10000000000.0_Hz\",\"components\":[{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"},{\"name\":\"CH2\"}],\"connections\":null,\"components\":[]},{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"}],\"connections\":null,\"components\":[]},{\"name\":\"power_splitter_1to2\",\"ports\":[{\"name\":\"IN\"},{\"name\":\"OUT1\"},{\"name\":\"OUT2\"}],\"connections\":null,\"components\":[]}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"OUT1\"},{\"name\":\"CH1\"}]},{\"name\":null,\"ports\":[{\"name\":\"OUT2\"},{\"name\":\"CH2\"}]}],\"goal\":null,\"index\":null,\"date_configured\":null,\"date_measured\":null},{\"name\":\"calibration_10000000000.0_Hz\",\"components\":[{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"},{\"name\":\"CH2\"}],\"connections\":null,\"components\":[]},{\"name\":\"two_port_oscilloscope\",\"ports\":[{\"name\":\"CH1\"}],\"connections\":null,\"components\":[]},{\"name\":\"power_splitter_1to2\",\"ports\":[{\"name\":\"IN\"},{\"name\":\"OUT1\"},{\"name\":\"OUT2\"}],\"connections\":null,\"components\":[]}],\"connections\":[{\"name\":null,\"ports\":[{\"name\":\"OUT1\"},{\"name\":\"CH1\"}]},{\"name\":null,\"ports\":[{\"name\":\"OUT2\"},{\"name\":\"CH2\"}]}],\"goal\":null,\"index\":null,\"date_configured\":null,\"date_measured\":null}]}"
diff --git a/piel/experimental/models/vna.py b/piel/experimental/models/vna.py
index 1ebb185a..e10d79b9 100644
--- a/piel/experimental/models/vna.py
+++ b/piel/experimental/models/vna.py
@@ -2,4 +2,4 @@
 
 
 def E8364A() -> pe.types.VNA:
-    pass
+    return pe.types.VNA(name="E8364A")
diff --git a/piel/experimental/types/cryostat.py b/piel/experimental/types/cryostat.py
index bdb77f38..4cbbd456 100644
--- a/piel/experimental/types/cryostat.py
+++ b/piel/experimental/types/cryostat.py
@@ -1,12 +1,13 @@
-from ...types import Environment, Instance
+from ...types import Environment, Component
 
 
-class TemperatureStage(Environment):
+class TemperatureStage(Environment, Component):
     """
     Standard definition for a generic temperature stage.
     """
-    surface_area_m2: float
 
+    surface_area_m2: float  # TODO move to a geometry type.
 
-class Cryostat(Instance):
+
+class Cryostat(Component):
     temperature_stages: list[TemperatureStage]
diff --git a/piel/types/connectivity/abstract.py b/piel/types/connectivity/abstract.py
index 8c4b9d39..4189300b 100644
--- a/piel/types/connectivity/abstract.py
+++ b/piel/types/connectivity/abstract.py
@@ -1,3 +1,5 @@
+from __future__ import annotations
+
 from typing import Optional
 from piel.types import PielBaseModel
 
@@ -30,4 +32,10 @@ class Component(Instance):
     """
 
     ports: list[Port]
+
     connections: list[Connection]
+
+    components: list[Component] = []
+    """
+    Note the recursive relationship that a component can be composed of multiple components.
+    """