diff --git a/docs/_static/img/examples/06a_analytical_mzm_model/transmission_absorption_1550nm.png b/docs/_static/img/examples/06a_analytical_mzm_model/transmission_absorption_1550nm.png index c497f209..28a3465d 100644 Binary files a/docs/_static/img/examples/06a_analytical_mzm_model/transmission_absorption_1550nm.png and b/docs/_static/img/examples/06a_analytical_mzm_model/transmission_absorption_1550nm.png differ diff --git a/docs/_static/img/examples/06a_analytical_mzm_model/transmission_lambda_1550nm.png b/docs/_static/img/examples/06a_analytical_mzm_model/transmission_lambda_1550nm.png index bac953fa..0d77164b 100644 Binary files a/docs/_static/img/examples/06a_analytical_mzm_model/transmission_lambda_1550nm.png and b/docs/_static/img/examples/06a_analytical_mzm_model/transmission_lambda_1550nm.png differ diff --git a/docs/_static/img/examples/08_basic_interconnection_modelling/basic_plot_through.jpg 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b/docs/_static/img/examples/08_basic_interconnection_modelling/skrf_plot_short.jpg index 105cb840..a6c12828 100644 Binary files a/docs/_static/img/examples/08_basic_interconnection_modelling/skrf_plot_short.jpg and b/docs/_static/img/examples/08_basic_interconnection_modelling/skrf_plot_short.jpg differ diff --git a/docs/examples/02_digital_design_simulation/02_digital_design_simulation.py b/docs/examples/02_digital_design_simulation/02_digital_design_simulation.py index dc1c512f..8bf217bf 100644 --- a/docs/examples/02_digital_design_simulation/02_digital_design_simulation.py +++ b/docs/examples/02_digital_design_simulation/02_digital_design_simulation.py @@ -350,38 +350,41 @@ # ## Sequential Implementation # + -from openlane.flows import SequentialFlow -from openlane.steps import Yosys, OpenROAD, Magic, Netgen - - -class MyFlow(SequentialFlow): - Steps = [ - Yosys.Synthesis, - OpenROAD.Floorplan, - OpenROAD.TapEndcapInsertion, - OpenROAD.GeneratePDN, - OpenROAD.IOPlacement, - OpenROAD.GlobalPlacement, - OpenROAD.DetailedPlacement, - OpenROAD.GlobalRouting, - OpenROAD.DetailedRouting, - OpenROAD.FillInsertion, - Magic.StreamOut, - Magic.DRC, - Magic.SpiceExtraction, - Netgen.LVS, - ] - - -flow = MyFlow( - { - "PDK": "sky130A", - "DESIGN_NAME": "spm", - "VERILOG_FILES": ["./src/spm.v"], - "CLOCK_PORT": "clk", - "CLOCK_PERIOD": 10, - }, - design_dir=".", -) -flow.start() +try: + from openlane.flows import SequentialFlow + from openlane.steps import Yosys, OpenROAD, Magic, Netgen + + class MyFlow(SequentialFlow): + Steps = [ + Yosys.Synthesis, + OpenROAD.Floorplan, + OpenROAD.TapEndcapInsertion, + OpenROAD.GeneratePDN, + OpenROAD.IOPlacement, + OpenROAD.GlobalPlacement, + OpenROAD.DetailedPlacement, + OpenROAD.GlobalRouting, + OpenROAD.DetailedRouting, + OpenROAD.FillInsertion, + Magic.StreamOut, + Magic.DRC, + Magic.SpiceExtraction, + Netgen.LVS, + ] + + flow = MyFlow( + { + "PDK": "sky130A", + "DESIGN_NAME": "spm", + "VERILOG_FILES": ["./src/spm.v"], + "CLOCK_PORT": "clk", + "CLOCK_PERIOD": 10, + }, + design_dir=".", + ) + flow.start() +except ModuleNotFoundError as e: + print( + f"Make sure you are running this from an environment with Openlane nix installed {e}" + ) # - diff --git a/docs/examples/04a_analogue_circuit_layout_simulation/example_inverter_auto.layout.yaml b/docs/examples/04a_analogue_circuit_layout_simulation/example_inverter_auto.layout.yaml index d4e4a3a8..2268d51b 100644 --- a/docs/examples/04a_analogue_circuit_layout_simulation/example_inverter_auto.layout.yaml +++ b/docs/examples/04a_analogue_circuit_layout_simulation/example_inverter_auto.layout.yaml @@ -75,4 +75,132 @@ routes: routing_strategy: get_bundle settings: {cross_section: xs_metal1, separation: 5.0} links: {'ns,SOURCE': 'ps,DRAIN'} + r16: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,DRAIN': 'ns,SOURCE'} + r17: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,GATE': 'ns,GATE'} + r18: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,GATE': 'ps,GATE'} + r19: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,SOURCE': 'ps,DRAIN'} + r20: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,DRAIN': 'ns,SOURCE'} + r21: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,GATE': 'ns,GATE'} + r22: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,GATE': 'ps,GATE'} + r23: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,SOURCE': 'ps,DRAIN'} + r24: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,DRAIN': 'ns,SOURCE'} + r25: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,GATE': 'ns,GATE'} + r26: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,GATE': 'ps,GATE'} + r27: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,SOURCE': 'ps,DRAIN'} + r28: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,DRAIN': 'ns,SOURCE'} + r29: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,GATE': 'ns,GATE'} + r30: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,GATE': 'ps,GATE'} + r31: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,SOURCE': 'ps,DRAIN'} + r32: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,DRAIN': 'ns,SOURCE'} + r33: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,GATE': 'ns,GATE'} + r34: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,GATE': 'ps,GATE'} + r35: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,SOURCE': 'ps,DRAIN'} + r36: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,DRAIN': 'ns,SOURCE'} + r37: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,GATE': 'ns,GATE'} + r38: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,GATE': 'ps,GATE'} + r39: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,SOURCE': 'ps,DRAIN'} + r40: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,DRAIN': 'ns,SOURCE'} + r41: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,GATE': 'ns,GATE'} + r42: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,GATE': 'ps,GATE'} + r43: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,SOURCE': 'ps,DRAIN'} + r44: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,DRAIN': 'ns,SOURCE'} + r45: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,GATE': 'ns,GATE'} + r46: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,GATE': 'ps,GATE'} + r47: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,SOURCE': 'ps,DRAIN'} ports: {} diff --git a/docs/examples/04a_analogue_circuit_layout_simulation/example_inverter_auto.schem.yaml b/docs/examples/04a_analogue_circuit_layout_simulation/example_inverter_auto.schem.yaml index cf545fa0..55135860 100644 --- a/docs/examples/04a_analogue_circuit_layout_simulation/example_inverter_auto.schem.yaml +++ b/docs/examples/04a_analogue_circuit_layout_simulation/example_inverter_auto.schem.yaml @@ -26,5 +26,37 @@ nets: - ['ps,GATE', 'ns,GATE'] - ['ns,GATE', 'ps,GATE'] - ['ns,SOURCE', 'ps,DRAIN'] +- ['ps,DRAIN', 'ns,SOURCE'] +- ['ps,GATE', 'ns,GATE'] +- ['ns,GATE', 'ps,GATE'] +- ['ns,SOURCE', 'ps,DRAIN'] +- ['ps,DRAIN', 'ns,SOURCE'] +- ['ps,GATE', 'ns,GATE'] +- ['ns,GATE', 'ps,GATE'] +- ['ns,SOURCE', 'ps,DRAIN'] +- ['ps,DRAIN', 'ns,SOURCE'] +- ['ps,GATE', 'ns,GATE'] +- ['ns,GATE', 'ps,GATE'] +- ['ns,SOURCE', 'ps,DRAIN'] +- ['ps,DRAIN', 'ns,SOURCE'] +- ['ps,GATE', 'ns,GATE'] +- ['ns,GATE', 'ps,GATE'] +- ['ns,SOURCE', 'ps,DRAIN'] +- ['ps,DRAIN', 'ns,SOURCE'] +- ['ps,GATE', 'ns,GATE'] +- ['ns,GATE', 'ps,GATE'] +- ['ns,SOURCE', 'ps,DRAIN'] +- ['ps,DRAIN', 'ns,SOURCE'] +- ['ps,GATE', 'ns,GATE'] +- ['ns,GATE', 'ps,GATE'] +- ['ns,SOURCE', 'ps,DRAIN'] +- ['ps,DRAIN', 'ns,SOURCE'] +- ['ps,GATE', 'ns,GATE'] +- ['ns,GATE', 'ps,GATE'] +- ['ns,SOURCE', 'ps,DRAIN'] +- ['ps,DRAIN', 'ns,SOURCE'] +- ['ps,GATE', 'ns,GATE'] +- ['ns,GATE', 'ps,GATE'] +- ['ns,SOURCE', 'ps,DRAIN'] ports: {} schema_version: 1 diff --git a/docs/examples/04a_analogue_circuit_layout_simulation/rladder.layout.yaml b/docs/examples/04a_analogue_circuit_layout_simulation/rladder.layout.yaml index d4e4a3a8..2268d51b 100644 --- a/docs/examples/04a_analogue_circuit_layout_simulation/rladder.layout.yaml +++ b/docs/examples/04a_analogue_circuit_layout_simulation/rladder.layout.yaml @@ -75,4 +75,132 @@ routes: routing_strategy: get_bundle settings: {cross_section: xs_metal1, separation: 5.0} links: {'ns,SOURCE': 'ps,DRAIN'} + r16: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,DRAIN': 'ns,SOURCE'} + r17: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,GATE': 'ns,GATE'} + r18: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,GATE': 'ps,GATE'} + r19: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,SOURCE': 'ps,DRAIN'} + r20: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,DRAIN': 'ns,SOURCE'} + r21: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,GATE': 'ns,GATE'} + r22: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,GATE': 'ps,GATE'} + r23: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,SOURCE': 'ps,DRAIN'} + r24: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,DRAIN': 'ns,SOURCE'} + r25: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,GATE': 'ns,GATE'} + r26: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,GATE': 'ps,GATE'} + r27: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,SOURCE': 'ps,DRAIN'} + r28: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,DRAIN': 'ns,SOURCE'} + r29: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,GATE': 'ns,GATE'} + r30: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,GATE': 'ps,GATE'} + r31: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,SOURCE': 'ps,DRAIN'} + r32: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,DRAIN': 'ns,SOURCE'} + r33: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,GATE': 'ns,GATE'} + r34: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,GATE': 'ps,GATE'} + r35: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,SOURCE': 'ps,DRAIN'} + r36: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,DRAIN': 'ns,SOURCE'} + r37: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,GATE': 'ns,GATE'} + r38: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,GATE': 'ps,GATE'} + r39: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,SOURCE': 'ps,DRAIN'} + r40: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,DRAIN': 'ns,SOURCE'} + r41: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,GATE': 'ns,GATE'} + r42: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,GATE': 'ps,GATE'} + r43: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,SOURCE': 'ps,DRAIN'} + r44: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,DRAIN': 'ns,SOURCE'} + r45: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ps,GATE': 'ns,GATE'} + r46: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,GATE': 'ps,GATE'} + r47: + routing_strategy: get_bundle + settings: {cross_section: xs_metal1, separation: 5.0} + links: {'ns,SOURCE': 'ps,DRAIN'} ports: {} diff --git a/docs/examples/04a_analogue_circuit_layout_simulation/rladder.schem.yaml b/docs/examples/04a_analogue_circuit_layout_simulation/rladder.schem.yaml index 863eedaf..091c1d29 100644 --- a/docs/examples/04a_analogue_circuit_layout_simulation/rladder.schem.yaml +++ b/docs/examples/04a_analogue_circuit_layout_simulation/rladder.schem.yaml @@ -504,5 +504,229 @@ nets: - ['runits_13,p', 'runits_0,p'] - ['runits_13,n', 'runits_0,p'] - ['runits_14,n', 'runits_0,p'] +- ['runits_0,p', 'runits_1,p'] +- ['runits_1,p', 'runits_0,p'] +- ['runits_1,n', 'runits_0,p'] +- ['runits_2,p', 'runits_0,p'] +- ['runits_2,n', 'runits_0,p'] +- ['runits_3,p', 'runits_0,p'] +- ['runits_3,n', 'runits_0,p'] +- ['runits_4,p', 'runits_0,p'] +- ['runits_4,n', 'runits_0,p'] +- ['runits_5,p', 'runits_0,p'] +- ['runits_5,n', 'runits_0,p'] +- ['runits_6,p', 'runits_0,p'] +- ['runits_6,n', 'runits_0,p'] +- ['runits_7,p', 'runits_0,p'] +- ['runits_7,n', 'runits_0,p'] +- ['runits_8,p', 'runits_0,p'] +- ['runits_8,n', 'runits_0,p'] +- ['runits_9,p', 'runits_0,p'] +- ['runits_9,n', 'runits_0,p'] +- ['runits_10,p', 'runits_0,p'] +- ['runits_10,n', 'runits_0,p'] +- ['runits_11,p', 'runits_0,p'] +- ['runits_11,n', 'runits_0,p'] +- ['runits_12,p', 'runits_0,p'] +- ['runits_12,n', 'runits_0,p'] +- ['runits_13,p', 'runits_0,p'] +- ['runits_13,n', 'runits_0,p'] +- ['runits_14,n', 'runits_0,p'] +- ['runits_0,p', 'runits_1,p'] +- ['runits_1,p', 'runits_0,p'] +- ['runits_1,n', 'runits_0,p'] +- ['runits_2,p', 'runits_0,p'] +- ['runits_2,n', 'runits_0,p'] +- ['runits_3,p', 'runits_0,p'] +- ['runits_3,n', 'runits_0,p'] +- ['runits_4,p', 'runits_0,p'] +- ['runits_4,n', 'runits_0,p'] +- ['runits_5,p', 'runits_0,p'] +- ['runits_5,n', 'runits_0,p'] +- ['runits_6,p', 'runits_0,p'] +- ['runits_6,n', 'runits_0,p'] +- ['runits_7,p', 'runits_0,p'] +- ['runits_7,n', 'runits_0,p'] +- ['runits_8,p', 'runits_0,p'] +- ['runits_8,n', 'runits_0,p'] +- ['runits_9,p', 'runits_0,p'] +- ['runits_9,n', 'runits_0,p'] +- ['runits_10,p', 'runits_0,p'] +- ['runits_10,n', 'runits_0,p'] +- ['runits_11,p', 'runits_0,p'] +- ['runits_11,n', 'runits_0,p'] +- ['runits_12,p', 'runits_0,p'] +- ['runits_12,n', 'runits_0,p'] +- ['runits_13,p', 'runits_0,p'] +- ['runits_13,n', 'runits_0,p'] +- ['runits_14,n', 'runits_0,p'] +- ['runits_0,p', 'runits_1,p'] +- ['runits_1,p', 'runits_0,p'] +- ['runits_1,n', 'runits_0,p'] +- ['runits_2,p', 'runits_0,p'] +- ['runits_2,n', 'runits_0,p'] +- ['runits_3,p', 'runits_0,p'] +- ['runits_3,n', 'runits_0,p'] +- ['runits_4,p', 'runits_0,p'] +- ['runits_4,n', 'runits_0,p'] +- ['runits_5,p', 'runits_0,p'] +- ['runits_5,n', 'runits_0,p'] +- ['runits_6,p', 'runits_0,p'] +- ['runits_6,n', 'runits_0,p'] +- ['runits_7,p', 'runits_0,p'] +- ['runits_7,n', 'runits_0,p'] +- ['runits_8,p', 'runits_0,p'] +- ['runits_8,n', 'runits_0,p'] +- ['runits_9,p', 'runits_0,p'] +- ['runits_9,n', 'runits_0,p'] +- ['runits_10,p', 'runits_0,p'] +- ['runits_10,n', 'runits_0,p'] +- ['runits_11,p', 'runits_0,p'] +- ['runits_11,n', 'runits_0,p'] +- ['runits_12,p', 'runits_0,p'] +- ['runits_12,n', 'runits_0,p'] +- ['runits_13,p', 'runits_0,p'] +- ['runits_13,n', 'runits_0,p'] +- ['runits_14,n', 'runits_0,p'] +- ['runits_0,p', 'runits_1,p'] +- ['runits_1,p', 'runits_0,p'] +- ['runits_1,n', 'runits_0,p'] +- ['runits_2,p', 'runits_0,p'] +- ['runits_2,n', 'runits_0,p'] +- ['runits_3,p', 'runits_0,p'] +- ['runits_3,n', 'runits_0,p'] +- ['runits_4,p', 'runits_0,p'] +- ['runits_4,n', 'runits_0,p'] +- ['runits_5,p', 'runits_0,p'] +- ['runits_5,n', 'runits_0,p'] +- ['runits_6,p', 'runits_0,p'] +- ['runits_6,n', 'runits_0,p'] +- ['runits_7,p', 'runits_0,p'] +- ['runits_7,n', 'runits_0,p'] +- ['runits_8,p', 'runits_0,p'] +- ['runits_8,n', 'runits_0,p'] +- ['runits_9,p', 'runits_0,p'] +- ['runits_9,n', 'runits_0,p'] +- ['runits_10,p', 'runits_0,p'] +- ['runits_10,n', 'runits_0,p'] +- ['runits_11,p', 'runits_0,p'] +- ['runits_11,n', 'runits_0,p'] +- ['runits_12,p', 'runits_0,p'] +- ['runits_12,n', 'runits_0,p'] +- ['runits_13,p', 'runits_0,p'] +- ['runits_13,n', 'runits_0,p'] +- ['runits_14,n', 'runits_0,p'] +- ['runits_0,p', 'runits_1,p'] +- ['runits_1,p', 'runits_0,p'] +- ['runits_1,n', 'runits_0,p'] +- ['runits_2,p', 'runits_0,p'] +- ['runits_2,n', 'runits_0,p'] +- ['runits_3,p', 'runits_0,p'] +- ['runits_3,n', 'runits_0,p'] +- ['runits_4,p', 'runits_0,p'] +- ['runits_4,n', 'runits_0,p'] +- ['runits_5,p', 'runits_0,p'] +- ['runits_5,n', 'runits_0,p'] +- ['runits_6,p', 'runits_0,p'] +- ['runits_6,n', 'runits_0,p'] +- ['runits_7,p', 'runits_0,p'] +- ['runits_7,n', 'runits_0,p'] +- ['runits_8,p', 'runits_0,p'] +- ['runits_8,n', 'runits_0,p'] +- ['runits_9,p', 'runits_0,p'] +- ['runits_9,n', 'runits_0,p'] +- ['runits_10,p', 'runits_0,p'] +- ['runits_10,n', 'runits_0,p'] +- ['runits_11,p', 'runits_0,p'] +- ['runits_11,n', 'runits_0,p'] +- ['runits_12,p', 'runits_0,p'] +- ['runits_12,n', 'runits_0,p'] +- ['runits_13,p', 'runits_0,p'] +- ['runits_13,n', 'runits_0,p'] +- ['runits_14,n', 'runits_0,p'] +- ['runits_0,p', 'runits_1,p'] +- ['runits_1,p', 'runits_0,p'] +- ['runits_1,n', 'runits_0,p'] +- ['runits_2,p', 'runits_0,p'] +- ['runits_2,n', 'runits_0,p'] +- ['runits_3,p', 'runits_0,p'] +- ['runits_3,n', 'runits_0,p'] +- ['runits_4,p', 'runits_0,p'] +- ['runits_4,n', 'runits_0,p'] +- ['runits_5,p', 'runits_0,p'] +- ['runits_5,n', 'runits_0,p'] +- ['runits_6,p', 'runits_0,p'] +- ['runits_6,n', 'runits_0,p'] +- ['runits_7,p', 'runits_0,p'] +- ['runits_7,n', 'runits_0,p'] +- ['runits_8,p', 'runits_0,p'] +- ['runits_8,n', 'runits_0,p'] +- ['runits_9,p', 'runits_0,p'] +- ['runits_9,n', 'runits_0,p'] +- ['runits_10,p', 'runits_0,p'] +- ['runits_10,n', 'runits_0,p'] +- ['runits_11,p', 'runits_0,p'] +- ['runits_11,n', 'runits_0,p'] +- ['runits_12,p', 'runits_0,p'] +- ['runits_12,n', 'runits_0,p'] +- ['runits_13,p', 'runits_0,p'] +- ['runits_13,n', 'runits_0,p'] +- ['runits_14,n', 'runits_0,p'] +- ['runits_0,p', 'runits_1,p'] +- ['runits_1,p', 'runits_0,p'] +- ['runits_1,n', 'runits_0,p'] +- ['runits_2,p', 'runits_0,p'] +- ['runits_2,n', 'runits_0,p'] +- ['runits_3,p', 'runits_0,p'] +- ['runits_3,n', 'runits_0,p'] +- ['runits_4,p', 'runits_0,p'] +- ['runits_4,n', 'runits_0,p'] +- ['runits_5,p', 'runits_0,p'] +- ['runits_5,n', 'runits_0,p'] +- ['runits_6,p', 'runits_0,p'] +- ['runits_6,n', 'runits_0,p'] +- ['runits_7,p', 'runits_0,p'] +- ['runits_7,n', 'runits_0,p'] +- ['runits_8,p', 'runits_0,p'] +- ['runits_8,n', 'runits_0,p'] +- ['runits_9,p', 'runits_0,p'] +- ['runits_9,n', 'runits_0,p'] +- ['runits_10,p', 'runits_0,p'] +- ['runits_10,n', 'runits_0,p'] +- ['runits_11,p', 'runits_0,p'] +- ['runits_11,n', 'runits_0,p'] +- ['runits_12,p', 'runits_0,p'] +- ['runits_12,n', 'runits_0,p'] +- ['runits_13,p', 'runits_0,p'] +- ['runits_13,n', 'runits_0,p'] +- ['runits_14,n', 'runits_0,p'] +- ['runits_0,p', 'runits_1,p'] +- ['runits_1,p', 'runits_0,p'] +- ['runits_1,n', 'runits_0,p'] +- ['runits_2,p', 'runits_0,p'] +- ['runits_2,n', 'runits_0,p'] +- ['runits_3,p', 'runits_0,p'] +- ['runits_3,n', 'runits_0,p'] +- ['runits_4,p', 'runits_0,p'] +- ['runits_4,n', 'runits_0,p'] +- ['runits_5,p', 'runits_0,p'] +- ['runits_5,n', 'runits_0,p'] +- ['runits_6,p', 'runits_0,p'] +- ['runits_6,n', 'runits_0,p'] +- ['runits_7,p', 'runits_0,p'] +- ['runits_7,n', 'runits_0,p'] +- ['runits_8,p', 'runits_0,p'] +- ['runits_8,n', 'runits_0,p'] +- ['runits_9,p', 'runits_0,p'] +- ['runits_9,n', 'runits_0,p'] +- ['runits_10,p', 'runits_0,p'] +- ['runits_10,n', 'runits_0,p'] +- ['runits_11,p', 'runits_0,p'] +- ['runits_11,n', 'runits_0,p'] +- ['runits_12,p', 'runits_0,p'] +- ['runits_12,n', 'runits_0,p'] +- ['runits_13,p', 'runits_0,p'] +- ['runits_13,n', 'runits_0,p'] +- ['runits_14,n', 'runits_0,p'] ports: {} schema_version: 1 diff --git a/docs/examples/06a_analytical_mzm_model.py b/docs/examples/06a_analytical_mzm_model.py index 20c3772d..50f94ddb 100644 --- a/docs/examples/06a_analytical_mzm_model.py +++ b/docs/examples/06a_analytical_mzm_model.py @@ -64,7 +64,6 @@ # \end{equation} # # An implementation of this coupler in an integrated photonics platform using `gdsfactory` is shown in the image below. Note that the equation notation above matches that within the `gds` implementation: - from gdsfactory.components import mmi1x2 mmi1x2().plot() @@ -73,7 +72,7 @@ # The numerical implementation of this transfer matrix in `sax` is, for a 50:50 splitter is: -piel.models.frequency.photonic.mmi1x2.mmi1x2_50_50() +piel.models.frequency.photonic.mmi1x2_50_50() # ```python # {('o1', 'o2'): 0.7071067811865476, @@ -83,12 +82,12 @@ # ``` mmi1x2_transfer_matrix = piel.tools.sax.sax_to_s_parameters_standard_matrix( - piel.models.frequency.photonic.mmi1x2.mmi1x2_50_50(), + piel.models.frequency.photonic.mmi1x2_50_50(), input_ports_order=("o1",), ) mmi1x2_transfer_matrix -piel.models.frequency.photonic.mmi1x2.mmi1x2(splitting_ratio=0.4) +piel.models.frequency.photonic.mmi1x2(splitting_ratio=0.4) # ```python # {('o1', 'o2'): 0.6324555320336759, @@ -127,7 +126,7 @@ # ![mmi_2x2](../_static/img/examples/06a_analytical_mzm_model/mmi_2x2.png) mmi2x2_transfer_matrix = piel.tools.sax.sax_to_s_parameters_standard_matrix( - piel.models.frequency.photonic.mmi2x2.mmi2x2(splitting_ratio=0.5), + piel.models.frequency.photonic.mmi2x2(splitting_ratio=0.5), input_ports_order=("o2", "o1"), ) mmi2x2_transfer_matrix @@ -139,7 +138,7 @@ # ``` piel.tools.sax.sax_to_s_parameters_standard_matrix( - piel.models.frequency.photonic.mmi2x2.mmi2x2(splitting_ratio=0.4), + piel.models.frequency.photonic.mmi2x2(splitting_ratio=0.4), input_ports_order=("o2", "o1"), ) diff --git a/docs/examples/08_basic_interconnection_modelling/08_basic_interconnection_modelling.py b/docs/examples/08_basic_interconnection_modelling/08_basic_interconnection_modelling.py index 57d73e09..6311ff23 100644 --- a/docs/examples/08_basic_interconnection_modelling/08_basic_interconnection_modelling.py +++ b/docs/examples/08_basic_interconnection_modelling/08_basic_interconnection_modelling.py @@ -190,15 +190,15 @@ # Let's compose the experiment into a correct format. First let's create our components. -short_1port = pe.models.short_85052D() -load_1port = pe.models.load_85052D() -open_1port = pe.models.load_85052D() -throguh_2port = pe.models.through_85052D() +short_1port = piel.models.physical.electrical.short_85052D() +load_1port = piel.models.physical.electrical.load_85052D() +open_1port = piel.models.physical.electrical.load_85052D() +throguh_2port = piel.models.physical.electrical.through_85052D() # We can create our `VNA` and a standard configuration too: vna_configuration = pe.types.VNAConfiguration(calibration_setting_name="bpl_vna_ports") -vna = pe.models.E8364A(configuration=vna_configuration) +vna = piel.models.physical.electrical.E8364A(configuration=vna_configuration) vna_configuration diff --git a/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/0/instance.json b/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/0/instance.json index df620d63..1444cba3 100644 --- a/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/0/instance.json +++ b/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/0/instance.json @@ -1,15 +1,19 @@ { "name": "through_port_12", + "attrs": {}, "components": [ { "name": "through_82052D", + "attrs": {}, "ports": [ { "name": "IN", + "attrs": {}, "parent_component_name": "" }, { "name": "OUT", + "attrs": {}, "parent_component_name": "" } ], @@ -18,9 +22,11 @@ }, { "name": "E8364A", + "attrs": {}, "ports": [ { "name": "PORT1", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -28,6 +34,7 @@ }, { "name": "PORT2", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -36,7 +43,10 @@ ], "connections": [], "components": [], - "environment": null, + "environment": { + "temperature_K": null, + "region": null + }, "manufacturer": "Agilent", "model": "E8364A" } @@ -44,29 +54,63 @@ "connections": [ { "name": "", + "attrs": {}, "ports": [ { "name": "PORT1", + "attrs": {}, "parent_component_name": "" }, { "name": "IN", + "attrs": {}, "parent_component_name": "" } - ] + ], + "time": { + "name": "", + "attrs": {}, + "value": 0, + "mean": 0, + "min": 0, + "max": 0, + "standard_deviation": 0, + "unit": { + "name": "second", + "datum": "second", + "base": 1 + } + } }, { "name": "", + "attrs": {}, "ports": [ { "name": "PORT2", + "attrs": {}, "parent_component_name": "" }, { "name": "OUT", + "attrs": {}, "parent_component_name": "" } - ] + ], + "time": { + "name": "", + "attrs": {}, + "value": 0, + "mean": 0, + "min": 0, + "max": 0, + "standard_deviation": 0, + "unit": { + "name": "second", + "datum": "second", + "base": 1 + } + } } ], "goal": "", @@ -77,6 +121,7 @@ "measurement_configuration_list": [ { "name": "", + "attrs": {}, "parent_directory": "", "measurement_type": "", "measurement_configuration_type": "VNASParameterMeasurementConfiguration", diff --git a/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/1/instance.json b/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/1/instance.json index b108200d..46ccda21 100644 --- a/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/1/instance.json +++ b/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/1/instance.json @@ -1,11 +1,14 @@ { "name": "open_port_1", + "attrs": {}, "components": [ { "name": "load_82052D", + "attrs": {}, "ports": [ { "name": "IN", + "attrs": {}, "parent_component_name": "" } ], @@ -14,9 +17,11 @@ }, { "name": "E8364A", + "attrs": {}, "ports": [ { "name": "PORT1", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -24,6 +29,7 @@ }, { "name": "PORT2", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -32,7 +38,10 @@ ], "connections": [], "components": [], - "environment": null, + "environment": { + "temperature_K": null, + "region": null + }, "manufacturer": "Agilent", "model": "E8364A" } @@ -40,16 +49,33 @@ "connections": [ { "name": "", + "attrs": {}, "ports": [ { "name": "PORT1", + "attrs": {}, "parent_component_name": "" }, { "name": "IN", + "attrs": {}, "parent_component_name": "" } - ] + ], + "time": { + "name": "", + "attrs": {}, + "value": 0, + "mean": 0, + "min": 0, + "max": 0, + "standard_deviation": 0, + "unit": { + "name": "second", + "datum": "second", + "base": 1 + } + } } ], "goal": "", @@ -60,6 +86,7 @@ "measurement_configuration_list": [ { "name": "", + "attrs": {}, "parent_directory": "", "measurement_type": "", "measurement_configuration_type": "VNASParameterMeasurementConfiguration", diff --git a/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/2/instance.json b/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/2/instance.json index db4af462..d93fb22c 100644 --- a/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/2/instance.json +++ b/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/2/instance.json @@ -1,11 +1,14 @@ { "name": "open_port_2", + "attrs": {}, "components": [ { "name": "load_82052D", + "attrs": {}, "ports": [ { "name": "IN", + "attrs": {}, "parent_component_name": "" } ], @@ -14,9 +17,11 @@ }, { "name": "E8364A", + "attrs": {}, "ports": [ { "name": "PORT1", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -24,6 +29,7 @@ }, { "name": "PORT2", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -32,7 +38,10 @@ ], "connections": [], "components": [], - "environment": null, + "environment": { + "temperature_K": null, + "region": null + }, "manufacturer": "Agilent", "model": "E8364A" } @@ -40,16 +49,33 @@ "connections": [ { "name": "", + "attrs": {}, "ports": [ { "name": "PORT2", + "attrs": {}, "parent_component_name": "" }, { "name": "IN", + "attrs": {}, "parent_component_name": "" } - ] + ], + "time": { + "name": "", + "attrs": {}, + "value": 0, + "mean": 0, + "min": 0, + "max": 0, + "standard_deviation": 0, + "unit": { + "name": "second", + "datum": "second", + "base": 1 + } + } } ], "goal": "", @@ -60,6 +86,7 @@ "measurement_configuration_list": [ { "name": "", + "attrs": {}, "parent_directory": "", "measurement_type": "", "measurement_configuration_type": "VNASParameterMeasurementConfiguration", diff --git a/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/3/instance.json b/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/3/instance.json index f0b26a4d..b20e8164 100644 --- a/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/3/instance.json +++ b/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/3/instance.json @@ -1,11 +1,14 @@ { "name": "load_port_1", + "attrs": {}, "components": [ { "name": "load_82052D", + "attrs": {}, "ports": [ { "name": "IN", + "attrs": {}, "parent_component_name": "" } ], @@ -14,9 +17,11 @@ }, { "name": "E8364A", + "attrs": {}, "ports": [ { "name": "PORT1", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -24,6 +29,7 @@ }, { "name": "PORT2", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -32,7 +38,10 @@ ], "connections": [], "components": [], - "environment": null, + "environment": { + "temperature_K": null, + "region": null + }, "manufacturer": "Agilent", "model": "E8364A" } @@ -40,16 +49,33 @@ "connections": [ { "name": "", + "attrs": {}, "ports": [ { "name": "PORT1", + "attrs": {}, "parent_component_name": "" }, { "name": "IN", + "attrs": {}, "parent_component_name": "" } - ] + ], + "time": { + "name": "", + "attrs": {}, + "value": 0, + "mean": 0, + "min": 0, + "max": 0, + "standard_deviation": 0, + "unit": { + "name": "second", + "datum": "second", + "base": 1 + } + } } ], "goal": "", @@ -60,6 +86,7 @@ "measurement_configuration_list": [ { "name": "", + "attrs": {}, "parent_directory": "", "measurement_type": "", "measurement_configuration_type": "VNASParameterMeasurementConfiguration", diff --git a/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/4/instance.json b/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/4/instance.json index 7327116b..f7505444 100644 --- a/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/4/instance.json +++ b/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/4/instance.json @@ -1,11 +1,14 @@ { "name": "load_port_2", + "attrs": {}, "components": [ { "name": "load_82052D", + "attrs": {}, "ports": [ { "name": "IN", + "attrs": {}, "parent_component_name": "" } ], @@ -14,9 +17,11 @@ }, { "name": "E8364A", + "attrs": {}, "ports": [ { "name": "PORT1", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -24,6 +29,7 @@ }, { "name": "PORT2", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -32,7 +38,10 @@ ], "connections": [], "components": [], - "environment": null, + "environment": { + "temperature_K": null, + "region": null + }, "manufacturer": "Agilent", "model": "E8364A" } @@ -40,16 +49,33 @@ "connections": [ { "name": "", + "attrs": {}, "ports": [ { "name": "PORT2", + "attrs": {}, "parent_component_name": "" }, { "name": "IN", + "attrs": {}, "parent_component_name": "" } - ] + ], + "time": { + "name": "", + "attrs": {}, + "value": 0, + "mean": 0, + "min": 0, + "max": 0, + "standard_deviation": 0, + "unit": { + "name": "second", + "datum": "second", + "base": 1 + } + } } ], "goal": "", @@ -60,6 +86,7 @@ "measurement_configuration_list": [ { "name": "", + "attrs": {}, "parent_directory": "", "measurement_type": "", "measurement_configuration_type": "VNASParameterMeasurementConfiguration", diff --git a/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/5/instance.json b/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/5/instance.json index 43b18033..fd89a22f 100644 --- a/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/5/instance.json +++ b/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/5/instance.json @@ -1,11 +1,14 @@ { "name": "short_port_1", + "attrs": {}, "components": [ { "name": "short_85052D", + "attrs": {}, "ports": [ { "name": "IN", + "attrs": {}, "parent_component_name": "" } ], @@ -14,9 +17,11 @@ }, { "name": "E8364A", + "attrs": {}, "ports": [ { "name": "PORT1", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -24,6 +29,7 @@ }, { "name": "PORT2", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -32,7 +38,10 @@ ], "connections": [], "components": [], - "environment": null, + "environment": { + "temperature_K": null, + "region": null + }, "manufacturer": "Agilent", "model": "E8364A" } @@ -40,16 +49,33 @@ "connections": [ { "name": "", + "attrs": {}, "ports": [ { "name": "PORT1", + "attrs": {}, "parent_component_name": "" }, { "name": "IN", + "attrs": {}, "parent_component_name": "" } - ] + ], + "time": { + "name": "", + "attrs": {}, + "value": 0, + "mean": 0, + "min": 0, + "max": 0, + "standard_deviation": 0, + "unit": { + "name": "second", + "datum": "second", + "base": 1 + } + } } ], "goal": "", @@ -60,6 +86,7 @@ "measurement_configuration_list": [ { "name": "", + "attrs": {}, "parent_directory": "", "measurement_type": "", "measurement_configuration_type": "VNASParameterMeasurementConfiguration", diff --git a/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/6/instance.json b/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/6/instance.json index 4d1a4987..d04d19b4 100644 --- a/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/6/instance.json +++ b/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/6/instance.json @@ -1,11 +1,14 @@ { "name": "short_port_2", + "attrs": {}, "components": [ { "name": "short_85052D", + "attrs": {}, "ports": [ { "name": "IN", + "attrs": {}, "parent_component_name": "" } ], @@ -14,9 +17,11 @@ }, { "name": "E8364A", + "attrs": {}, "ports": [ { "name": "PORT1", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -24,6 +29,7 @@ }, { "name": "PORT2", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -32,7 +38,10 @@ ], "connections": [], "components": [], - "environment": null, + "environment": { + "temperature_K": null, + "region": null + }, "manufacturer": "Agilent", "model": "E8364A" } @@ -40,16 +49,33 @@ "connections": [ { "name": "", + "attrs": {}, "ports": [ { "name": "PORT2", + "attrs": {}, "parent_component_name": "" }, { "name": "IN", + "attrs": {}, "parent_component_name": "" } - ] + ], + "time": { + "name": "", + "attrs": {}, + "value": 0, + "mean": 0, + "min": 0, + "max": 0, + "standard_deviation": 0, + "unit": { + "name": "second", + "datum": "second", + "base": 1 + } + } } ], "goal": "", @@ -60,6 +86,7 @@ "measurement_configuration_list": [ { "name": "", + "attrs": {}, "parent_directory": "", "measurement_type": "", "measurement_configuration_type": "VNASParameterMeasurementConfiguration", diff --git a/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/SETUP.md b/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/SETUP.md index e383e18d..8dc389b6 100644 --- a/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/SETUP.md +++ b/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/SETUP.md @@ -12,436 +12,4 @@ | 3 | 1 | load | vna_ports | | 4 | 2 | load | vna_ports | | 5 | 1 | short | vna_ports | -| 6 | 2 | short | vna_ports | - -## Schema -- **name**: rf_vna_self_calibration -- **goal**: -- **experiment_instances**: - - - - **name**: through_port_12 - - **components**: - - - - **name**: through_82052D - - **ports**: - - - - **name**: IN - - **parent_component_name**: - - - - **name**: OUT - - **parent_component_name**: - - **connections**: - - **components**: - - - - **name**: E8364A - - **ports**: - - - - **name**: PORT1 - - **parent_component_name**: - - **domain**: RF - - **connector**: - - **manifold**: - - - - **name**: PORT2 - - **parent_component_name**: - - **domain**: RF - - **connector**: - - **manifold**: - - **connections**: - - **components**: - - **environment**: None - - **manufacturer**: Agilent - - **model**: E8364A - - **connections**: - - - - **name**: - - **ports**: - - - - **name**: PORT1 - - **parent_component_name**: - - - - **name**: IN - - **parent_component_name**: - - - - **name**: - - **ports**: - - - - **name**: PORT2 - - **parent_component_name**: - - - - **name**: OUT - - **parent_component_name**: - - **goal**: - - **parameters**: - - **index**: 0 - - **date_configured**: - - **date_measured**: - - **measurement_configuration_list**: - - - - **name**: - - **parent_directory**: - - **measurement_type**: - - **measurement_configuration_type**: VNASParameterMeasurementConfiguration - - **frequency_range_Hz**: - - **sweep_points**: 0 - - **test_port_power_dBm**: 0.0 - - - - **name**: open_port_1 - - **components**: - - - - **name**: load_82052D - - **ports**: - - - - **name**: IN - - **parent_component_name**: - - **connections**: - - **components**: - - - - **name**: E8364A - - **ports**: - - - - **name**: PORT1 - - **parent_component_name**: - - **domain**: RF - - **connector**: - - **manifold**: - - - - **name**: PORT2 - - **parent_component_name**: - - **domain**: RF - - **connector**: - - **manifold**: - - **connections**: - - **components**: - - **environment**: None - - **manufacturer**: Agilent - - **model**: E8364A - - **connections**: - - - - **name**: - - **ports**: - - - - **name**: PORT1 - - **parent_component_name**: - - - - **name**: IN - - **parent_component_name**: - - **goal**: - - **parameters**: - - **index**: 0 - - **date_configured**: - - **date_measured**: - - **measurement_configuration_list**: - - - - **name**: - - **parent_directory**: - - **measurement_type**: - - **measurement_configuration_type**: VNASParameterMeasurementConfiguration - - **frequency_range_Hz**: - - **sweep_points**: 0 - - **test_port_power_dBm**: 0.0 - - - - **name**: open_port_2 - - **components**: - - - - **name**: load_82052D - - **ports**: - - - - **name**: IN - - **parent_component_name**: - - **connections**: - - **components**: - - - - **name**: E8364A - - **ports**: - - - - **name**: PORT1 - - **parent_component_name**: - - **domain**: RF - - **connector**: - - **manifold**: - - - - **name**: PORT2 - - **parent_component_name**: - - **domain**: RF - - **connector**: - - **manifold**: - - **connections**: - - **components**: - - **environment**: None - - **manufacturer**: Agilent - - **model**: E8364A - - **connections**: - - - - **name**: - - **ports**: - - - - **name**: PORT2 - - **parent_component_name**: - - - - **name**: IN - - **parent_component_name**: - - **goal**: - - **parameters**: - - **index**: 0 - - **date_configured**: - - **date_measured**: - - **measurement_configuration_list**: - - - - **name**: - - **parent_directory**: - - **measurement_type**: - - **measurement_configuration_type**: VNASParameterMeasurementConfiguration - - **frequency_range_Hz**: - - **sweep_points**: 0 - - **test_port_power_dBm**: 0.0 - - - - **name**: load_port_1 - - **components**: - - - - **name**: load_82052D - - **ports**: - - - - **name**: IN - - **parent_component_name**: - - **connections**: - - **components**: - - - - **name**: E8364A - - **ports**: - - - - **name**: PORT1 - - **parent_component_name**: - - **domain**: RF - - **connector**: - - **manifold**: - - - - **name**: PORT2 - - **parent_component_name**: - - **domain**: RF - - **connector**: - - **manifold**: - - **connections**: - - **components**: - - **environment**: None - - **manufacturer**: Agilent - - **model**: E8364A - - **connections**: - - - - **name**: - - **ports**: - - - - **name**: PORT1 - - **parent_component_name**: - - - - **name**: IN - - **parent_component_name**: - - **goal**: - - **parameters**: - - **index**: 0 - - **date_configured**: - - **date_measured**: - - **measurement_configuration_list**: - - - - **name**: - - **parent_directory**: - - **measurement_type**: - - **measurement_configuration_type**: VNASParameterMeasurementConfiguration - - **frequency_range_Hz**: - - **sweep_points**: 0 - - **test_port_power_dBm**: 0.0 - - - - **name**: load_port_2 - - **components**: - - - - **name**: load_82052D - - **ports**: - - - - **name**: IN - - **parent_component_name**: - - **connections**: - - **components**: - - - - **name**: E8364A - - **ports**: - - - - **name**: PORT1 - - **parent_component_name**: - - **domain**: RF - - **connector**: - - **manifold**: - - - - **name**: PORT2 - - **parent_component_name**: - - **domain**: RF - - **connector**: - - **manifold**: - - **connections**: - - **components**: - - **environment**: None - - **manufacturer**: Agilent - - **model**: E8364A - - **connections**: - - - - **name**: - - **ports**: - - - - **name**: PORT2 - - **parent_component_name**: - - - - **name**: IN - - **parent_component_name**: - - **goal**: - - **parameters**: - - **index**: 0 - - **date_configured**: - - **date_measured**: - - **measurement_configuration_list**: - - - - **name**: - - **parent_directory**: - - **measurement_type**: - - **measurement_configuration_type**: VNASParameterMeasurementConfiguration - - **frequency_range_Hz**: - - **sweep_points**: 0 - - **test_port_power_dBm**: 0.0 - - - - **name**: short_port_1 - - **components**: - - - - **name**: short_85052D - - **ports**: - - - - **name**: IN - - **parent_component_name**: - - **connections**: - - **components**: - - - - **name**: E8364A - - **ports**: - - - - **name**: PORT1 - - **parent_component_name**: - - **domain**: RF - - **connector**: - - **manifold**: - - - - **name**: PORT2 - - **parent_component_name**: - - **domain**: RF - - **connector**: - - **manifold**: - - **connections**: - - **components**: - - **environment**: None - - **manufacturer**: Agilent - - **model**: E8364A - - **connections**: - - - - **name**: - - **ports**: - - - - **name**: PORT1 - - **parent_component_name**: - - - - **name**: IN - - **parent_component_name**: - - **goal**: - - **parameters**: - - **index**: 0 - - **date_configured**: - - **date_measured**: - - **measurement_configuration_list**: - - - - **name**: - - **parent_directory**: - - **measurement_type**: - - **measurement_configuration_type**: VNASParameterMeasurementConfiguration - - **frequency_range_Hz**: - - **sweep_points**: 0 - - **test_port_power_dBm**: 0.0 - - - - **name**: short_port_2 - - **components**: - - - - **name**: short_85052D - - **ports**: - - - - **name**: IN - - **parent_component_name**: - - **connections**: - - **components**: - - - - **name**: E8364A - - **ports**: - - - - **name**: PORT1 - - **parent_component_name**: - - **domain**: RF - - **connector**: - - **manifold**: - - - - **name**: PORT2 - - **parent_component_name**: - - **domain**: RF - - **connector**: - - **manifold**: - - **connections**: - - **components**: - - **environment**: None - - **manufacturer**: Agilent - - **model**: E8364A - - **connections**: - - - - **name**: - - **ports**: - - - - **name**: PORT2 - - **parent_component_name**: - - - - **name**: IN - - **parent_component_name**: - - **goal**: - - **parameters**: - - **index**: 0 - - **date_configured**: - - **date_measured**: - - **measurement_configuration_list**: - - - - **name**: - - **parent_directory**: - - **measurement_type**: - - **measurement_configuration_type**: VNASParameterMeasurementConfiguration - - **frequency_range_Hz**: - - **sweep_points**: 0 - - **test_port_power_dBm**: 0.0 -- **parameters_list**: - - - - **port**: 12 - - **measurement**: through - - **calibration**: vna_ports - - - - **port**: 1 - - **measurement**: open - - **calibration**: vna_ports - - - - **port**: 2 - - **measurement**: open - - **calibration**: vna_ports - - - - **port**: 1 - - **measurement**: load - - **calibration**: vna_ports - - - - **port**: 2 - - **measurement**: load - - **calibration**: vna_ports - - - - **port**: 1 - - **measurement**: short - - **calibration**: vna_ports - - - - **port**: 2 - - **measurement**: short - - **calibration**: vna_ports -- **parent_directory**: +| 6 | 2 | short | vna_ports | \ No newline at end of file diff --git a/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/experiment.json b/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/experiment.json index 4252f4c7..2510723d 100644 --- a/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/experiment.json +++ b/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/experiment.json @@ -1,19 +1,24 @@ { "name": "rf_vna_self_calibration", + "attrs": {}, "goal": "", "experiment_instances": [ { "name": "through_port_12", + "attrs": {}, "components": [ { "name": "through_82052D", + "attrs": {}, "ports": [ { "name": "IN", + "attrs": {}, "parent_component_name": "" }, { "name": "OUT", + "attrs": {}, "parent_component_name": "" } ], @@ -22,9 +27,11 @@ }, { "name": "E8364A", + "attrs": {}, "ports": [ { "name": "PORT1", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -32,6 +39,7 @@ }, { "name": "PORT2", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -40,7 +48,10 @@ ], "connections": [], "components": [], - "environment": null, + "environment": { + "temperature_K": null, + "region": null + }, "manufacturer": "Agilent", "model": "E8364A" } @@ -48,29 +59,63 @@ "connections": [ { "name": "", + "attrs": {}, "ports": [ { "name": "PORT1", + "attrs": {}, "parent_component_name": "" }, { "name": "IN", + "attrs": {}, "parent_component_name": "" } - ] + ], + "time": { + "name": "", + "attrs": {}, + "value": 0, + "mean": 0, + "min": 0, + "max": 0, + "standard_deviation": 0, + "unit": { + "name": "second", + "datum": "second", + "base": 1 + } + } }, { "name": "", + "attrs": {}, "ports": [ { "name": "PORT2", + "attrs": {}, "parent_component_name": "" }, { "name": "OUT", + "attrs": {}, "parent_component_name": "" } - ] + ], + "time": { + "name": "", + "attrs": {}, + "value": 0, + "mean": 0, + "min": 0, + "max": 0, + "standard_deviation": 0, + "unit": { + "name": "second", + "datum": "second", + "base": 1 + } + } } ], "goal": "", @@ -81,6 +126,7 @@ "measurement_configuration_list": [ { "name": "", + "attrs": {}, "parent_directory": "", "measurement_type": "", "measurement_configuration_type": "VNASParameterMeasurementConfiguration", @@ -92,12 +138,15 @@ }, { "name": "open_port_1", + "attrs": {}, "components": [ { "name": "load_82052D", + "attrs": {}, "ports": [ { "name": "IN", + "attrs": {}, "parent_component_name": "" } ], @@ -106,9 +155,11 @@ }, { "name": "E8364A", + "attrs": {}, "ports": [ { "name": "PORT1", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -116,6 +167,7 @@ }, { "name": "PORT2", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -124,7 +176,10 @@ ], "connections": [], "components": [], - "environment": null, + "environment": { + "temperature_K": null, + "region": null + }, "manufacturer": "Agilent", "model": "E8364A" } @@ -132,16 +187,33 @@ "connections": [ { "name": "", + "attrs": {}, "ports": [ { "name": "PORT1", + "attrs": {}, "parent_component_name": "" }, { "name": "IN", + "attrs": {}, "parent_component_name": "" } - ] + ], + "time": { + "name": "", + "attrs": {}, + "value": 0, + "mean": 0, + "min": 0, + "max": 0, + "standard_deviation": 0, + "unit": { + "name": "second", + "datum": "second", + "base": 1 + } + } } ], "goal": "", @@ -152,6 +224,7 @@ "measurement_configuration_list": [ { "name": "", + "attrs": {}, "parent_directory": "", "measurement_type": "", "measurement_configuration_type": "VNASParameterMeasurementConfiguration", @@ -163,12 +236,15 @@ }, { "name": "open_port_2", + "attrs": {}, "components": [ { "name": "load_82052D", + "attrs": {}, "ports": [ { "name": "IN", + "attrs": {}, "parent_component_name": "" } ], @@ -177,9 +253,11 @@ }, { "name": "E8364A", + "attrs": {}, "ports": [ { "name": "PORT1", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -187,6 +265,7 @@ }, { "name": "PORT2", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -195,7 +274,10 @@ ], "connections": [], "components": [], - "environment": null, + "environment": { + "temperature_K": null, + "region": null + }, "manufacturer": "Agilent", "model": "E8364A" } @@ -203,16 +285,33 @@ "connections": [ { "name": "", + "attrs": {}, "ports": [ { "name": "PORT2", + "attrs": {}, "parent_component_name": "" }, { "name": "IN", + "attrs": {}, "parent_component_name": "" } - ] + ], + "time": { + "name": "", + "attrs": {}, + "value": 0, + "mean": 0, + "min": 0, + "max": 0, + "standard_deviation": 0, + "unit": { + "name": "second", + "datum": "second", + "base": 1 + } + } } ], "goal": "", @@ -223,6 +322,7 @@ "measurement_configuration_list": [ { "name": "", + "attrs": {}, "parent_directory": "", "measurement_type": "", "measurement_configuration_type": "VNASParameterMeasurementConfiguration", @@ -234,12 +334,15 @@ }, { "name": "load_port_1", + "attrs": {}, "components": [ { "name": "load_82052D", + "attrs": {}, "ports": [ { "name": "IN", + "attrs": {}, "parent_component_name": "" } ], @@ -248,9 +351,11 @@ }, { "name": "E8364A", + "attrs": {}, "ports": [ { "name": "PORT1", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -258,6 +363,7 @@ }, { "name": "PORT2", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -266,7 +372,10 @@ ], "connections": [], "components": [], - "environment": null, + "environment": { + "temperature_K": null, + "region": null + }, "manufacturer": "Agilent", "model": "E8364A" } @@ -274,16 +383,33 @@ "connections": [ { "name": "", + "attrs": {}, "ports": [ { "name": "PORT1", + "attrs": {}, "parent_component_name": "" }, { "name": "IN", + "attrs": {}, "parent_component_name": "" } - ] + ], + "time": { + "name": "", + "attrs": {}, + "value": 0, + "mean": 0, + "min": 0, + "max": 0, + "standard_deviation": 0, + "unit": { + "name": "second", + "datum": "second", + "base": 1 + } + } } ], "goal": "", @@ -294,6 +420,7 @@ "measurement_configuration_list": [ { "name": "", + "attrs": {}, "parent_directory": "", "measurement_type": "", "measurement_configuration_type": "VNASParameterMeasurementConfiguration", @@ -305,12 +432,15 @@ }, { "name": "load_port_2", + "attrs": {}, "components": [ { "name": "load_82052D", + "attrs": {}, "ports": [ { "name": "IN", + "attrs": {}, "parent_component_name": "" } ], @@ -319,9 +449,11 @@ }, { "name": "E8364A", + "attrs": {}, "ports": [ { "name": "PORT1", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -329,6 +461,7 @@ }, { "name": "PORT2", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -337,7 +470,10 @@ ], "connections": [], "components": [], - "environment": null, + "environment": { + "temperature_K": null, + "region": null + }, "manufacturer": "Agilent", "model": "E8364A" } @@ -345,16 +481,33 @@ "connections": [ { "name": "", + "attrs": {}, "ports": [ { "name": "PORT2", + "attrs": {}, "parent_component_name": "" }, { "name": "IN", + "attrs": {}, "parent_component_name": "" } - ] + ], + "time": { + "name": "", + "attrs": {}, + "value": 0, + "mean": 0, + "min": 0, + "max": 0, + "standard_deviation": 0, + "unit": { + "name": "second", + "datum": "second", + "base": 1 + } + } } ], "goal": "", @@ -365,6 +518,7 @@ "measurement_configuration_list": [ { "name": "", + "attrs": {}, "parent_directory": "", "measurement_type": "", "measurement_configuration_type": "VNASParameterMeasurementConfiguration", @@ -376,12 +530,15 @@ }, { "name": "short_port_1", + "attrs": {}, "components": [ { "name": "short_85052D", + "attrs": {}, "ports": [ { "name": "IN", + "attrs": {}, "parent_component_name": "" } ], @@ -390,9 +547,11 @@ }, { "name": "E8364A", + "attrs": {}, "ports": [ { "name": "PORT1", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -400,6 +559,7 @@ }, { "name": "PORT2", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -408,7 +568,10 @@ ], "connections": [], "components": [], - "environment": null, + "environment": { + "temperature_K": null, + "region": null + }, "manufacturer": "Agilent", "model": "E8364A" } @@ -416,16 +579,33 @@ "connections": [ { "name": "", + "attrs": {}, "ports": [ { "name": "PORT1", + "attrs": {}, "parent_component_name": "" }, { "name": "IN", + "attrs": {}, "parent_component_name": "" } - ] + ], + "time": { + "name": "", + "attrs": {}, + "value": 0, + "mean": 0, + "min": 0, + "max": 0, + "standard_deviation": 0, + "unit": { + "name": "second", + "datum": "second", + "base": 1 + } + } } ], "goal": "", @@ -436,6 +616,7 @@ "measurement_configuration_list": [ { "name": "", + "attrs": {}, "parent_directory": "", "measurement_type": "", "measurement_configuration_type": "VNASParameterMeasurementConfiguration", @@ -447,12 +628,15 @@ }, { "name": "short_port_2", + "attrs": {}, "components": [ { "name": "short_85052D", + "attrs": {}, "ports": [ { "name": "IN", + "attrs": {}, "parent_component_name": "" } ], @@ -461,9 +645,11 @@ }, { "name": "E8364A", + "attrs": {}, "ports": [ { "name": "PORT1", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -471,6 +657,7 @@ }, { "name": "PORT2", + "attrs": {}, "parent_component_name": "", "domain": "RF", "connector": "", @@ -479,7 +666,10 @@ ], "connections": [], "components": [], - "environment": null, + "environment": { + "temperature_K": null, + "region": null + }, "manufacturer": "Agilent", "model": "E8364A" } @@ -487,16 +677,33 @@ "connections": [ { "name": "", + "attrs": {}, "ports": [ { "name": "PORT2", + "attrs": {}, "parent_component_name": "" }, { "name": "IN", + "attrs": {}, "parent_component_name": "" } - ] + ], + "time": { + "name": "", + "attrs": {}, + "value": 0, + "mean": 0, + "min": 0, + "max": 0, + "standard_deviation": 0, + "unit": { + "name": "second", + "datum": "second", + "base": 1 + } + } } ], "goal": "", @@ -507,6 +714,7 @@ "measurement_configuration_list": [ { "name": "", + "attrs": {}, "parent_directory": "", "measurement_type": "", "measurement_configuration_type": "VNASParameterMeasurementConfiguration", diff --git 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b/docs/examples/08_basic_interconnection_modelling/data/rf_vna_self_calibration/img/s_parameter_real_and_imaginary_rf_vna_self_calibration_port_2_port_2.png differ diff --git a/docs/examples/08a_pcb_interposer_characterisation/data/pcb_rf_vna_measurement/0/instance.json b/docs/examples/08a_pcb_interposer_characterisation/data/pcb_rf_vna_measurement/0/instance.json index 2a9f5ee1..6317169c 100644 --- a/docs/examples/08a_pcb_interposer_characterisation/data/pcb_rf_vna_measurement/0/instance.json +++ b/docs/examples/08a_pcb_interposer_characterisation/data/pcb_rf_vna_measurement/0/instance.json @@ -234,7 +234,7 @@ "goal": "", "parameters": {}, "index": 0, - "date_configured": "2024-09-14 17:54:18.136237", + "date_configured": "2024-09-14 18:12:01.920877", "date_measured": "", "measurement_configuration_list": [ { diff --git a/docs/examples/08a_pcb_interposer_characterisation/data/pcb_rf_vna_measurement/1/instance.json b/docs/examples/08a_pcb_interposer_characterisation/data/pcb_rf_vna_measurement/1/instance.json index 310a02d6..d8c3b0aa 100644 --- a/docs/examples/08a_pcb_interposer_characterisation/data/pcb_rf_vna_measurement/1/instance.json +++ b/docs/examples/08a_pcb_interposer_characterisation/data/pcb_rf_vna_measurement/1/instance.json @@ -234,7 +234,7 @@ "goal": "", "parameters": {}, "index": 1, - "date_configured": "2024-09-14 17:54:18.136406", + "date_configured": "2024-09-14 18:12:01.921088", "date_measured": "", "measurement_configuration_list": [ { diff --git a/docs/examples/08a_pcb_interposer_characterisation/data/pcb_rf_vna_measurement/experiment.json b/docs/examples/08a_pcb_interposer_characterisation/data/pcb_rf_vna_measurement/experiment.json index fea8401e..5f510273 100644 --- a/docs/examples/08a_pcb_interposer_characterisation/data/pcb_rf_vna_measurement/experiment.json +++ b/docs/examples/08a_pcb_interposer_characterisation/data/pcb_rf_vna_measurement/experiment.json @@ -239,7 +239,7 @@ "goal": "", "parameters": {}, "index": 0, - "date_configured": "2024-09-14 17:54:18.136237", + "date_configured": "2024-09-14 18:12:01.920877", "date_measured": "", "measurement_configuration_list": [ { @@ -493,7 +493,7 @@ "goal": "", "parameters": {}, "index": 1, - "date_configured": "2024-09-14 17:54:18.136406", + "date_configured": "2024-09-14 18:12:01.921088", "date_measured": "", "measurement_configuration_list": [ { diff --git a/docs/examples/09a_model_rf_amplifier/09a_model_rf_amplifier.py b/docs/examples/09a_model_rf_amplifier/09a_model_rf_amplifier.py index e0ce95a8..61b5c00b 100644 --- a/docs/examples/09a_model_rf_amplifier/09a_model_rf_amplifier.py +++ b/docs/examples/09a_model_rf_amplifier/09a_model_rf_amplifier.py @@ -104,6 +104,6 @@ unique_operating_point_columns=["driver_b_v_set"], ) -piel.visual.plot_dc_sweep(dc_sweep=dc_sweep[0]) - -piel.visual.plot_dc_sweeps(dc_sweep_collection=dc_sweep) +# piel.visual.plot_dc_sweep(dc_sweep=dc_sweep[0]) +# +# piel.visual.plot_dc_sweeps(dc_sweep_collection=dc_sweep) diff --git a/docs/examples/false_transition.json b/docs/examples/false_transition.json index 7708ec4b..a4a41df7 100644 --- a/docs/examples/false_transition.json +++ b/docs/examples/false_transition.json @@ -1,2 +1,2 @@ {"connections": {"bend_euler_1,o1": "cp1,o4", "bend_euler_1,o2": "syl,o1", "bend_euler_2,o1": "syl,o2", "bend_euler_2,o2": "sxb,o1", "bend_euler_3,o1": "cp1,o3", "bend_euler_3,o2": "sytl,o1", "bend_euler_4,o1": "sxt,o1", "bend_euler_4,o2": "sytl,o2", "bend_euler_5,o1": "straight_4,o2", "bend_euler_5,o2": "straight_5,o1", "bend_euler_6,o1": "straight_5,o2", "bend_euler_6,o2": "straight_6,o1", "bend_euler_7,o1": "straight_7,o2", "bend_euler_7,o2": "straight_8,o1", "bend_euler_8,o1": "straight_8,o2", "bend_euler_8,o2": "straight_9,o1", "cp2,o3": "straight_6,o2", "cp2,o4": "straight_9,o2", "straight_4,o1": "sxt,o2", "straight_7,o1": "sxb,o2"}, "instances": {"bend_euler_1": {"component": "bend_euler", "info": {"length": 16.637, "dy": 10.0, "radius_min": 7.061, "radius": 10.0, "width": 0.5, "route_info_type": "xs_sc", "route_info_length": 16.637, "route_info_weight": 16.637, "route_info_xs_sc_length": 16.637, "route_info_n_bend_90": 1.0}, "settings": {"angle": 90.0, "p": 0.5, "with_arc_floorplan": true, "direction": "ccw", "cross_section": "xs_sc"}}, "bend_euler_2": {"component": "bend_euler", "info": {"length": 16.637, "dy": 10.0, "radius_min": 7.061, "radius": 10.0, "width": 0.5, "route_info_type": "xs_sc", "route_info_length": 16.637, "route_info_weight": 16.637, "route_info_xs_sc_length": 16.637, "route_info_n_bend_90": 1.0}, "settings": {"angle": 90.0, "p": 0.5, "with_arc_floorplan": true, "direction": "ccw", "cross_section": "xs_sc"}}, "bend_euler_3": {"component": "bend_euler", "info": {"length": 16.637, "dy": 10.0, "radius_min": 7.061, "radius": 10.0, "width": 0.5, "route_info_type": "xs_sc", "route_info_length": 16.637, "route_info_weight": 16.637, "route_info_xs_sc_length": 16.637, "route_info_n_bend_90": 1.0}, "settings": {"angle": 90.0, "p": 0.5, "with_arc_floorplan": true, "direction": "ccw", "cross_section": "xs_sc"}}, "bend_euler_4": {"component": "bend_euler", "info": {"length": 16.637, "dy": 10.0, "radius_min": 7.061, "radius": 10.0, "width": 0.5, "route_info_type": "xs_sc", "route_info_length": 16.637, "route_info_weight": 16.637, "route_info_xs_sc_length": 16.637, "route_info_n_bend_90": 1.0}, "settings": {"angle": 90.0, "p": 0.5, "with_arc_floorplan": true, "direction": "ccw", "cross_section": "xs_sc"}}, "bend_euler_5": {"component": "bend_euler", "info": {"length": 16.637, "dy": 10.0, "radius_min": 7.061, "radius": 10.0, "width": 0.5, "route_info_type": "xs_sc", "route_info_length": 16.637, "route_info_weight": 16.637, "route_info_xs_sc_length": 16.637, "route_info_n_bend_90": 1.0}, "settings": {"angle": 90.0, "p": 0.5, "with_arc_floorplan": true, "direction": "ccw", "cross_section": {"sections": [{"width": 0.5, "offset": 0.0, "layer": "WG", "port_names": ["o1", "o2"], "port_types": ["optical", "optical"], "name": "_default", "hidden": false}], "components_along_path": [], "radius": 10.0, "radius_min": 5.0}}}, "bend_euler_6": {"component": "bend_euler", "info": {"length": 16.637, "dy": 10.0, "radius_min": 7.061, "radius": 10.0, "width": 0.5, "route_info_type": "xs_sc", "route_info_length": 16.637, "route_info_weight": 16.637, "route_info_xs_sc_length": 16.637, "route_info_n_bend_90": 1.0}, "settings": {"angle": 90.0, "p": 0.5, "with_arc_floorplan": true, "direction": "ccw", "cross_section": {"sections": [{"width": 0.5, "offset": 0.0, "layer": "WG", "port_names": ["o1", "o2"], "port_types": ["optical", "optical"], "name": "_default", "hidden": false}], "components_along_path": [], "radius": 10.0, "radius_min": 5.0}}}, "bend_euler_7": {"component": "bend_euler", "info": {"length": 16.637, "dy": 10.0, "radius_min": 7.061, "radius": 10.0, "width": 0.5, "route_info_type": "xs_sc", "route_info_length": 16.637, "route_info_weight": 16.637, "route_info_xs_sc_length": 16.637, "route_info_n_bend_90": 1.0}, "settings": {"angle": 90.0, "p": 0.5, "with_arc_floorplan": true, "direction": "ccw", "cross_section": {"sections": [{"width": 0.5, "offset": 0.0, "layer": "WG", "port_names": ["o1", "o2"], "port_types": ["optical", "optical"], "name": "_default", "hidden": false}], "components_along_path": [], "radius": 10.0, "radius_min": 5.0}}}, "bend_euler_8": {"component": "bend_euler", "info": {"length": 16.637, "dy": 10.0, "radius_min": 7.061, "radius": 10.0, "width": 0.5, "route_info_type": "xs_sc", "route_info_length": 16.637, "route_info_weight": 16.637, "route_info_xs_sc_length": 16.637, "route_info_n_bend_90": 1.0}, "settings": {"angle": 90.0, "p": 0.5, "with_arc_floorplan": true, "direction": "ccw", "cross_section": {"sections": [{"width": 0.5, "offset": 0.0, "layer": "WG", "port_names": ["o1", "o2"], "port_types": ["optical", "optical"], "name": "_default", "hidden": false}], "components_along_path": [], "radius": 10.0, "radius_min": 5.0}}}, "cp1": {"component": "mmi2x2", "info": {}, "settings": {"width_taper": 1.0, "length_taper": 10.0, "length_mmi": 5.5, "width_mmi": 2.5, "gap_mmi": 0.25, "taper": {"function": "taper"}, "cross_section": "xs_sc"}}, "cp2": {"component": "mmi2x2", "info": {}, "settings": {"width_taper": 1.0, "length_taper": 10.0, "length_mmi": 5.5, "width_mmi": 2.5, "gap_mmi": 0.25, "taper": {"function": "taper"}, "cross_section": "xs_sc"}}, "straight_4": {"component": "straight", "info": {"length": 0.01, "width": 0.5, "route_info_type": "xs_sc", "route_info_length": 0.01, "route_info_weight": 0.01, "route_info_xs_sc_length": 0.01}, "settings": {"length": 0.01, "npoints": 2, "cross_section": {"sections": [{"width": 0.5, "offset": 0.0, "layer": "WG", "port_names": ["o1", "o2"], "port_types": ["optical", "optical"], "name": "_default", "hidden": false}], "components_along_path": [], "radius": 10.0, "radius_min": 5.0}}}, "straight_5": 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"syl": {"x": 25.5, "y": -10.625, "rotation": 270, "mirror": 0}, "sytl": {"x": 25.5, "y": 10.625, "rotation": 90, "mirror": 0}}, "ports": {"o1": "cp1,o1", "o2": "cp1,o2", "o4": "cp2,o1", "o3": "cp2,o2", "top_l_e1": "sxt,l_e1", "top_l_e2": "sxt,l_e2", "top_l_e3": "sxt,l_e3", "top_l_e4": "sxt,l_e4", "top_r_e1": "sxt,r_e1", "top_r_e2": "sxt,r_e2", "top_r_e3": "sxt,r_e3", "top_r_e4": "sxt,r_e4"}, "name": "mzi_d3794663"} \ No newline at end of file diff --git a/piel/experimental/measurements/data/extract.py b/piel/experimental/measurements/data/extract.py index 27230240..2205593a 100644 --- a/piel/experimental/measurements/data/extract.py +++ b/piel/experimental/measurements/data/extract.py @@ -114,7 +114,7 @@ def extract_data_from_experiment( composition_kwargs = dict() if extraction_kwargs is None: - extraction_kwargs = dict() + extraction_kwargs = {"skip_missing": True} measurement_collection = compose_measurement_collection_from_experiment( experiment=experiment, diff --git a/piel/tools/cocotb/core.py b/piel/tools/cocotb/core.py index 4fd900a5..02e8e737 100644 --- a/piel/tools/cocotb/core.py +++ b/piel/tools/cocotb/core.py @@ -139,6 +139,7 @@ def configure_cocotb_simulation( def run_cocotb_simulation( design_directory: str, + raise_error: bool = False, ) -> subprocess.CompletedProcess: """ Runs the Cocotb simulation by executing the Makefile in the specified design directory. @@ -183,4 +184,5 @@ def run_cocotb_simulation( print("Standard Error (stderr):") print(e.stderr.decode()) # Decode bytes to string - raise + if raise_error: + raise