i2c: glitch high rather than low when tristating SCL+SDA

Avoids accidential start conditions, fixes #405

As a side note, _clk_lo_data_input does generate a negative glitch on
SDA (if it was high) before going high-impedance. This behavior is
preferable over the alternative (glitching high before going
high-impedance), since the device might already be driving low on the
bus to provide an ACK and we don't want brief crowbar currents.

Author: dnschneid

pyftdi/i2c.py

@@ -962,7 +962,7 @@ def _clk_lo_data_lo(self) -> Tuple[int]:
     @property
     def _clk_input_data_input(self) -> Tuple[int]:
         return (Ftdi.SET_BITS_LOW,
-                self._gpio_low,
+                self.I2C_DIR | self._gpio_low,
                 (self._gpio_dir & 0xFF))
 
     @property