From 10a162513c7410afe79d561ba90c679918cf20ff Mon Sep 17 00:00:00 2001
From: Robin Leroy <egg.robin.leroy@gmail.com>
Date: Mon, 30 Dec 2024 13:20:06 +0100
Subject: [PATCH] asm volatile cpuid

---
 nanobenchmarks/main.cpp | 16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/nanobenchmarks/main.cpp b/nanobenchmarks/main.cpp
index 00deceba04..ce1fbf1d8e 100644
--- a/nanobenchmarks/main.cpp
+++ b/nanobenchmarks/main.cpp
@@ -14,12 +14,11 @@
 #include <utility>
 #include <vector>
 
-#include <intrin.h>
-
 #include "absl/flags/flag.h"
 #include "absl/flags/parse.h"
 #include "absl/strings/str_join.h"
 #include "absl/strings/str_split.h"
+#include "base/macros.hpp"  // 🧙 For PRINCIPIA_COMPILER_CLANG.
 #include "mathematica/logger.hpp"
 #include "mathematica/mathematica.hpp"
 #include "nanobenchmarks/function_registry.hpp"
@@ -27,6 +26,11 @@
 #include "nanobenchmarks/performance_settings_controller.hpp"
 #include "testing_utilities/statistics.hpp"
 
+
+#if PRINCIPIA_COMPILER_MSVC
+#include <intrin.h>
+#endif
+
 ABSL_FLAG(std::size_t,
           loop_iterations,
           100,
@@ -149,7 +153,11 @@ __declspec(noinline) LatencyDistributionTable
     double const input = absl::GetFlag(FLAGS_input);
     double x = input;
     // The CPUID barriers prevent out-of-order execution; see [Pao10].
+    #if PRINCIPIA_COMPILER_MSVC
     __cpuid(registers, leaf);
+    #else
+    asm volatile("cpuid");
+    #endif
     auto const tsc_start = __rdtsc();
     for (int i = 0; i < loop_iterations; ++i) {
       x = f(x);
@@ -164,7 +172,11 @@ __declspec(noinline) LatencyDistributionTable
     // globally visible, and subsequent instructions may begin execution before
     // the read operation is performed.
     auto const tsc_stop = __rdtscp(&tsc_aux);
+    #if PRINCIPIA_COMPILER_MSVC
     __cpuid(registers, leaf);
+    #else
+    asm volatile("cpuid");
+    #endif
     double const δtsc = tsc_stop - tsc_start;
     samples[j] = δtsc / loop_iterations;
   }