Fix incorrect I2C OA2 bit shift

Also fix comment about OA2 masks to match the reference manual

Author: innermatrix

embassy-stm32/CHANGELOG.md

@@ -8,6 +8,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 <!-- next-header -->
 ## Unreleased - ReleaseDate
 
+- fix: Fixed handling of secondary I2C addresses (`ADCn.OA2`); previously, they were incorrectly left-shifted, such that calling `configure_oa2(addr)` would actually create an I2C peripheral with address `addr`\*2. ([#4692](https://github.com/embassy-rs/embassy/pull/4692))
 - fix: Fixed STM32H5 builds requiring time feature
 - feat: Derive Clone, Copy for QSPI Config
 - fix: stm32/i2c in master mode (blocking): subsequent transmissions failed after a NACK was received

embassy-stm32/src/i2c/config.rs

@@ -20,7 +20,7 @@ pub enum AddrMask {
     MASK4,
     /// OA2\[5:1\] are masked and don’t care. Only OA2\[7:6\] are compared.
     MASK5,
-    /// OA2\[6:1\] are masked and don’t care. Only OA2\[7:6\] are compared.
+    /// OA2\[6:1\] are masked and don’t care. Only OA2\[7\] is compared.
     MASK6,
     /// OA2\[7:1\] are masked and don’t care. No comparison is done, and all (except reserved) 7-bit received addresses are acknowledged
     MASK7,

embassy-stm32/src/i2c/v2.rs

@@ -963,7 +963,7 @@ impl<'d, M: Mode> I2c<'d, M, MultiMaster> {
         self.info.regs.oar2().write(|reg| {
             reg.set_oa2en(false);
             reg.set_oa2msk(oa2.mask.into());
-            reg.set_oa2(oa2.addr << 1);
+            reg.set_oa2(oa2.addr);
             reg.set_oa2en(true);
         });
     }