Add Hands-on CRC and ISR_in_ICTM

ethanhuanginst · May 20, 2019 · 617741d · 617741d
1 parent 419b4ea
commit 617741d
Show file tree

Hide file tree

Showing 49 changed files with 4,366 additions and 65 deletions.
diff --git a/docs/imgs/hands-on/08_00_crc-test.png b/docs/imgs/hands-on/08_00_crc-test.png
diff --git a/docs/imgs/hands-on/08_00_ewarm-crc.png b/docs/imgs/hands-on/08_00_ewarm-crc.png
diff --git a/docs/imgs/hands-on/08_01_properties.png b/docs/imgs/hands-on/08_01_properties.png
diff --git a/docs/imgs/hands-on/08_02_post-build.png b/docs/imgs/hands-on/08_02_post-build.png
diff --git a/docs/imgs/hands-on/08_03_rebuild.png b/docs/imgs/hands-on/08_03_rebuild.png
diff --git a/docs/imgs/hands-on/08_04_check_files.png b/docs/imgs/hands-on/08_04_check_files.png
diff --git a/docs/imgs/hands-on/08_05_check-by-programmer.png b/docs/imgs/hands-on/08_05_check-by-programmer.png
diff --git a/docs/imgs/hands-on/08_06_2nd-run.png b/docs/imgs/hands-on/08_06_2nd-run.png
diff --git a/docs/imgs/hands-on/08_07_modify_debug_config.png b/docs/imgs/hands-on/08_07_modify_debug_config.png
diff --git a/docs/imgs/hands-on/08_08_final-run.png b/docs/imgs/hands-on/08_08_final-run.png
diff --git a/docs/imgs/hands-on/09_00.png b/docs/imgs/hands-on/09_00.png
diff --git a/docs/imgs/hands-on/09_01_SetupBuildConfigurations.png b/docs/imgs/hands-on/09_01_SetupBuildConfigurations.png
diff --git a/docs/imgs/hands-on/09_02.png b/docs/imgs/hands-on/09_02.png
diff --git a/docs/imgs/hands-on/09_03.png b/docs/imgs/hands-on/09_03.png
diff --git a/docs/imgs/hands-on/09_04.png b/docs/imgs/hands-on/09_04.png
diff --git a/docs/imgs/hands-on/09_05.png b/docs/imgs/hands-on/09_05.png
diff --git a/docs/imgs/hands-on/09_06.png b/docs/imgs/hands-on/09_06.png
diff --git a/docs/imgs/hands-on/09_07.png b/docs/imgs/hands-on/09_07.png
diff --git a/docs/imgs/hands-on/09_08.png b/docs/imgs/hands-on/09_08.png
diff --git a/docs/imgs/hands-on/09_09.png b/docs/imgs/hands-on/09_09.png
diff --git a/docs/imgs/hands-on/09_10.png b/docs/imgs/hands-on/09_10.png
diff --git a/docs/imgs/hands-on/09_11_BuildAnalyzer_case1.png b/docs/imgs/hands-on/09_11_BuildAnalyzer_case1.png
diff --git a/docs/imgs/hands-on/09_12_StopAtBreakpoint_case1.png b/docs/imgs/hands-on/09_12_StopAtBreakpoint_case1.png
diff --git a/docs/imgs/hands-on/09_20_SetupLinker.png b/docs/imgs/hands-on/09_20_SetupLinker.png
diff --git a/docs/imgs/hands-on/09_21_BuildAnalyzer_case2.png b/docs/imgs/hands-on/09_21_BuildAnalyzer_case2.png
diff --git a/docs/imgs/hands-on/09_22_StopAtBreakpoint_case2.png b/docs/imgs/hands-on/09_22_StopAtBreakpoint_case2.png
diff --git a/docs/imgs/hands-on/09_31_BuildAnalyzer_case3.png b/docs/imgs/hands-on/09_31_BuildAnalyzer_case3.png
diff --git a/docs/imgs/hands-on/09_32_StopAtBreakpoint_case3.png b/docs/imgs/hands-on/09_32_StopAtBreakpoint_case3.png
diff --git a/hands-on/08_F746-DISCO-CRC/.project b/hands-on/08_F746-DISCO-CRC/.project
@@ -1,6 +1,6 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <projectDescription>
-	<name>08_F746-DISCO-CRC</name>
+	<name>06_F746-DISCO-CRC</name>
 	<comment></comment>
 	<projects>
 	</projects>

diff --git a/...n/08_F746-DISCO-CRC/08_F746-DISCO-CRC.ioc → ...n/08_F746-DISCO-CRC/06_F746-DISCO-CRC.ioc b/...n/08_F746-DISCO-CRC/08_F746-DISCO-CRC.ioc → ...n/08_F746-DISCO-CRC/06_F746-DISCO-CRC.ioc
diff --git a/hands-on/08_F746-DISCO-CRC/08_F746-DISCO-CRC.elf.launch b/hands-on/08_F746-DISCO-CRC/08_F746-DISCO-CRC.elf.launch
diff --git a/hands-on/08_F746-DISCO-CRC/README.md b/hands-on/08_F746-DISCO-CRC/README.md
@@ -0,0 +1,72 @@
+# Hands-on: CRC Checksum Generation
+
+### Introduction
+
+IAR EWARM provides a way to generate checksum as shown below:
+![](../../docs/imgs/hands-on/08_00_ewarm-crc.png)
+
+How can this be done by using STM32CubeIDE? This hands-on provides an option for you. 
+
+### Steps
+
+1. Import the reference project.
+
+2. Build Project
+
+3. Start Debug session and check result from serial port console as shown below:
+   ![](../../docs/imgs/hands-on/08_00_crc-test.png)
+
+   * CRC generated by CRC unit in STM32F746 is 0x872D0D45.
+   * CRC generated by CRC code running over STM32F746 is also 0x872D0D45.
+   * Checksum stored in the last word of the first sector is 0xFFFFFFFF which is not aligned with that generated by CRC unit and therefore CRC check fails. This is expected since we have not put any checksum into the HEX/BIN file yet.
+
+
+
+4. [Srec_cat](http://srecord.sourceforge.net/download.html) could be used to generate CRC checksum and put it into HEX file. To simplify the process, please put srec_cat.exe into the root of project folder.
+
+
+
+5. Right click on project icon and then select "Properties":
+   ![](../../docs/imgs/hands-on/08_01_properties.png)
+
+
+
+6. Type "..\checksum.bat" in Command of Post-build steps:
+   ![](../../docs/imgs/hands-on/08_02_post-build.png)
+
+
+
+7. "Clean Project" and then "Build Project" again and we can see checksum.bat executes correctly without error:
+   ![](../../docs/imgs/hands-on/08_03_rebuild.png)
+
+
+
+8. Check files under "Debug" folder and **06_F746-DISCO-CRC_SRECORD.hex** generated by checksum.bat is found:
+   ![](../../docs/imgs/hands-on/08_04_check_files.png)
+
+
+
+9. Check the last word of 06_F746-DISCO-CRC_SRECORD.hex by STM32CubeProgrammer. CRC checksum generated by srec_cat and put in the last word of **06_F746-DISCO-CRC_SRECORD.hex** (0x872D9D45) is exactly the same as that by CRC unit of STM32F746 (0x872D9D45).
+   ![](../../docs/imgs/hands-on/08_05_check-by-programmer.png)
+
+
+
+10. After running the debug session and checking the result in serial port console, we still get CRC check failure. And memory address 0x08007FFC which is supposed to have CRC checksum 0x872D9D45 still contains 0xFFFFFFFF:
+    ![](../../docs/imgs/hands-on/08_06_2nd-run.png)
+
+
+
+11. The reason of this failure is due to the fact that **06_F746-DISCO-CRC_SRECORD.hex** (containing CRC checksum) is not programmed when running debug session. We need to assign 06_F746-DISCO-CRC_SRECORD.hex** (containing CRC checksum) to be programmed instead of original **06_F746-DISCO-CRC.elf** (w/o CRC checksum). Please open "Debug Configuration" and make the following change:
+
+    ![](../../docs/imgs/hands-on/08_07_modify_debug_config.png)
+
+
+
+12. Run debug session again and finally get correct expected result:
+
+    ![](../../docs/imgs/hands-on/08_08_final-run.png)
+
+
+
+
+
diff --git a/hands-on/08_F746-DISCO-CRC/checksum.bat b/hands-on/08_F746-DISCO-CRC/checksum.bat
@@ -1,2 +1,2 @@
-arm-none-eabi-objcopy  -O ihex  08_F746-DISCO-CRC.elf  "08_F746-DISCO-CRC.hex"
-srec_cat 08_F746-DISCO-CRC.hex -Intel -fill 0xFF 0x08000000 0x08007FFC -STM32 0x08007FFC -o 08_F746-DISCO-CRC_SRECORD.hex -Intel
+C:\ST\STM32CubeIDE_1.0.0\STM32CubeIDE\plugins\com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610\tools\arm-none-eabi\bin\objcopy.exe  -O ihex  06_F746-DISCO-CRC.elf  "06_F746-DISCO-CRC.hex"
+..\srec_cat.exe 06_F746-DISCO-CRC.hex -Intel -fill 0xFF 0x08000000 0x08007FFC -STM32 0x08007FFC -o 06_F746-DISCO-CRC_SRECORD.hex -Intel
diff --git a/hands-on/09_ISR_in_ICTM/.STM32F746NGHX_FLASH_config1.ld.swp b/hands-on/09_ISR_in_ICTM/.STM32F746NGHX_FLASH_config1.ld.swp
diff --git a/hands-on/09_ISR_in_ICTM/.stm32f7xx_it_config1and2.c.swp b/hands-on/09_ISR_in_ICTM/.stm32f7xx_it_config1and2.c.swp
diff --git a/hands-on/09_ISR_in_ICTM/.system_stm32f7xx_case2.c.swp b/hands-on/09_ISR_in_ICTM/.system_stm32f7xx_case2.c.swp