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Commit a371109

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added a first attempt at code prefetching
1 parent 7c5e300 commit a371109

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6 files changed

+310
-17
lines changed

6 files changed

+310
-17
lines changed

build_champsim.sh

+18-7
Original file line numberDiff line numberDiff line change
@@ -1,18 +1,19 @@
11
#!/bin/bash
22

3-
if [ "$#" -ne 6 ]; then
3+
if [ "$#" -ne 7 ]; then
44
echo "Illegal number of parameters"
55
echo "Usage: ./build_champsim.sh [branch_pred] [l1d_pref] [l2c_pref] [llc_pref] [llc_repl] [num_core]"
66
exit 1
77
fi
88

99
# ChampSim configuration
1010
BRANCH=$1 # branch/*.bpred
11-
L1D_PREFETCHER=$2 # prefetcher/*.l1d_pref
12-
L2C_PREFETCHER=$3 # prefetcher/*.l2c_pref
13-
LLC_PREFETCHER=$4 # prefetcher/*.llc_pref
14-
LLC_REPLACEMENT=$5 # replacement/*.llc_repl
15-
NUM_CORE=$6 # tested up to 8-core system
11+
L1I_PREFETCHER=$2 # prefetcher/*.l1i_pref
12+
L1D_PREFETCHER=$3 # prefetcher/*.l1d_pref
13+
L2C_PREFETCHER=$4 # prefetcher/*.l2c_pref
14+
LLC_PREFETCHER=$5 # prefetcher/*.llc_pref
15+
LLC_REPLACEMENT=$6 # replacement/*.llc_repl
16+
NUM_CORE=$7 # tested up to 8-core system
1617

1718
############## Some useful macros ###############
1819
BOLD=$(tput bold)
@@ -27,6 +28,13 @@ if [ ! -f ./branch/${BRANCH}.bpred ]; then
2728
exit 1
2829
fi
2930

31+
if [ ! -f ./prefetcher/${L1I_PREFETCHER}.l1i_pref ]; then
32+
echo "[ERROR] Cannot find L1I prefetcher"
33+
echo "[ERROR] Possible L1I prefetchers from prefetcher/*.l1i_pref "
34+
find prefetcher -name "*.l1i_pref"
35+
exit 1
36+
fi
37+
3038
if [ ! -f ./prefetcher/${L1D_PREFETCHER}.l1d_pref ]; then
3139
echo "[ERROR] Cannot find L1D prefetcher"
3240
echo "[ERROR] Possible L1D prefetchers from prefetcher/*.l1d_pref "
@@ -80,6 +88,7 @@ echo
8088

8189
# Change prefetchers and replacement policy
8290
cp branch/${BRANCH}.bpred branch/branch_predictor.cc
91+
cp prefetcher/${L1I_PREFETCHER}.l1i_pref prefetcher/l1i_prefetcher.cc
8392
cp prefetcher/${L1D_PREFETCHER}.l1d_pref prefetcher/l1d_prefetcher.cc
8493
cp prefetcher/${L2C_PREFETCHER}.l2c_pref prefetcher/l2c_prefetcher.cc
8594
cp prefetcher/${LLC_PREFETCHER}.llc_pref prefetcher/llc_prefetcher.cc
@@ -101,12 +110,13 @@ fi
101110

102111
echo "${BOLD}ChampSim is successfully built"
103112
echo "Branch Predictor: ${BRANCH}"
113+
echo "L1I Prefetcher: ${L1I_PREFETCHER}"
104114
echo "L1D Prefetcher: ${L1D_PREFETCHER}"
105115
echo "L2C Prefetcher: ${L2C_PREFETCHER}"
106116
echo "LLC Prefetcher: ${LLC_PREFETCHER}"
107117
echo "LLC Replacement: ${LLC_REPLACEMENT}"
108118
echo "Cores: ${NUM_CORE}"
109-
BINARY_NAME="${BRANCH}-${L1D_PREFETCHER}-${L2C_PREFETCHER}-${LLC_PREFETCHER}-${LLC_REPLACEMENT}-${NUM_CORE}core"
119+
BINARY_NAME="${BRANCH}-${L1I_PREFETCHER}-${L1D_PREFETCHER}-${L2C_PREFETCHER}-${LLC_PREFETCHER}-${LLC_REPLACEMENT}-${NUM_CORE}core"
110120
echo "Binary: bin/${BINARY_NAME}"
111121
echo ""
112122
mv bin/champsim bin/${BINARY_NAME}
@@ -118,6 +128,7 @@ sed -i.bak 's/\<NUM_CPUS '${NUM_CORE}'\>/NUM_CPUS 1/g' inc/champsim.h
118128
#sed -i.bak 's/\<DRAM_CHANNELS_LOG2 1\>/DRAM_CHANNELS_LOG2 0/g' inc/champsim.h
119129

120130
cp branch/bimodal.bpred branch/branch_predictor.cc
131+
cp prefetcher/no.l1i_pref prefetcher/l1i_prefetcher.cc
121132
cp prefetcher/no.l1d_pref prefetcher/l1d_prefetcher.cc
122133
cp prefetcher/no.l2c_pref prefetcher/l2c_prefetcher.cc
123134
cp prefetcher/no.llc_pref prefetcher/llc_prefetcher.cc

inc/ooo_cpu.h

+23-2
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@ using namespace std;
2323
#define BRANCH_MISPREDICT_PENALTY 1
2424
#define DECODED_INSTRUCTION_CACHE_SIZE 2048
2525
#define IFETCH_WORKING_CACHE_LINES 4
26+
#define CODE_PREFETCH_BUFFER_SIZE 16
2627
//#define SCHEDULING_LATENCY 0
2728
//#define EXEC_LATENCY 0
2829
//#define DECODE_LATENCY 2
@@ -63,7 +64,11 @@ class O3_CPU {
6364
// current working cache lines for instruction fetch stage
6465
ooo_model_instr ifetch_working_set_instrs[IFETCH_WORKING_CACHE_LINES];
6566
uint32_t ifetch_working_set_mru_index;
66-
67+
68+
// code prefetching
69+
ooo_model_instr code_prefetch_buffer[CODE_PREFETCH_BUFFER_SIZE];
70+
uint32_t code_prefetch_buffer_occupancy;
71+
6772
// store array, this structure is required to properly handle store instructions
6873
uint64_t STA[STA_SIZE], STA_head, STA_tail;
6974

@@ -186,6 +191,15 @@ class O3_CPU {
186191
ifetch_working_set_instrs[i].fetched = COMPLETED;
187192
}
188193
ifetch_working_set_mru_index = 0;
194+
195+
for(int i=0; i<CODE_PREFETCH_BUFFER_SIZE; i++)
196+
{
197+
code_prefetch_buffer[i].ip = 0;
198+
code_prefetch_buffer[i].branch_target = 0;
199+
code_prefetch_buffer[i].translated = 0;
200+
code_prefetch_buffer[i].fetched = 0;
201+
}
202+
code_prefetch_buffer_occupancy = 0;
189203
}
190204

191205
// functions
@@ -233,7 +247,14 @@ class O3_CPU {
233247
// branch predictor
234248
uint8_t predict_branch(uint64_t ip);
235249
void initialize_branch_predictor(),
236-
last_branch_result(uint64_t ip, uint8_t taken);
250+
last_branch_result(uint64_t ip, uint8_t taken);
251+
252+
// code prefetching
253+
void l1i_prefetcher_initialize();
254+
void l1i_prefetcher_branch_operate(uint64_t ip, uint8_t branch_type, uint8_t branch_prediction);
255+
void l1i_prefetcher_cache_operate(uint64_t addr, uint8_t cache_hit);
256+
void l1i_prefetcher_final_stats();
257+
int prefetch_code_line(uint64_t ip, uint64_t pf_addr);
237258
};
238259

239260
extern O3_CPU ooo_cpu[NUM_CPUS];

prefetcher/l1i_prefetcher.cc

+21
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,21 @@
1+
#include "ooo_cpu.h"
2+
3+
void O3_CPU::l1i_prefetcher_initialize()
4+
{
5+
6+
}
7+
8+
void O3_CPU::l1i_prefetcher_branch_operate(uint64_t ip, uint8_t branch_type, uint8_t branch_prediction)
9+
{
10+
11+
}
12+
13+
void O3_CPU::l1i_prefetcher_cache_operate(uint64_t addr, uint8_t cache_hit)
14+
{
15+
16+
}
17+
18+
void O3_CPU::l1i_prefetcher_final_stats()
19+
{
20+
21+
}

prefetcher/next_line.l1i_pref

+25
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
#include "ooo_cpu.h"
2+
3+
void O3_CPU::l1i_prefetcher_initialize()
4+
{
5+
6+
}
7+
8+
void O3_CPU::l1i_prefetcher_branch_operate(uint64_t ip, uint8_t branch_type, uint8_t branch_prediction)
9+
{
10+
11+
}
12+
13+
void O3_CPU::l1i_prefetcher_cache_operate(uint64_t addr, uint8_t cache_hit)
14+
{
15+
if((cache_hit == 0) && (L1I.MSHR.occupancy < (L1I.MSHR.SIZE>>1)))
16+
{
17+
uint64_t pf_addr = addr + (1<<LOG2_BLOCK_SIZE);
18+
prefetch_code_line(addr, pf_addr);
19+
}
20+
}
21+
22+
void O3_CPU::l1i_prefetcher_final_stats()
23+
{
24+
25+
}

prefetcher/no.l1i_pref

+21
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,21 @@
1+
#include "ooo_cpu.h"
2+
3+
void O3_CPU::l1i_prefetcher_initialize()
4+
{
5+
6+
}
7+
8+
void O3_CPU::l1i_prefetcher_branch_operate(uint64_t ip, uint8_t branch_type, uint8_t branch_prediction)
9+
{
10+
11+
}
12+
13+
void O3_CPU::l1i_prefetcher_cache_operate(uint64_t addr, uint8_t cache_hit)
14+
{
15+
16+
}
17+
18+
void O3_CPU::l1i_prefetcher_final_stats()
19+
{
20+
21+
}

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