From b4d433da90acc2b9036240cfd078266bae49f166 Mon Sep 17 00:00:00 2001 From: dnandha Date: Thu, 25 Mar 2021 14:33:58 +0100 Subject: [PATCH] [Variant] Add DISCO F303VC Supersede #1238 Signed-off-by: dnandha Co-authored-by: Alexandre Bourdiol --- README.md | 2 + boards.txt | 29 ++ .../STM32F3xx/F303V(B-C)Tx/generic_clock.c | 67 ++++- variants/STM32F3xx/F303V(B-C)Tx/ldscript.ld | 179 ++++++++++++ .../F303V(B-C)Tx/variant_DISCO_F303VC.cpp | 202 ++++++++++++++ .../F303V(B-C)Tx/variant_DISCO_F303VC.h | 260 ++++++++++++++++++ 6 files changed, 737 insertions(+), 2 deletions(-) create mode 100644 variants/STM32F3xx/F303V(B-C)Tx/ldscript.ld create mode 100644 variants/STM32F3xx/F303V(B-C)Tx/variant_DISCO_F303VC.cpp create mode 100644 variants/STM32F3xx/F303V(B-C)Tx/variant_DISCO_F303VC.h diff --git a/README.md b/README.md index e7c05719c4..1a66921bed 100644 --- a/README.md +++ b/README.md @@ -134,6 +134,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32F030R8 | [32F0308DISCOVERY](http://www.st.com/en/evaluation-tools/32f0308discovery.html) | *1.3.0* | | | :green_heart: | STM32F072RB | [32F072BDISCOVERY](https://www.st.com/en/evaluation-tools/32f072bdiscovery.html) | *1.5.0* | | | :green_heart: | STM32F100RB | [STM32VLDISCOVERY](https://www.st.com/en/evaluation-tools/stm32vldiscovery.html) | 0.2.1 | | +| :yellow_heart: | STM32F303VC | [STM32F3DISCOVERY](https://www.st.com/en/evaluation-tools/stm32f3discovery.html) | **2.0.0** | | | :green_heart: | STM32F407VG | [STM32F407G-DISC1](http://www.st.com/en/evaluation-tools/stm32f4discovery.html) | *0.1.0* | | | :green_heart: | STM32F746NG | [STM32F746G-DISCOVERY](http://www.st.com/en/evaluation-tools/32f746gdiscovery.html) | *0.1.0* | | | :green_heart: | STM32G031J6 | [STM32G0316-DISCO](https://www.st.com/en/evaluation-tools/stm32g0316-disco.html) | *1.9.0* | | @@ -205,6 +206,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32F303CC | [RobotDyn Black Pill](https://stm32-base.org/boards/STM32F303CCT6-RobotDyn-Black-Pill) | *1.6.1* | [More info](https://robotdyn.com/catalog/development-boards/stm-boards-and-shields.html) | | :yellow_heart: | STM32F303K6
STM32F303K8 | Generic Board | **2.0.0** | | | :yellow_heart: | STM32F303RD
STM32F303RE | Generic Board | **2.0.0** | | +| :yellow_heart: | STM32F303VBT
STM32F303VCT | Generic Board | **2.0.0** | | | :yellow_heart: | STM32F334K4
STM32F334K6
STM32F334K8 | Generic Board | **2.0.0** | | ### Generic STM32F4 boards diff --git a/boards.txt b/boards.txt index cf2be94c7c..105278f3f4 100644 --- a/boards.txt +++ b/boards.txt @@ -663,6 +663,19 @@ Disco.menu.pnum.DISCO_F100RB.build.product_line=STM32F100xB Disco.menu.pnum.DISCO_F100RB.build.variant=STM32F1xx/DISCO_F100RB Disco.menu.pnum.DISCO_F100RB.build.cmsis_lib_gcc=arm_cortexM3l_math +# DISCO_F303VC board +Disco.menu.pnum.DISCO_F303VC=STM32F3-DISCOVERY +Disco.menu.pnum.DISCO_F303VC.node=DIS_F303VC +Disco.menu.pnum.DISCO_F303VC.upload.maximum_size=262144 +Disco.menu.pnum.DISCO_F303VC.upload.maximum_data_size=40960 +Disco.menu.pnum.DISCO_F303VC.build.mcu=cortex-m4 +Disco.menu.pnum.DISCO_F303VC.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard +Disco.menu.pnum.DISCO_F303VC.build.board=DISCO_F303VC +Disco.menu.pnum.DISCO_F303VC.build.series=STM32F3xx +Disco.menu.pnum.DISCO_F303VC.build.product_line=STM32F303xC +Disco.menu.pnum.DISCO_F303VC.build.variant=STM32F3xx/F303V(B-C)Tx +Disco.menu.pnum.DISCO_F303VC.build.cmsis_lib_gcc=arm_cortexM4lf_math + # DISCO_F407VG board Disco.menu.pnum.DISCO_F407VG=STM32F407G-DISC1 Disco.menu.pnum.DISCO_F407VG.node=DIS_F407VG @@ -1616,6 +1629,22 @@ GenF3.menu.pnum.GENERIC_F303RETX.build.board=GENERIC_F303RETX GenF3.menu.pnum.GENERIC_F303RETX.build.product_line=STM32F303xE GenF3.menu.pnum.GENERIC_F303RETX.build.variant=STM32F3xx/F303R(D-E)Tx +# Generic F303VBTx +GenF3.menu.pnum.GENERIC_F303VBTX=Generic F303VBTx +GenF3.menu.pnum.GENERIC_F303VBTX.upload.maximum_size=131072 +GenF3.menu.pnum.GENERIC_F303VBTX.upload.maximum_data_size=32768 +GenF3.menu.pnum.GENERIC_F303VBTX.build.board=GENERIC_F303VBTX +GenF3.menu.pnum.GENERIC_F303VBTX.build.product_line=STM32F303xC +GenF3.menu.pnum.GENERIC_F303VBTX.build.variant=STM32F3xx/F303V(B-C)Tx + +# Generic F303VCTx +GenF3.menu.pnum.GENERIC_F303VCTX=Generic F303VCTx +GenF3.menu.pnum.GENERIC_F303VCTX.upload.maximum_size=262144 +GenF3.menu.pnum.GENERIC_F303VCTX.upload.maximum_data_size=40960 +GenF3.menu.pnum.GENERIC_F303VCTX.build.board=GENERIC_F303VCTX +GenF3.menu.pnum.GENERIC_F303VCTX.build.product_line=STM32F303xC +GenF3.menu.pnum.GENERIC_F303VCTX.build.variant=STM32F3xx/F303V(B-C)Tx + # Generic F334K4Tx GenF3.menu.pnum.GENERIC_F334K4TX=Generic F334K4Tx GenF3.menu.pnum.GENERIC_F334K4TX.upload.maximum_size=16384 diff --git a/variants/STM32F3xx/F303V(B-C)Tx/generic_clock.c b/variants/STM32F3xx/F303V(B-C)Tx/generic_clock.c index 9c627b4f21..6419eb4249 100644 --- a/variants/STM32F3xx/F303V(B-C)Tx/generic_clock.c +++ b/variants/STM32F3xx/F303V(B-C)Tx/generic_clock.c @@ -19,9 +19,72 @@ * @retval None */ WEAK void SystemClock_Config(void) +#if defined(USBCON) { - /* SystemClock_Config can be generated by STM32CubeMX */ -#warning "SystemClock_Config() is empty. Default clock at reset is used." + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) { + Error_Handler(); + } + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; + PeriphClkInit.USBClockSelection = RCC_USBCLKSOURCE_PLL; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { + Error_Handler(); + } +} +#else +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { + Error_Handler(); + } } +#endif /* USBCON */ #endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32F3xx/F303V(B-C)Tx/ldscript.ld b/variants/STM32F3xx/F303V(B-C)Tx/ldscript.ld new file mode 100644 index 0000000000..e7d1209d77 --- /dev/null +++ b/variants/STM32F3xx/F303V(B-C)Tx/ldscript.ld @@ -0,0 +1,179 @@ +/** + ****************************************************************************** + * @file LinkerScript.ld + * @author Auto-generated by STM32CubeIDE + * @brief Linker script for STM32F303VCTx Device from STM32F3 series + * 256Kbytes FLASH + * 8Kbytes CCMRAM + * 40Kbytes RAM + * + * Set heap size, stack size and stack location according + * to application requirements. + * + * Set memory bank area and size if external memory is used + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 8K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE + FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/variants/STM32F3xx/F303V(B-C)Tx/variant_DISCO_F303VC.cpp b/variants/STM32F3xx/F303V(B-C)Tx/variant_DISCO_F303VC.cpp new file mode 100644 index 0000000000..9f270580c8 --- /dev/null +++ b/variants/STM32F3xx/F303V(B-C)Tx/variant_DISCO_F303VC.cpp @@ -0,0 +1,202 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2021, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_DISCO_F303VC) +#include "pins_arduino.h" + +// Pin number +const PinName digitalPin[] = { + PC_0, //D0/A0 + PC_2, //D1/A1 + PF_2, //D2/A2 + PA_0, //D3/A23 + PA_2, //D4/A25 + PA_4, //D5/A27 + PA_6, //D6/A29 + PC_4, //D7/A3 + PB_0, //D8/A4 + PB_2, //D9/A5 + PE_8, //D10/A31 + PE_10, //D11/A33 + PE_12, //D12/A35 + PE_14, //D13/A37 + PB_10, //D14 + PB_12, //D15/A6 + PB_14, //D16/A7 + PD_8, //D17/A8 + PD_10, //D18/A9 + PD_12, //D19/A10 + PD_14, //D20/A11 + PC_7, //D21 + PF_9, //D22 + PF_0, //D23 + PC_14, //D24 + PE_6, //D25 + PE_4, //D26 + PE_2, //D27 + PE_0, //D28 + PB_8, //D29 + PB_6, //D30 + PB_4, //D31 + PD_7, //D32 + PD_5, //D33 + PD_3, //D34 + PD_1, //D35 + PC_12, //D36 + PC_10, //D37 + PA_14, //D38 + PF_6, //D39 + PA_12, //D40 + PA_10, //D41 + PA_8, //D42 + PC_8, //D43 + PC_1, //D44/A12 + PC_3, //D45/A13 + PA_1, //D46/A24 + PA_3, //D47/A26 + PF_4, //D48/A14 + PA_5, //D49/A28 + PA_7, //D50/A30 + PC_5, //D51/A15 + PB_1, //D52/A16 + PE_7, //D53/A17 + PE_9, //D54/A32 + PE_11, //D55/A34 + PE_13, //D56/A36 + PE_15, //D57/A38 + PB_11, //D58 + PB_13, //D59/A18 + PB_15, //D60/A19 + PD_9, //D61/A20 + PD_11, //D62/A21 + PD_13, //D63/A22 + PD_15, //D64 + PC_6, //D65 + PF_10, //D66 + PF_1, //D67 + PC_15, //D68 + PC_13, //D69 + PE_5, //D70 + PE_3, //D71 + PE_1, //D72 + PB_9, //D73 + PB_7, //D74 + PB_5, //D75 + PB_3, //D76 + PD_6, //D77 + PD_4, //D78 + PD_2, //D79 + PD_0, //D80 + PC_11, //D81 + PA_15, //D82 + PA_13, //D83 + PA_11, //D84 + PA_9, //D85 + PC_9 //D86 + +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, //A0 + 1, //A1 + 2, //A2 + 7, //A3 + 8, //A4 + 9, //A5 + 15, //A6 + 16, //A7 + 17, //A8 + 18, //A9 + 19, //A10 + 20, //A11 + 44, //A12 + 45, //A13 + 48, //A14 + 51, //A15 + 52, //A16 + 53, //A17 + 59, //A18 + 60, //A19 + 61, //A20 + 62, //A21 + 63, //A22 + 3, //A23 + 46, //A24 + 4, //A25 + 47, //A26 + 5, //A27 + 49, //A28 + 6, //A29 + 50, //A30 + 10, //A31 + 54, //A32 + 11, //A33 + 55, //A34 + 12, //A35 + 56, //A36 + 13, //A37 + 57, //A38 +}; + +// ---------------------------------------------------------------------------- + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief System Clock Configuration + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { + Error_Handler(); + } + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; + PeriphClkInit.USBClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { + Error_Handler(); + } +} + +#ifdef __cplusplus +} +#endif + +#endif /* ARDUINO_DISCO_F303VC */ diff --git a/variants/STM32F3xx/F303V(B-C)Tx/variant_DISCO_F303VC.h b/variants/STM32F3xx/F303V(B-C)Tx/variant_DISCO_F303VC.h new file mode 100644 index 0000000000..1bc2c001cd --- /dev/null +++ b/variants/STM32F3xx/F303V(B-C)Tx/variant_DISCO_F303VC.h @@ -0,0 +1,260 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2021, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +//P1 connector Right side +#define PC0 A0 +#define PC2 A1 +#define PF2 A2 +#define PA0 A23 +#define PA2 A25 +#define PA4 A27 +#define PA6 A29 +#define PC4 A3 +#define PB0 A4 +#define PB2 A5 +#define PE8 A31 +#define PE10 A33 +#define PE12 A35 +#define PE14 A37 +#define PB10 14 +#define PB12 A6 +#define PB14 A7 +#define PD8 A8 +#define PD10 A9 +#define PD12 A10 +#define PD14 A11 +#define PC7 21 +//P2 connector Left side +#define PF9 22 +#define PF0 23 +#define PC14 24 +#define PE6 25 +#define PE4 26 +#define PE2 27 +#define PE0 28 +#define PB8 29 +#define PB6 30 +#define PB4 31 +#define PD7 32 +#define PD5 33 +#define PD3 34 +#define PD1 35 +#define PC12 36 +#define PC10 37 +#define PA14 38 +#define PF6 39 +#define PA12 40 +#define PA10 41 +#define PA8 42 +#define PC8 43 +//P1 Connector Left Side +#define PC1 A12 +#define PC3 A13 +#define PA1 A24 +#define PA3 A26 +#define PF4 A14 +#define PA5 A28 +#define PA7 A30 +#define PC5 A15 +#define PB1 A16 +#define PE7 A17 +#define PE9 A32 +#define PE11 A34 +#define PE13 A36 +#define PE15 A38 +#define PB11 58 +#define PB13 A18 +#define PB15 A19 +#define PD9 A20 +#define PD11 A21 +#define PD13 A22 +#define PD15 64 +#define PC6 65 +//P2 connector Right side +#define PF10 66 +#define PF1 67 +#define PC15 68 +#define PC13 69 +#define PE5 70 +#define PE3 71 +#define PE1 72 +#define PB9 73 +#define PB7 74 +#define PB5 75 +#define PB3 76 +#define PD6 77 +#define PD4 78 +#define PD2 79 +#define PD0 80 +#define PC11 81 +#define PA15 82 +#define PA13 83 +#define PA11 84 +#define PA9 85 +#define PC9 86 + +// Alternate pins number +#define PA1_ALT1 (PA1 | ALT1) +#define PA2_ALT1 (PA2 | ALT1) +#define PA3_ALT1 (PA3 | ALT1) +#define PA4_ALT1 (PA4 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PA9_ALT1 (PA9 | ALT1) +#define PA10_ALT1 (PA10 | ALT1) +#define PA11_ALT1 (PA11 | ALT1) +#define PA11_ALT2 (PA11 | ALT2) +#define PA12_ALT1 (PA12 | ALT1) +#define PA12_ALT2 (PA12 | ALT2) +#define PA13_ALT1 (PA13 | ALT1) +#define PA15_ALT1 (PA15 | ALT1) +#define PB0_ALT1 (PB0 | ALT1) +#define PB0_ALT2 (PB0 | ALT2) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB3_ALT1 (PB3 | ALT1) +#define PB4_ALT1 (PB4 | ALT1) +#define PB4_ALT2 (PB4 | ALT2) +#define PB5_ALT1 (PB5 | ALT1) +#define PB5_ALT2 (PB5 | ALT2) +#define PB6_ALT1 (PB6 | ALT1) +#define PB6_ALT2 (PB6 | ALT2) +#define PB7_ALT1 (PB7 | ALT1) +#define PB7_ALT2 (PB7 | ALT2) +#define PB8_ALT1 (PB8 | ALT1) +#define PB8_ALT2 (PB8 | ALT2) +#define PB9_ALT1 (PB9 | ALT1) +#define PB9_ALT2 (PB9 | ALT2) +#define PB14_ALT1 (PB14 | ALT1) +#define PB15_ALT1 (PB15 | ALT1) +#define PB15_ALT2 (PB15 | ALT2) +#define PC0_ALT1 (PC0 | ALT1) +#define PC1_ALT1 (PC1 | ALT1) +#define PC2_ALT1 (PC2 | ALT1) +#define PC3_ALT1 (PC3 | ALT1) +#define PC6_ALT1 (PC6 | ALT1) +#define PC7_ALT1 (PC7 | ALT1) +#define PC8_ALT1 (PC8 | ALT1) +#define PC9_ALT1 (PC9 | ALT1) +#define PC10_ALT1 (PC10 | ALT1) +#define PC11_ALT1 (PC11 | ALT1) +#define PD10_ALT1 (PD10 | ALT1) +#define PD11_ALT1 (PD11 | ALT1) +#define PD12_ALT1 (PD12 | ALT1) +#define PD13_ALT1 (PD13 | ALT1) +#define PD14_ALT1 (PD14 | ALT1) +#define PE8_ALT1 (PE8 | ALT1) +#define PF2_ALT1 (PF2 | ALT1) + +#define NUM_DIGITAL_PINS 87 +#define NUM_ANALOG_INPUTS 39 + +// On-board LED pin number +#define LED_BLUE PE8 +#define LED_RED PE9 +#define LED_ORANGE PE10 +#define LED_GREEN PE11 +#define LED_BLUE2 PE12 +#define LED_RED2 PE13 +#define LED_ORANGE2 PE14 +#define LED_GREEN2 PE15 +#ifndef LED_BUILTIN + #define LED_BUILTIN LED_BLUE +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PA0 +#endif + +// SPI Definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PA4 +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PA7 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PA6 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PA5 +#endif + +// I2C Definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PB7 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PB6 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#define SERIAL_UART_INSTANCE 1 //Connected to ST-Link + +// Default pin used for 'Serial' instance (ex: ST-Link) +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PC5 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PC4 +#endif + +/* Extra HAL modules */ +#if !defined(HAL_DAC_MODULE_DISABLED) + #define HAL_DAC_MODULE_ENABLED +#endif + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif