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There's not always enough time for the tile # to pass through the multiple muxes introduced by the hack before it's used by the SDRAM controller. This causes heavy glitches in some compilation runs.
Do the remap as soon as the tile # is latched from VRAM, not when it appears on the P BUS.
The text was updated successfully, but these errors were encountered:
There's not always enough time for the tile # to pass through the multiple muxes introduced by the hack before it's used by the SDRAM controller. This causes heavy glitches in some compilation runs.
Do the remap as soon as the tile # is latched from VRAM, not when it appears on the P BUS.
The text was updated successfully, but these errors were encountered: