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feat(pins): Trinity Pins DSL - Single Source of Truth #492

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Description

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Add pins DSL parser with lexer, parser, AST, and XDC emitter

  • Lexer with proper token types (keywords, identifiers, strings, punctuation)
  • Recursive descent parser for board, fabric, and design files
  • XDC emitter that generates Vivado-compatible constraint files
  • CLI commands: tri fpga pins {to-xdc|validate|ir|doctor}

Files:

  • src/tri/pins_parser.zig - Full DSL implementation (~1400 LOC)
  • src/tri/tri_fpga.zig - CLI routing for fpga pins commands
  • fpga/boards/qmtech_xc7a100t.board.tri - Board definition with connectors
  • fpga/designs/uart_bridge_fixed.design.tri - Test design binding

Features:

  • Single source of truth for pin mapping
  • Declarative DSL syntax
  • Support for board, fabric, and design files
  • Generates XDC, IR, and validation reports

Status: ✅ Ready for review

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