@@ -240,7 +240,7 @@ pub fn init() {
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flags,
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) ;
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- let ( mut io_start, mem32_start, mut mem64_start) = detect_pci_regions ( pci_node) ;
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+ let ( mut io_start, mut mem32_start, mut mem64_start) = detect_pci_regions ( pci_node) ;
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debug ! ( "IO address space starts at{io_start:#X}" ) ;
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debug ! ( "Memory32 address space starts at {mem32_start:#X}" ) ;
@@ -267,7 +267,8 @@ pub fn init() {
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// Initializes BARs
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let mut cmd = CommandRegister :: empty ( ) ;
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- for i in 0 ..MAX_BARS {
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+ let mut range_iter = 0 ..MAX_BARS ;
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+ while let Some ( i) = range_iter. next ( ) {
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if let Some ( bar) = dev. get_bar ( i. try_into ( ) . unwrap ( ) ) {
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match bar {
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Bar :: Io { .. } => {
@@ -281,11 +282,22 @@ pub fn init() {
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cmd |= CommandRegister :: IO_ENABLE
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| CommandRegister :: BUS_MASTER_ENABLE ;
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}
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- Bar :: Memory32 { .. } => {
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- // Currently, we ignore 32 bit memory bars
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- // dev.set_bar(i.try_into().unwrap(), Bar::Memory32 { address: mem32_start.try_into().unwrap(), size, prefetchable });
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- // mem32_start += u64::from(size);
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- // cmd |= CommandRegister::MEMORY_ENABLE | CommandRegister::BUS_MASTER_ENABLE;
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+ Bar :: Memory32 {
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+ address : _,
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+ size,
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+ prefetchable,
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+ } => {
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+ dev. set_bar (
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+ i. try_into ( ) . unwrap ( ) ,
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+ Bar :: Memory32 {
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+ address : mem32_start. try_into ( ) . unwrap ( ) ,
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+ size,
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+ prefetchable,
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+ } ,
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+ ) ;
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+ mem32_start += u64:: from ( size) ;
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+ cmd |= CommandRegister :: MEMORY_ENABLE
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+ | CommandRegister :: BUS_MASTER_ENABLE ;
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}
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Bar :: Memory64 {
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address : _,
@@ -303,6 +315,7 @@ pub fn init() {
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mem64_start += size;
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cmd |= CommandRegister :: MEMORY_ENABLE
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| CommandRegister :: BUS_MASTER_ENABLE ;
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+ range_iter. next ( ) ; // Skip 32-bit bar that is part of the 64-bit bar
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}
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}
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}
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