This directory is the canonical PTO ISA tree. It combines the architecture manual, the instruction set guides, the instruction set contracts, and the exact instruction-reference groupings in one place.
This tree is the canonical PTO ISA manual. Textual assembly spelling belongs to the PTO ISA syntax instruction set, not to a second parallel architecture manual.
- PTO ISA defines architecture-visible semantics, legality, state, ordering, target-profile boundaries, and the visible behavior of tile, vector, scalar, communication, and system scheduling operations.
- PTO-AS is the assembler-facing spelling used to write those operations and operands. It is part of how PTO ISA is expressed, not a separate ISA with different semantics.
If the question is "what does this legal PTO program mean across CPU, A2/A3, and A5?", stay in this tree. If the question is "what is the operand shape or textual spelling of this operation?", use the syntax-and-operands pages in this same tree.
Reading order matches the manual chapter map: programming and machine models, then syntax and state, then memory, then opcode reference.
- Reference notes (glossary, diagnostics, portability, source of truth)
- TALLOC - Allocate a TPipe FIFO slot as a GlobalTensor view.
- TPUSH - Push a producer tile into a TPipe FIFO for Cube-Vector communication.
- TPOP - Pop a consumer tile from a TPipe FIFO for Cube-Vector communication.
- TFREE - Release FIFO space for a TPipe entry; no-op for TileData TPOP flow.
The grouped instruction set trees under tile/, vector/, scalar/, comm/, and system/ are the canonical PTO ISA paths.
docs/isa/tile/ops/docs/isa/vector/ops/docs/isa/scalar/ops/docs/isa/comm/docs/isa/system/ops/