Skip to content

Commit f4bbf5a

Browse files
committed
Apollo Lake MR10 FSP
1 parent aab8be0 commit f4bbf5a

File tree

9 files changed

+4725
-0
lines changed

9 files changed

+4725
-0
lines changed
Binary file not shown.
Binary file not shown.

ApolloLakeFspBinPkg/FspBin/Fsp.bsf

+1,804
Large diffs are not rendered by default.

ApolloLakeFspBinPkg/FspBin/Fsp.fd

536 KB
Binary file not shown.

ApolloLakeFspBinPkg/Include/FspApi.h

+247
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,247 @@
1+
/** @file
2+
Intel FSP API definition from Intel Firmware Support Package External
3+
Architecture Specification v2.0, March 2016, revision 001.
4+
5+
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
6+
This program and the accompanying materials
7+
are licensed and made available under the terms and conditions of the BSD License
8+
which accompanies this distribution. The full text of the license may be found at
9+
http://opensource.org/licenses/bsd-license.php.
10+
11+
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12+
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13+
14+
**/
15+
16+
#ifndef _FSP_API_H_
17+
#define _FSP_API_H_
18+
19+
#pragma pack(1)
20+
/**
21+
Fsp UPD HEADER Configuration
22+
**/
23+
typedef struct {
24+
///
25+
/// UPD Region Signature. This signature will be
26+
/// "XXXXXX_T" for FSP-T
27+
/// "XXXXXX_M" for FSP-M
28+
/// "XXXXXX_S" for FSP-S
29+
/// Where XXXXXX is an unique signature
30+
///
31+
UINT64 Signature;
32+
///
33+
/// Revision of the Data structure. For FSP v2.0 value is 1.
34+
///
35+
UINT8 Revision;
36+
UINT8 Reserved[23];
37+
} FSP_UPD_HEADER;
38+
39+
/**
40+
FSPM_ARCH_UPD Configuration
41+
**/
42+
typedef struct {
43+
///
44+
/// Revision of the structure. For FSP v2.0 value is 1.
45+
///
46+
UINT8 Revision;
47+
UINT8 Reserved[3];
48+
///
49+
/// Pointer to the non-volatile storage (NVS) data buffer.
50+
/// If it is NULL it indicates the NVS data is not available.
51+
///
52+
VOID *NvsBufferPtr;
53+
///
54+
/// Pointer to the temporary stack base address to be
55+
/// consumed inside FspMemoryInit() API.
56+
///
57+
VOID *StackBase;
58+
///
59+
/// Temporary stack size to be consumed inside
60+
/// FspMemoryInit() API.
61+
///
62+
UINT32 StackSize;
63+
///
64+
/// Size of memory to be reserved by FSP below "top
65+
/// of low usable memory" for bootloader usage.
66+
///
67+
UINT32 BootLoaderTolumSize;
68+
///
69+
/// Current boot mode.
70+
///
71+
UINT32 BootMode;
72+
UINT8 Reserved1[8];
73+
} FSPM_ARCH_UPD;
74+
75+
typedef struct {
76+
FSP_UPD_HEADER FspUpdHeader;
77+
} FSPT_UPD_COMMON;
78+
79+
typedef struct {
80+
FSP_UPD_HEADER FspUpdHeader;
81+
FSPM_ARCH_UPD FspmArchUpd;
82+
} FSPM_UPD_COMMON;
83+
84+
typedef struct {
85+
FSP_UPD_HEADER FspUpdHeader;
86+
} FSPS_UPD_COMMON;
87+
88+
typedef enum {
89+
///
90+
/// This stage is notified when the bootloader completes the
91+
/// PCI enumeration and the resource allocation for the
92+
/// PCI devices is complete.
93+
///
94+
EnumInitPhaseAfterPciEnumeration = 0x20,
95+
///
96+
/// This stage is notified just before the bootloader hand-off
97+
/// to the OS loader.
98+
///
99+
EnumInitPhaseReadyToBoot = 0x40,
100+
///
101+
/// This stage is notified just before the firmware/Preboot
102+
/// environment transfers management of all system resources
103+
/// to the OS or next level execution environment.
104+
///
105+
EnumInitPhaseEndOfFirmware = 0xF0
106+
} FSP_INIT_PHASE;
107+
108+
typedef struct {
109+
///
110+
/// Notification phase used for NotifyPhase API
111+
///
112+
FSP_INIT_PHASE Phase;
113+
} NOTIFY_PHASE_PARAMS;
114+
115+
#pragma pack()
116+
117+
/**
118+
This FSP API is called soon after coming out of reset and before memory and stack is
119+
available. This FSP API will load the microcode update, enable code caching for the
120+
region specified by the boot loader and also setup a temporary stack to be used until
121+
main memory is initialized.
122+
123+
A hardcoded stack can be set up with the following values, and the "esp" register
124+
initialized to point to this hardcoded stack.
125+
1. The return address where the FSP will return control after setting up a temporary
126+
stack.
127+
2. A pointer to the input parameter structure
128+
129+
However, since the stack is in ROM and not writeable, this FSP API cannot be called
130+
using the "call" instruction, but needs to be jumped to.
131+
132+
@param[in] FsptUpdDataPtr Pointer to the FSPT_UPD data structure.
133+
134+
@retval EFI_SUCCESS Temporary RAM was initialized successfully.
135+
@retval EFI_INVALID_PARAMETER Input parameters are invalid.
136+
@retval EFI_UNSUPPORTED The FSP calling conditions were not met.
137+
@retval EFI_DEVICE_ERROR Temp RAM initialization failed.
138+
139+
If this function is successful, the FSP initializes the ECX and EDX registers to point to
140+
a temporary but writeable memory range available to the boot loader and returns with
141+
FSP_SUCCESS in register EAX. Register ECX points to the start of this temporary
142+
memory range and EDX points to the end of the range. Boot loader is free to use the
143+
whole range described. Typically the boot loader can reload the ESP register to point
144+
to the end of this returned range so that it can be used as a standard stack.
145+
**/
146+
typedef
147+
EFI_STATUS
148+
(EFIAPI *FSP_TEMP_RAM_INIT) (
149+
IN VOID *FsptUpdDataPtr
150+
);
151+
152+
/**
153+
This FSP API is used to notify the FSP about the different phases in the boot process.
154+
This allows the FSP to take appropriate actions as needed during different initialization
155+
phases. The phases will be platform dependent and will be documented with the FSP
156+
release. The current FSP supports two notify phases:
157+
Post PCI enumeration
158+
Ready To Boot
159+
160+
@param[in] NotifyPhaseParamPtr Address pointer to the NOTIFY_PHASE_PRAMS
161+
162+
@retval EFI_SUCCESS The notification was handled successfully.
163+
@retval EFI_UNSUPPORTED The notification was not called in the proper order.
164+
@retval EFI_INVALID_PARAMETER The notification code is invalid.
165+
**/
166+
typedef
167+
EFI_STATUS
168+
(EFIAPI *FSP_NOTIFY_PHASE) (
169+
IN NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr
170+
);
171+
172+
/**
173+
This FSP API is called after TempRamInit and initializes the memory.
174+
This FSP API accepts a pointer to a data structure that will be platform dependent
175+
and defined for each FSP binary. This will be documented in Integration guide with
176+
each FSP release.
177+
After FspMemInit completes its execution, it passes the pointer to the HobList and
178+
returns to the boot loader from where it was called. BootLoader is responsible to
179+
migrate it's stack and data to Memory.
180+
FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to
181+
complete the silicon initialization and provides bootloader an opportunity to get
182+
control after system memory is available and before the temporary RAM is torn down.
183+
184+
@param[in] FspmUpdDataPtr Pointer to the FSPM_UPD data sructure.
185+
@param[out] HobListPtr Pointer to receive the address of the HOB list.
186+
187+
@retval EFI_SUCCESS FSP execution environment was initialized successfully.
188+
@retval EFI_INVALID_PARAMETER Input parameters are invalid.
189+
@retval EFI_UNSUPPORTED The FSP calling conditions were not met.
190+
@retval EFI_DEVICE_ERROR FSP initialization failed.
191+
@retval EFI_OUT_OF_RESOURCES Stack range requested by FSP is not met.
192+
@retval FSP_STATUS_RESET_REQUIREDx A reset is reuired. These status codes will not be returned during S3.
193+
**/
194+
typedef
195+
EFI_STATUS
196+
(EFIAPI *FSP_MEMORY_INIT) (
197+
IN VOID *FspmUpdDataPtr,
198+
OUT VOID **HobListPtr
199+
);
200+
201+
202+
/**
203+
This FSP API is called after FspMemoryInit API. This FSP API tears down the temporary
204+
memory setup by TempRamInit API. This FSP API accepts a pointer to a data structure
205+
that will be platform dependent and defined for each FSP binary. This will be
206+
documented in Integration Guide.
207+
FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to
208+
complete the silicon initialization and provides bootloader an opportunity to get
209+
control after system memory is available and before the temporary RAM is torn down.
210+
211+
@param[in] TempRamExitParamPtr Pointer to the Temp Ram Exit parameters structure.
212+
This structure is normally defined in the Integration Guide.
213+
And if it is not defined in the Integration Guide, pass NULL.
214+
215+
@retval EFI_SUCCESS FSP execution environment was initialized successfully.
216+
@retval EFI_INVALID_PARAMETER Input parameters are invalid.
217+
@retval EFI_UNSUPPORTED The FSP calling conditions were not met.
218+
@retval EFI_DEVICE_ERROR FSP initialization failed.
219+
**/
220+
typedef
221+
EFI_STATUS
222+
(EFIAPI *FSP_TEMP_RAM_EXIT) (
223+
IN VOID *TempRamExitParamPtr
224+
);
225+
226+
227+
/**
228+
This FSP API is called after TempRamExit API.
229+
FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to complete the
230+
silicon initialization.
231+
232+
@param[in] FspsUpdDataPtr Pointer to the FSPS_UPD data structure.
233+
If NULL, FSP will use the default parameters.
234+
235+
@retval EFI_SUCCESS FSP execution environment was initialized successfully.
236+
@retval EFI_INVALID_PARAMETER Input parameters are invalid.
237+
@retval EFI_UNSUPPORTED The FSP calling conditions were not met.
238+
@retval EFI_DEVICE_ERROR FSP initialization failed.
239+
@retval FSP_STATUS_RESET_REQUIREDx A reset is reuired. These status codes will not be returned during S3.
240+
**/
241+
typedef
242+
EFI_STATUS
243+
(EFIAPI *FSP_SILICON_INIT) (
244+
IN VOID *FspsUpdDataPtr
245+
);
246+
247+
#endif

ApolloLakeFspBinPkg/Include/FspUpd.h

+48
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,48 @@
1+
/** @file
2+
3+
Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
4+
5+
Redistribution and use in source and binary forms, with or without modification,
6+
are permitted provided that the following conditions are met:
7+
8+
* Redistributions of source code must retain the above copyright notice, this
9+
list of conditions and the following disclaimer.
10+
* Redistributions in binary form must reproduce the above copyright notice, this
11+
list of conditions and the following disclaimer in the documentation and/or
12+
other materials provided with the distribution.
13+
* Neither the name of Intel Corporation nor the names of its contributors may
14+
be used to endorse or promote products derived from this software without
15+
specific prior written permission.
16+
17+
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18+
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19+
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20+
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
21+
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22+
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23+
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24+
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25+
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26+
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27+
THE POSSIBILITY OF SUCH DAMAGE.
28+
29+
This file is automatically generated. Please do NOT modify !!!
30+
31+
**/
32+
33+
#ifndef __FSPUPD_H__
34+
#define __FSPUPD_H__
35+
36+
#include <FspEas.h>
37+
38+
#pragma pack(1)
39+
40+
#define FSPT_UPD_SIGNATURE 0x545F4450554C5041 /* 'APLUPD_T' */
41+
42+
#define FSPM_UPD_SIGNATURE 0x4D5F4450554C5041 /* 'APLUPD_M' */
43+
44+
#define FSPS_UPD_SIGNATURE 0x535F4450554C5041 /* 'APLUPD_S' */
45+
46+
#pragma pack()
47+
48+
#endif

0 commit comments

Comments
 (0)