{"payload":{"feedbackUrl":"https://github.com/orgs/community/discussions/53140","repo":{"id":111158319,"defaultBranch":"master","name":"media-driver","ownerLogin":"intel","currentUserCanPush":false,"isFork":false,"isEmpty":false,"createdAt":"2017-11-17T22:54:05.000Z","ownerAvatar":"https://avatars.githubusercontent.com/u/17888862?v=4","public":true,"private":false,"isOrgOwned":true},"refInfo":{"name":"","listCacheKey":"v0:1726740113.0","currentOid":""},"activityList":{"items":[{"before":"5d2eba9f2af2c34997683077d50fdbfb9d516530","after":"a584e987e16cf624b664155685412a9d6937e26f","ref":"refs/heads/master","pushedAt":"2024-09-27T11:19:17.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[VP] Align L0 FC Common Kernel Source Code to Driver Bin Version and Fix Clamp Issue\n\nL0 FC csc clamp fixing","shortMessageHtmlLink":"[VP] Align L0 FC Common Kernel Source Code to Driver Bin Version and …"}},{"before":"33f00be7c6b5d84b2ef8350969539b57709757ed","after":"5d2eba9f2af2c34997683077d50fdbfb9d516530","ref":"refs/heads/master","pushedAt":"2024-09-27T06:20:12.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[VP] VP L0 FC Procamp Enabling\n\nVP L0 FC Procamp Enabling.","shortMessageHtmlLink":"[VP] VP L0 FC Procamp Enabling"}},{"before":"5ac4de11b1f4c56c90591240701f67ff01249630","after":"33f00be7c6b5d84b2ef8350969539b57709757ed","ref":"refs/heads/master","pushedAt":"2024-09-25T15:19:47.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[VP] Fix L0 FC 420PL3 ReadKernel Thread Height\n\nL0 FC 420PL3 read kernel using wrong thread height","shortMessageHtmlLink":"[VP] Fix L0 FC 420PL3 ReadKernel Thread Height"}},{"before":"a781e1135a06c506e64d3b22e2dee8b017db9414","after":"5ac4de11b1f4c56c90591240701f67ff01249630","ref":"refs/heads/master","pushedAt":"2024-09-25T11:50:55.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[Encode] Remove per frame SeqParams and only update for new ones\n\nThere is VPL patch to remove per frame SeqParams and keep this params submitted with I frames or with BRC reset scenarios. Accordingly Driver only need to update new seq params.","shortMessageHtmlLink":"[Encode] Remove per frame SeqParams and only update for new ones"}},{"before":"1b830fb47b3a037ab87b56957d8856311b316674","after":"a781e1135a06c506e64d3b22e2dee8b017db9414","ref":"refs/heads/master","pushedAt":"2024-09-25T03:22:21.000Z","pushType":"push","commitsCount":9,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[VP] Enable Vebox physical engine id report\n\nEnable Vebox physical engine id report for multi-engines schedule","shortMessageHtmlLink":"[VP] Enable Vebox physical engine id report"}},{"before":"9049cf71311b32857ef7d2e52e6a87c581a936d0","after":"1b830fb47b3a037ab87b56957d8856311b316674","ref":"refs/heads/master","pushedAt":"2024-09-23T17:56:08.000Z","pushType":"push","commitsCount":6,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[Encode] Add new perf tags\n\nAdd new perf tags.","shortMessageHtmlLink":"[Encode] Add new perf tags"}},{"before":"f6d9dd60dbb965875c21977874b5b4f940bd9f9f","after":"9049cf71311b32857ef7d2e52e6a87c581a936d0","ref":"refs/heads/master","pushedAt":"2024-09-19T18:51:05.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[Media Common] Bump up version to 24.4.0\n\nAuto version bump up","shortMessageHtmlLink":"[Media Common] Bump up version to 24.4.0"}},{"before":"081fc57f709db16aa22f62c6337753069d7f36fa","after":"f6d9dd60dbb965875c21977874b5b4f940bd9f9f","ref":"refs/heads/master","pushedAt":"2024-09-19T07:05:13.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[Media Common] Set Scanout by default\n\nrecommend to flag all potential scanout surface as SCNAOUT. This is\nrequired to fix DMA DRM render on XE.\n\nSigned-off-by: Cheah, Vincent Beng Keat <vincent.beng.keat.cheah@intel.com>","shortMessageHtmlLink":"[Media Common] Set Scanout by default"}},{"before":"4358b71853a907e3e0d07c4342da1d0eb18a8d14","after":"081fc57f709db16aa22f62c6337753069d7f36fa","ref":"refs/heads/master","pushedAt":"2024-09-19T03:21:44.000Z","pushType":"push","commitsCount":8,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[Media Common] [VP][MOS] fix double free issue\n\nset nullptr after free memory.","shortMessageHtmlLink":"[Media Common] [VP][MOS] fix double free issue"}},{"before":"b5958fdc74630516df24c0374aaae498174018f0","after":"4358b71853a907e3e0d07c4342da1d0eb18a8d14","ref":"refs/heads/master","pushedAt":"2024-09-18T15:49:41.000Z","pushType":"push","commitsCount":4,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[Encode] move avc/hevc xe2_lpm file\n\nmove avc/hevc xe2_lpm file.","shortMessageHtmlLink":"[Encode] move avc/hevc xe2_lpm file"}},{"before":"ea588fcaf260875e90128dc301eb57d8d69a7a82","after":"b5958fdc74630516df24c0374aaae498174018f0","ref":"refs/heads/master","pushedAt":"2024-09-18T13:19:47.000Z","pushType":"push","commitsCount":4,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[Media Common] [VP] Refine and add etw trace for Media Copy\n\n1. Remove start/end in  copymain surface and move it to upper layer surface copy\n2. add copy info trace","shortMessageHtmlLink":"[Media Common] [VP] Refine and add etw trace for Media Copy"}},{"before":"f682ac6120cc80e279586049cba23af782405c2b","after":"ea588fcaf260875e90128dc301eb57d8d69a7a82","ref":"refs/heads/master","pushedAt":"2024-09-18T10:22:38.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[Media Common] [VP] Add BMG VP features\n\nAdd BMG VP features for open source","shortMessageHtmlLink":"[Media Common] [VP] Add BMG VP features"}},{"before":"f31a2124b129ded08c22e389c6870abbafbccfd6","after":"f682ac6120cc80e279586049cba23af782405c2b","ref":"refs/heads/master","pushedAt":"2024-09-13T09:52:40.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"Revert \"[Media Common] [VP] Add etw trace for media copy info\"\n\nThis reverts commit intel-innersource/drivers.gpu.unified#f31a2124b","shortMessageHtmlLink":"Revert \"[Media Common] [VP] Add etw trace for media copy info\""}},{"before":"b5a60cb7459de999184f0a769bc60357451d5b10","after":"f31a2124b129ded08c22e389c6870abbafbccfd6","ref":"refs/heads/master","pushedAt":"2024-09-12T11:50:29.000Z","pushType":"push","commitsCount":3,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[Media Common] [VP] Add etw trace for media copy info\n\n* Refine mediacopy trace and update etw manifest\n\n* keep start/end trace for perf analysis\n\n* update manifest\n\n---------\n\nCo-authored-by: gfxbot <gbsbuild@intel.com>","shortMessageHtmlLink":"[Media Common] [VP] Add etw trace for media copy info"}},{"before":"d9c4512c27c58b6640d8b0ea6c628bdf0f6b101d","after":"b5a60cb7459de999184f0a769bc60357451d5b10","ref":"refs/heads/master","pushedAt":"2024-09-12T05:50:08.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[Media Common] [VP] Add DG2 new device ID 0x56AF\n\nDG2 new sku A760A for Automotive","shortMessageHtmlLink":"[Media Common] [VP] Add DG2 new device ID 0x56AF"}},{"before":"cb850188be14672e376f6c051e172c116d34ad3c","after":"d9c4512c27c58b6640d8b0ea6c628bdf0f6b101d","ref":"refs/heads/master","pushedAt":"2024-09-10T19:20:30.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[Media Common][VP] APO Mos: switch layer, create osdevicecontext and get device info\n\nmos apo switch:\n1.create switch layer by platform or regkey\n2.create light sdevicecontext\n3. get common device info from osdevicecontext","shortMessageHtmlLink":"[Media Common][VP] APO Mos: switch layer, create osdevicecontext and …"}},{"before":"1336d08d9647e2f72a60b38f46ddd2ea97a9d3b2","after":"cb850188be14672e376f6c051e172c116d34ad3c","ref":"refs/heads/master","pushedAt":"2024-09-10T12:19:55.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[Encode] Fix AV1 Vdenc TU7 GPU Hang Issue\n\nThis patch is to Fix AV1 Vdenc TU7 GPU Hang Issue","shortMessageHtmlLink":"[Encode] Fix AV1 Vdenc TU7 GPU Hang Issue"}},{"before":"57d410178ec2dafeed801b40c1c69354ad125dd3","after":"1336d08d9647e2f72a60b38f46ddd2ea97a9d3b2","ref":"refs/heads/master","pushedAt":"2024-09-10T10:22:10.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[CP] Fix HEVC long scalability hang issue\n\nprolog is required in each secondary command buffer in sec decode.","shortMessageHtmlLink":"[CP] Fix HEVC long scalability hang issue"}},{"before":"9306d43ea92d83d8a1318335a3a34bb8c6567f17","after":"57d410178ec2dafeed801b40c1c69354ad125dd3","ref":"refs/heads/master","pushedAt":"2024-09-09T12:51:12.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[VP] add WA ID for linear output issue\n\nadd WA ID for linear output issue.","shortMessageHtmlLink":"[VP] add WA ID for linear output issue"}},{"before":"3edea6f29f1af503e3c36744a98c7f434adc8f13","after":"9306d43ea92d83d8a1318335a3a34bb8c6567f17","ref":"refs/heads/master","pushedAt":"2024-09-06T09:22:32.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[Encode] update avc img state program\n\nupdate avc img state program.","shortMessageHtmlLink":"[Encode] update avc img state program"}},{"before":"628bf904c4425c424348141c05672a312d978895","after":"3edea6f29f1af503e3c36744a98c7f434adc8f13","ref":"refs/heads/master","pushedAt":"2024-09-05T11:20:08.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[VP] Enable 3DLut kernel case w/o vebox workload\n\nEnable 3DLut kernel case w/o vebox workload.","shortMessageHtmlLink":"[VP] Enable 3DLut kernel case w/o vebox workload"}},{"before":"6875da2f63a0d7ec4872491c8e19b3d556b8d747","after":"628bf904c4425c424348141c05672a312d978895","ref":"refs/heads/master","pushedAt":"2024-09-04T13:49:16.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[Media Common] Bump up version to 24.3.4\n\nAuto version bump up","shortMessageHtmlLink":"[Media Common] Bump up version to 24.3.4"}},{"before":"ac5f0ff9ef6b6c4e6ae16bd3f411161182bf1bcf","after":"6875da2f63a0d7ec4872491c8e19b3d556b8d747","ref":"refs/heads/master","pushedAt":"2024-09-04T06:50:23.000Z","pushType":"push","commitsCount":3,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[Media Common] [VP][MCPY]separate BLT Mocs and BCS SWCTRL per HAL\n\nseparate BLT Mocs and BCS SWCTRL  per HAL.","shortMessageHtmlLink":"[Media Common] [VP][MCPY]separate BLT Mocs and BCS SWCTRL per HAL"}},{"before":"88e60b40f7d09a6f37ede9b054f1903303c62499","after":"ac5f0ff9ef6b6c4e6ae16bd3f411161182bf1bcf","ref":"refs/heads/master","pushedAt":"2024-09-03T09:21:37.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[VP] add YUY2 width unalign plane definition for 2 plane l0 corruption\n\nadd YUY2 width unalign plane definition for 2 plane l0 corruption, issue from UV plane.","shortMessageHtmlLink":"[VP] add YUY2 width unalign plane definition for 2 plane l0 corruption"}},{"before":"d953a3fe57419bcfd5ce1f55436238e823214ba7","after":"88e60b40f7d09a6f37ede9b054f1903303c62499","ref":"refs/heads/master","pushedAt":"2024-09-03T05:52:25.000Z","pushType":"push","commitsCount":6,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[VP] Remove duplicated getInfo: fixing S3D failure\n\nRemove duplicated getInfo: fixing S3D failures","shortMessageHtmlLink":"[VP] Remove duplicated getInfo: fixing S3D failure"}},{"before":"574dedb5fcc636d5440eefa167df9f4f9ffea0e9","after":"d953a3fe57419bcfd5ce1f55436238e823214ba7","ref":"refs/heads/master","pushedAt":"2024-08-30T09:20:00.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[VP] Add RGB24/RGB565 implementation in FC\n\nAdd RGB24/RGB565 format implementation in FC","shortMessageHtmlLink":"[VP] Add RGB24/RGB565 implementation in FC"}},{"before":"2585059e98c40bac572f9b0bb6b9d1e3e1ea5f31","after":"574dedb5fcc636d5440eefa167df9f4f9ffea0e9","ref":"refs/heads/master","pushedAt":"2024-08-29T05:22:09.000Z","pushType":"push","commitsCount":7,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[VP] Fix L0 FC Rotation\n\nfix rotation","shortMessageHtmlLink":"[VP] Fix L0 FC Rotation"}},{"before":"c7df900d4d24201a69bdcfc7cbfe072b23a49e1a","after":"2585059e98c40bac572f9b0bb6b9d1e3e1ea5f31","ref":"refs/heads/master","pushedAt":"2024-08-28T20:49:25.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[Encode] Modify vdaqm\n\n* [Encode] Modify vdaqm\n\nModify vdaqm.","shortMessageHtmlLink":"[Encode] Modify vdaqm"}},{"before":"998651ca8d283e65024ef65ef6d6fa47c798fde7","after":"c7df900d4d24201a69bdcfc7cbfe072b23a49e1a","ref":"refs/heads/master","pushedAt":"2024-08-28T19:21:21.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[Encode] Add linux caps for vp9 seg_id_block_size\n\nAdd linux caps for vp9 seg_id_block_size in driver.","shortMessageHtmlLink":"[Encode] Add linux caps for vp9 seg_id_block_size"}},{"before":"026370fab71797569a5cf6fa7572ae9b988ab247","after":"998651ca8d283e65024ef65ef6d6fa47c798fde7","ref":"refs/heads/master","pushedAt":"2024-08-27T03:54:32.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"intel-mediadev","name":null,"path":"/intel-mediadev","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40878126?s=80&v=4"},"commit":{"message":"[Media Common] [VP] BMG DDI upstream\n\nOpen source ddi code for BMG","shortMessageHtmlLink":"[Media Common] [VP] BMG DDI upstream"}}],"hasNextPage":true,"hasPreviousPage":false,"activityType":"all","actor":null,"timePeriod":"all","sort":"DESC","perPage":30,"startCursor":"Y3Vyc29yOnYyOpK7MjAyNC0wOS0yN1QxMToxOToxNy4wMDAwMDBazwAAAATChNQE","endCursor":"Y3Vyc29yOnYyOpK7MjAyNC0wOC0yN1QwMzo1NDozMi4wMDAwMDBazwAAAASk6Rzv"}},"title":"Activity · intel/media-driver"}