Enable FP8/MXFP8 Ops with requests and CUDA alignment

[CuiYifeng]

🚀 The feature, motivation and pitch

Plan to enable the following ops for FP8/MXFP8:

• _scaled_mm [XPU] [1/2] add fp8 scaled_mm implementation for XPU pytorch/pytorch#165978
• _scaled_grouped_mm
• fill/fill_
• flip/fliplr/flipud Support FP8 in op flip, index_put, and index.Tensor #2190
• index_put/index_put_ Support FP8 in op flip, index_put, and index.Tensor #2190
• index.Tenor/index.Tensor_out Support FP8 in op flip, index_put, and index.Tensor #2190
• index_select/index_select.out
• gather/gather.out
• cat/cat.out Enable FP8 concat_xpu and where_xpu #2152
• eq/eq_
• ne/ne_
• where Enable FP8 concat_xpu and where_xpu #2152
• empty/zeros/ones
• to
• copy (Float8_e8m0fnu)
• clone
• add/sub/mul/div Enable FP8 add/sub/mul/div #2145
• compare Enable FP8 compare_xpu #2154
• normal

Alternatives

No response

Additional context

No response

[liangan1]

@CuiYifeng, except for the element data type with e5m2 and e4m3, PT also defined limited ops for UE8M0 for CUDA. we also need to enable this part. An example is when wen print the u8m0 scale, the index will be used.

[jikunshang]

can you also add #2017 #2013 to this list?

[CuiYifeng]

can you also add #2017 #2013 to this list?

@jikunshang These ops are already included.
#2013 will be solved in #2152.
#2017 will be solved in #2190.

[carsonwang]

Hi, the following are a few requests for implementing scaled_mm MXFP8/MXFP4/NVFP4+ support. The immediate request is to support copy for Float8_e8m0fnu and Float4_e2m1fn_x2.

• copy support for Float8_e8m0fnu
• For MXFP4, maybe open a separate ticket to track. First priority is to support copy for Float4_e2m1fn_x2
• Also need to track the support for NVFP4+, scale will be E5M3

[CuiYifeng]

@carsonwang Thanks for the request. Will update FP8 ticket and open a new ticket for NVFP4 support.