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Additional output formats #10

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Muxianesty opened this issue Jun 21, 2024 · 3 comments
Closed

Additional output formats #10

Muxianesty opened this issue Jun 21, 2024 · 3 comments
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enhancement New feature or request stage II For issues applicable to Stage II of the project

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@Muxianesty
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Currently Utopia HLS has SystemVerilog-descriptions as its single output format.

Other formats (FIRRTL, Verilog, .dot for dataflow graphs) could be considered as well.

@Muxianesty Muxianesty added the enhancement New feature or request label Jun 21, 2024
@Muxianesty Muxianesty self-assigned this Jun 21, 2024
@Muxianesty Muxianesty changed the title [Infrastructure & Automation] Additional output formats [Stage II] Additional output formats Jun 28, 2024
@Muxianesty Muxianesty changed the title [Stage II] Additional output formats Additional output formats Jun 28, 2024
@Muxianesty Muxianesty added the stage II For issues applicable to Stage II of the project label Jun 28, 2024
@Muxianesty
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It was proposed to have a number of options for each output format and at least one these options has to be specified in CLI. Additionally, some option (e.g. --to-stdout) can override the output path for SystemVerilog (even if it was set explicitly) to dump everything in standard output stream.

@ssmolov
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ssmolov commented Jul 1, 2024

This issue intersects with #22 but for what?

@Muxianesty
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This issue intersects with #22 but for what?

Mistakenly duplicated issue. Closed.

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Labels
enhancement New feature or request stage II For issues applicable to Stage II of the project
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