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Complete Stage 1 — behavior-preserving construction: every refactor and parallel
build that can land on master with the full v1.x suite green, so that the Stage-2 flip
(native headers + polars, one flag-day) becomes a small, well-oracled step instead of a
rewrite. Nothing in Stage 1 changes user-visible behavior; everything is guarded by the
Stage-0 characterization suites and oracles (#439).
Why
The plans in cellpy-workspace/architecture-plan/ (the architecture-plan repo; formerly architecture-plan/) are all shaped around the same move: build the new thing next to the old thing, prove parity, then swap. Stage 1 is the
"build next to" phase across five workstreams: cellpy-file I/O, configuration, units,
header translation, and de-indexing — plus the additive cellpy-core modules
(units helpers, mapping extensions, meta mapping, curves) they consume.
Behavior-delta sign-off(added 2026-07-14): every observed 1.0.3 → 1.0.4a3
behavior delta is either confirmed intended (release-noted + named exception in
the Stage 0.7: Value-parity comparator — the mapped-columns oracle harness #434 comparator) or fixed as a regression — CE inversion, coulombic-difference
sign flip, dropped shifted_* specific / reference_voltage_* columns, cv_charge
step fix, sub_type null change, and the discharge_c_rate legacy-vs-core engine
mismatch (must be explained, not excepted). Register with verdicts: architecture plan §7;
source: cellpy-v103-vs-v104a3-observations.md.
This criterion specifically gates the final v1.x release (ship gate: architecture
plan §6.1); core#117/Update coverage to 4.5.1 #118 remain Stage-1 exit items but do not gate that release.
Goal
Complete Stage 1 — behavior-preserving construction: every refactor and parallel
build that can land on master with the full v1.x suite green, so that the Stage-2 flip
(native headers + polars, one flag-day) becomes a small, well-oracled step instead of a
rewrite. Nothing in Stage 1 changes user-visible behavior; everything is guarded by the
Stage-0 characterization suites and oracles (#439).
Why
The plans in
cellpy-workspace/architecture-plan/(the architecture-plan repo; formerlyarchitecture-plan/) are all shaped around the same move:build the new thing next to the old thing, prove parity, then swap. Stage 1 is the
"build next to" phase across five workstreams: cellpy-file I/O, configuration, units,
header translation, and de-indexing — plus the additive cellpy-core modules
(units helpers, mapping extensions, meta mapping, curves) they consume.
Issues by workstream
cellpy-file I/O (
architecture-plan/cellpy-file-loading-refactor-plan.md)cellpy_file/format.py(shared with config plan)cellpy_file/cellpy convertCLI #449 — Stage 1.4: out-of-band redirects, typed errors,cellpy convertCLIUnits (
architecture-plan/unit-handling-cellpy2-plan.md)corealias #450 — Stage 1.5: one spec, one registry, rename thecorealiasconvert_value,calculate_scaler,validate_unitsConfiguration (
architecture-plan/cellpy2-configuration-and-parameters-plan.md)cellpy setuprewrite and migration UX #454 — Stage 1.9:cellpy setuprewrite + migrate UXHeaders (
architecture-plan/cellpy2-native-headers-migration-plan.md)translate.py(to_native/to_legacy) + bridge extractionPolars preparation (
architecture-plan/cellpy2-polars-port-execution-plan.md)Conventions
cellpy-core additive modules
cellpycore.curves(spec'd extraction layer; gated on Stage 0.11: Decision register — the calls that gate Stage 1+ #438 decision 2)Sequencing constraints (the ones that bite)
corealias #450 before Stage 1.2: File-loading — stateless helpers out, selector/limits side-channel dead #447/Stage 1.3: File-loading — move the read and write paths into cellpy_file/ #448 — thecore-alias rename must not interleave with thecellreader code moves (agreed in both plans' risk tables).
Update pytest to 3.7.1 #116 → release + re-pin → Stage 1.15: translate.py — dormant native⇄legacy frame translation in cellpy_file/ #458 (release plan §3).
cellpy convertCLI #449 and Stage 1.8: Config — swap the engine under prms, migrate call sites, kill import-time init #453 (they import the conventions machinery).Exit criteria (Stage 1 done ⇒ Stage 2 flip may be scheduled)
deliberate and documented (typed errors in Stage 1.4: File-loading — out-of-band redirects, typed errors,
cellpy convertCLI #449, config divergences in Stage 1.7: Config — build the pydantic-settings stack in parallel #452).cellpy_file/owns all cellpy-file I/O;CellpyCell.load/saveare thin wrappers.translate.pyround-trip (v8 → native → v8) green; value-parity comparator (Stage 0.7: Value-parity comparator — the mapped-columns oracle harness #434)green against the bridge.
behavior delta is either confirmed intended (release-noted + named exception in
the Stage 0.7: Value-parity comparator — the mapped-columns oracle harness #434 comparator) or fixed as a regression — CE inversion, coulombic-difference
sign flip, dropped
shifted_*specific /reference_voltage_*columns, cv_chargestep fix,
sub_typenull change, and thedischarge_c_ratelegacy-vs-core enginemismatch (must be explained, not excepted). Register with verdicts:
architecture plan §7;
source: cellpy-v103-vs-v104a3-observations.md.
This criterion specifically gates the final v1.x release (ship gate: architecture
plan §6.1); core#117/Update coverage to 4.5.1 #118 remain Stage-1 exit items but do not gate that release.