From e6c1098e2ee0423872293964a5ae3003f8527b57 Mon Sep 17 00:00:00 2001 From: Joe Crop Date: Fri, 12 Jan 2024 15:06:17 -0800 Subject: [PATCH] updated icons to look better in light mode. Added basic syntax highlighting for .f files --- CHANGELOG.md | 5 ++ .../systemVerilog.json | 0 configs/verilogFileList.json | 5 ++ package.json | 51 +++++++++---- resources/VSCode_SystemVerilog_Icons.fig | Bin 0 -> 27849 bytes resources/f_dark.svg | 4 ++ resources/f_light.svg | 4 ++ resources/{sv.svg => sv_dark.svg} | 1 - resources/sv_light.svg | 3 + resources/{svh.svg => svh_dark.svg} | 3 +- resources/{vh-dark.svg => svh_light.svg} | 5 +- resources/{v.svg => v_dark.svg} | 1 - resources/v_light.svg | 3 + resources/va.svg | 1 - resources/vams.svg | 1 - resources/{vh-light.svg => vh_dark.svg} | 3 +- resources/{vh.svg => vh_light.svg} | 3 +- syntaxes/verilog-filelist.json | 67 ++++++++++++++++++ verilog-examples/fiellist.f | 9 +++ 19 files changed, 141 insertions(+), 28 deletions(-) rename language-configuration.json => configs/systemVerilog.json (100%) create mode 100644 configs/verilogFileList.json create mode 100644 resources/VSCode_SystemVerilog_Icons.fig create mode 100644 resources/f_dark.svg create mode 100644 resources/f_light.svg rename resources/{sv.svg => sv_dark.svg} (94%) create mode 100644 resources/sv_light.svg rename resources/{svh.svg => svh_dark.svg} (93%) rename resources/{vh-dark.svg => svh_light.svg} (91%) rename resources/{v.svg => v_dark.svg} (94%) create mode 100644 resources/v_light.svg rename resources/{vh-light.svg => vh_dark.svg} (93%) rename resources/{vh.svg => vh_light.svg} (93%) create mode 100644 syntaxes/verilog-filelist.json create mode 100644 verilog-examples/fiellist.f diff --git a/CHANGELOG.md b/CHANGELOG.md index 399faa40..5c05c8f1 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -10,6 +10,11 @@ More details can be found on the [Releases](https://github.com/eirikpre/VSCode-S - 💡 Back-end Language Server for Systemverilog - 💡 Complete syntax highlighting +### [0.13.8] + +- Corrected icons for light themes by `joecrop` +- Added basic syntax highlighting for .f files by `joecrop` + ### [0.13.7] - Added missing filetype icons by `joecrop` diff --git a/language-configuration.json b/configs/systemVerilog.json similarity index 100% rename from language-configuration.json rename to configs/systemVerilog.json diff --git a/configs/verilogFileList.json b/configs/verilogFileList.json new file mode 100644 index 00000000..74d76db4 --- /dev/null +++ b/configs/verilogFileList.json @@ -0,0 +1,5 @@ +{ + "comments": { + "lineComment": ["//", "#"] + } +} \ No newline at end of file diff --git a/package.json b/package.json index e844f992..6cc247c3 100644 --- a/package.json +++ b/package.json @@ -2,7 +2,7 @@ "name": "systemverilog", "displayName": "SystemVerilog - Language Support", "description": "Language support for Verilog and SystemVerilog.", - "version": "0.13.7", + "version": "0.13.8", "publisher": "eirikpre", "author": { "name": "Eirik Prestegårdshus", @@ -55,10 +55,10 @@ "extensions": [ ".sv" ], - "configuration": "./language-configuration.json", + "configuration": "./configs/systemVerilog.json", "icon": { - "light": "./resources/sv.svg", - "dark": "./resources/sv.svg" + "light": "./resources/sv_light.svg", + "dark": "./resources/sv_dark.svg" } }, { @@ -72,10 +72,10 @@ "extensions": [ ".svh" ], - "configuration": "./language-configuration.json", + "configuration": "./configs/systemVerilog.json", "icon": { - "light": "./resources/svh.svg", - "dark": "./resources/svh.svg" + "light": "./resources/svh_light.svg", + "dark": "./resources/svh_dark.svg" } }, { @@ -87,10 +87,10 @@ "extensions": [ ".v" ], - "configuration": "./language-configuration.json", + "configuration": "./configs/systemVerilog.json", "icon": { - "light": "./resources/v.svg", - "dark": "./resources/v.svg" + "light": "./resources/v_light.svg", + "dark": "./resources/v_dark.svg" } }, { @@ -102,10 +102,10 @@ "extensions": [ ".vh" ], - "configuration": "./language-configuration.json", + "configuration": "./configs/systemVerilog.json", "icon": { - "light": "./resources/vh-light.svg", - "dark": "./resources/vh-dark.svg" + "light": "./resources/vh_light.svg", + "dark": "./resources/vh_dark.svg" } }, { @@ -118,7 +118,7 @@ "extensions": [ ".vams" ], - "configuration": "./language-configuration.json", + "configuration": "./configs/systemVerilog.json", "icon": { "light": "./resources/vams.svg", "dark": "./resources/vams.svg" @@ -134,11 +134,27 @@ "extensions": [ ".va" ], - "configuration": "./language-configuration.json", + "configuration": "./configs/systemVerilog.json", "icon": { "light": "./resources/va.svg", "dark": "./resources/va.svg" } + }, + { + "id": "verilog-filelist", + "aliases": [ + "Verilog Filelist", + "verilog-filelist", + "Dot-F File" + ], + "extensions": [ + ".f" + ], + "configuration": "./configs/verilogFileList.json", + "icon": { + "light": "./resources/f_light.svg", + "dark": "./resources/f_dark.svg" + } } ], "snippets": [ @@ -200,6 +216,11 @@ "meta.embedded.block.systemverilog": "source.systemverilog", "meta.embedded.block.verilog": "source.verilog" } + }, + { + "language": "verilog-filelist", + "scopeName": "source.verilog-filelist", + "path": "./syntaxes/verilog-filelist.json" } ], "configuration": [ diff --git a/resources/VSCode_SystemVerilog_Icons.fig b/resources/VSCode_SystemVerilog_Icons.fig new file mode 100644 index 0000000000000000000000000000000000000000..4d797114204d8ef7cc14313795d494dce834498b GIT binary patch literal 27849 zcmZ5nQ;;l8lpfo*ZQHi)*tTuk)*ainjXSn&+uHf}X=5v*J5PQ%=TtsaRaayyNCShQ z06;(h06aL-r~~|;0}6l^z{tSX)xe3))WS?f8598UqBGwF3V`5$MSuVp0DXo>U&W&9 zfd7B|)zey8xLGj#Dp~jd0GfR~x{M@M>{Yf7tGi`iWM+C8E-M=W2dAf=9XlIkZ4*~` z_k+9AKDME=(|8<{u6@1f7_5Pbh=^jt!^1fWeuLlRzxcoDf1~&BXGf#ry83Ss`1jlU z%SBp+Q>EP1Nfy_M^3sPgC&b{i>+I?dbTEf+!MV!1?_f1M$Y-Up)0=C{sp|4QpNPrA z%u01z!Qz_~+(7J2waO+^u#)eAGbMZg3+TEpo&)Vr`o_0p?Q+eDvBiz-P(G=WAjORA3_?LsoX!|g_M~Ya_ zwJEkPG?vDFK~12Y_{E!bv(mU(e!Y{WyY;u(pOq-t-j;5umK=IvpDiWsf54P<4l^%8 z82*1aq|!w@{{Cf%2MEMEUSEPDL_*Q1^@6QRu7c?lv?)a%5TNe6U@J?BFVnVBRH%6Y z+uGLed_r$S<;@?-_5w6g@TV9Q)!f~BJ`c^NJ*7uHmcUOS+>_iIk&}J zC}vu+q`XmGU&3kulWhqrXe`_`! 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diff --git a/resources/sv_light.svg b/resources/sv_light.svg new file mode 100644 index 00000000..daaf5a58 --- /dev/null +++ b/resources/sv_light.svg @@ -0,0 +1,3 @@ + + + diff --git a/resources/svh.svg b/resources/svh_dark.svg similarity index 93% rename from resources/svh.svg rename to resources/svh_dark.svg index 777bcbf9..b3e5a6ff 100644 --- a/resources/svh.svg +++ b/resources/svh_dark.svg @@ -1,5 +1,4 @@ - - + diff --git a/resources/vh-dark.svg b/resources/svh_light.svg similarity index 91% rename from resources/vh-dark.svg rename to resources/svh_light.svg index db2445e1..2526361e 100644 --- a/resources/vh-dark.svg +++ b/resources/svh_light.svg @@ -1,5 +1,4 @@ - - - + + diff --git a/resources/v.svg b/resources/v_dark.svg similarity index 94% rename from resources/v.svg rename to resources/v_dark.svg index 891d72a3..69a898ab 100644 --- a/resources/v.svg +++ b/resources/v_dark.svg @@ -1,4 +1,3 @@ - diff --git a/resources/v_light.svg b/resources/v_light.svg new file mode 100644 index 00000000..69a898ab --- /dev/null +++ b/resources/v_light.svg @@ -0,0 +1,3 @@ + + + diff --git a/resources/va.svg b/resources/va.svg index 8bb511fb..a04573fe 100644 --- a/resources/va.svg +++ b/resources/va.svg @@ -1,4 +1,3 @@ - diff --git a/resources/vams.svg b/resources/vams.svg index 98f16258..2ff9ff3f 100644 --- a/resources/vams.svg +++ b/resources/vams.svg @@ -1,4 +1,3 @@ - diff --git a/resources/vh-light.svg b/resources/vh_dark.svg similarity index 93% rename from resources/vh-light.svg rename to resources/vh_dark.svg index 31749277..163f64ea 100644 --- a/resources/vh-light.svg +++ b/resources/vh_dark.svg @@ -1,5 +1,4 @@ - - + diff --git a/resources/vh.svg b/resources/vh_light.svg similarity index 93% rename from resources/vh.svg rename to resources/vh_light.svg index a7472641..9aafb5fe 100644 --- a/resources/vh.svg +++ b/resources/vh_light.svg @@ -1,5 +1,4 @@ - - + diff --git a/syntaxes/verilog-filelist.json b/syntaxes/verilog-filelist.json new file mode 100644 index 00000000..9ab0f36c --- /dev/null +++ b/syntaxes/verilog-filelist.json @@ -0,0 +1,67 @@ +{ + "fileTypes": [ + "f" + ], + "name": "verilog-filelist", + "scopeName": "source.verilog-filelist", + "patterns": [ + { + "match": "^\\s*//.*$", + "name": "comment.line" + }, + { + "match": "^\\s*#.*$", + "name": "comment.line" + }, + { + "match": "^\\s*-f\\s", + "name": "keyword" + }, + { + "match": "^\\s*-v\\s", + "name": "keyword" + }, + { + "match": "^\\s*-F\\s", + "name": "keyword" + }, + { + "match": "(\\$\\()(\\w*)(\\))", + "captures": { + "1": {"name": "variable.other.constant"}, + "2": {"name": "variable"}, + "3": {"name": "variable.other.constant"} + } + }, + { + "match": "(\\$\\{)(\\w*)(\\})", + "captures": { + "1": {"name": "variable.other.constant"}, + "2": {"name": "variable"}, + "3": {"name": "variable.other.constant"} + } + }, + { + "match": "\\+incdir\\+", + "name": "entity.name.function" + }, + { + "match": "\\-incdir\\s", + "name": "entity.name.function" + }, + { + "match": "(-define)\\s(.*)\\s*", + "captures": { + "1": {"name": "entity.name.type"}, + "2": {"name": "variable.other.constant"} + } + }, + { + "match": "(\\+define\\+)\\s*(.*)\\s*", + "captures": { + "1": {"name": "entity.name.type"}, + "2": {"name": "variable.other.constant"} + } + } + ] +} \ No newline at end of file diff --git a/verilog-examples/fiellist.f b/verilog-examples/fiellist.f new file mode 100644 index 00000000..a3ad5a23 --- /dev/null +++ b/verilog-examples/fiellist.f @@ -0,0 +1,9 @@ +// A great comment +-f ./${dirname}/my_files.f +-F $(MY_PATH)/my_relative_files.f +-v a_verilog_file.v +-define SYNTHESIS +# another comment +-incdir ./rtl ++incdir+ ./include ++define+NO_PORTS