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#------------------------------------------------------------------------
# Copyright (c) 2020 R. Timothy Edwards
# Revisions: See below
#
# This file is an Open Source foundry process describing
# the SkyWater sky130 hybrid 0.18um / 0.13um fabrication
# process. The file may be distributed under the terms
# of the Apache 2.0 license agreement.
#
#------------------------------------------------------------------------
tech
format 35
sky130A
end
version
version 1.0.165-0-g55c6eee
description "SkyWater SKY130: Open Source rules and DRC"
requires magic-8.3.111
end
#------------------------------------------------------------------------
# Status 7/10/20: Rev 1 (alpha):
# First public release
# Status 8/14/20: Rev 2 (alpha):
# Started updating with new device/model naming convention
# Status 1/3/21: Taking out of beta and declaring an official release.
#------------------------------------------------------------------------
#------------------------------------------------------------------------
# Supported device types
#------------------------------------------------------------------------
# device name magic ID layer description
#------------------------------------------------------------------------
# sky130_fd_pr__nfet_01v8 nfet standard nFET
# sky130_fd_pr__nfet_01v8 scnfet standard nFET in standard cell**
# sky130_fd_pr__special_nfet_latch npd special nFET in SRAM cell
# sky130_fd_pr__special_nfet_pass npass special nFET in SRAM cell
# sky130_fd_pr__nfet_01v8_lvt nfetlvt low Vt nFET
# sky130_fd_bs_flash__special_sonosfet_star nsonos SONOS nFET
# sky130_fd_pr__pfet_01v8 pfet standard pFET
# sky130_fd_pr__pfet_01v8 scpfet standard pFET in standard cell**
# sky130_fd_pr__special_pfet_pass ppu special pFET in SRAM cell
# sky130_fd_pr__pfet_01v8_lvt pfetlvt low Vt pFET
# sky130_fd_pr__pfet_01v8_mvt pfetmvt med Vt pFET
# sky130_fd_pr__pfet_01v8_hvt pfethvt high Vt pFET
# sky130_fd_pr__nfet_03v3_nvt nnfet native nFET
# sky130_fd_pr__pfet_g5v0d10v5 mvpfet thickox pFET
# sky130_fd_pr__nfet_g5v0d10v5 mvnfet thickox nFET
# sky130_fd_pr__nfet_01v8_nvt mvnnfet thickox native nFET
# sky130_fd_pr__diode_pw2nd_05v5 ndiode n+ diff diode
# sky130_fd_pr__diode_pw2nd_05v5_lvt ndiodelvt low Vt n+ diff diode
# sky130_fd_pr__diode_pw2nd_05v5_nvt nndiode diode with nndiff
# sky130_fd_pr__diode_pw2nd_11v0 mvndiode thickox n+ diff diode
# sky130_fd_pr__diode_pd2nw_05v5 pdiode p+ diff diode
# sky130_fd_pr__diode_pd2nw_05v5_lvt pdiodelvt low Vt p+ diff diode
# sky130_fd_pr__diode_pd2nw_05v5_hvt pdiodehvt high Vt p+ diff diode
# sky130_fd_pr__diode_pd2nw_11v0 mvpdiode thickox p+ diff diode
# sky130_fd_pr__npn_05v5 pbase NPN in deep nwell
# sky130_fd_pr__npn_11v0 pbase thick oxide gated NPN
# sky130_fd_pr__pnp_05v5 nbase PNP
# sky130_fd_pr__cap_mim_m3_1 mimcap MiM cap 1st plate
# sky130_fd_pr__cap_mim_m3_2 mimcap2 MiM cap 2nd plate
# sky130_fd_pr__res_generic_nd rdn n+ diff resistor
# sky130_fd_pr__res_generic_nd__hv mvrdn thickox n+ diff resistor
# sky130_fd_pr__res_generic_pd rdp p+ diff resistor
# sky130_fd_pr__res_generic_pd__nv mvrdp thickox p+ diff resistor
# sky130_fd_pr__res_generic_l1 rli local interconnect resistor
# sky130_fd_pr__res_generic_po npres n+ poly resistor
# sky130_fd_pr__res_high_po_* ppres (*) p+ poly resistor (300 Ohms/sq)
# sky130_fd_pr__res_xhigh_po_* xres (*) p+ poly resistor (2k Ohms/sq)
# sky130_fd_pr__cap_var_lvt varactor low Vt varactor
# sky130_fd_pr__cap_var_hvt varactorhvt high Vt varactor
# sky130_fd_pr__cap_var mvvaractor thickox varactor
# sky130_fd_pr__res_iso_pw rpw pwell resistor (in deep nwell)
# sky130_fd_pr__esd_nfet_g5v0d10v5 mvnfetesd ESD thickox nFET
# sky130_fd_pr__esd_pfet_g5v0d10v5 mvpfetesd ESD thickox pFET
#
# (*) Note that ppres may extract into some generic type called
# "sky130_fd_pr__res_xhigh_po", but only specific sizes of xhrpoly are
# allowed, and these are created from fixed layouts like the types below.
#
# (**) nFET and pFET in standard cells are the same as devices
# outside of the standard cell except for the DRC rule for
# FET to diffusion contact spacing (which is 0.05um, not 0.055um)
#
#-------------------------------------------------------------
# The following devices are not extracted but are represented
# only by script-generated subcells in the PDK.
#-------------------------------------------------------------
# sky130_fd_pr__esd_nfet_01v8 ESD nFET
# sky130_fd_pr__esd_nfet_05v0_nvt ESD native nFET
# sky130_fd_pr__special_nfet_pass_flash flash nFET device
# sky130_fd_pr__esd_rf_diode_pw2nd_11v0 ESD n+ diode
# sky130_fd_pr__esd_rf_diode_pd2nw_11v0 ESD p+ diode
# sky130_fd_pr__cap_vpp_* Vpp cap
# sky130_fd_pr__ind_* inductor
# sky130_fd_pr__fuse_m4 metal fuse device
#--------------------------------------------------------------
#-----------------------------------------------------
# Tile planes
#-----------------------------------------------------
planes
dwell,dw
well,w
active,a
locali,li1,li
metal1,m1
metal2,m2
metal3,m3
cap1,c1
metal4,m4
cap2,c2
metal5,m5
metali,mi
block,b
comment,c
end
#-----------------------------------------------------
# Tile types
#-----------------------------------------------------
types
# Deep nwell
dwell dnwell,dnw
dwell isosubstrate,isosub
# Wells
well nwell,nw
well pwell,pw
well rpw,rpwell
-well obswell
well pbase,npn
well nbase,pnp
# Transistors
active nmos,ntransistor,nfet
-active scnmos,scntransistor,scnfet
-active npd,npdfet,sramnfet
-active npass,npassfet,srampassfet
active pmos,ptransistor,pfet
-active scpmos,scptransistor,scpfet
-active scpmoshvt,scpfethvt
-active ppu,ppufet,srampfet
active nnmos,nntransistor,nnfet
active mvnmos,mvntransistor,mvnfet
active mvpmos,mvptransistor,mvpfet
active mvnnmos,mvnntransistor,mvnnfet
-active mvnmosesd,mvntransistoresd,mvnfetesd
-active mvpmosesd,mvptransistoresd,mvpfetesd
active varactor,varact,var
active mvvaractor,mvvaract,mvvar
active pmoslvt,pfetlvt
active pmosmvt,pfetmvt
active pmoshvt,pfethvt
active nmoslvt,nfetlvt
active varactorhvt,varacthvt,varhvt
-active nsonos,sonos
-active sramnvar,corenvar,corenvaractor
-active srampvar,corepvar,corepvaractor
# Diffusions
-active fomfill
active ndiff,ndiffusion,ndif
active pdiff,pdiffusion,pdif
active mvndiff,mvndiffusion,mvndif
active mvpdiff,mvpdiffusion,mvpdif
active ndiffc,ndcontact,ndc
active pdiffc,pdcontact,pdc
active mvndiffc,mvndcontact,mvndc
active mvpdiffc,mvpdcontact,mvpdc
active psubdiff,psubstratepdiff,ppdiff,ppd,psd,ptap
active nsubdiff,nsubstratendiff,nndiff,nnd,nsd,ntap
active mvpsubdiff,mvpsubstratepdiff,mvppdiff,mvppd,mvpsd,mvptap
active mvnsubdiff,mvnsubstratendiff,mvnndiff,mvnnd,mvnsd,mvntap
active psubdiffcont,psubstratepcontact,psc,ptapc
active nsubdiffcont,nsubstratencontact,nsc,ntapc
active mvpsubdiffcont,mvpsubstratepcontact,mvpsc,mvptapc
active mvnsubdiffcont,mvnsubstratencontact,mvnsc,mvntapc
-active obsactive
-active mvobsactive
# Poly
active poly,p,polysilicon
active polycont,pc,pcontact,polycut,polyc
active xpolycontact,xpolyc,xpc
-active polyfill
# Resistors
active npolyres,npres,mrp1
active ppolyres,ppres,xhrpoly
active xpolyres,xpres,xres,uhrpoly
active ndiffres,rnd,rdn,rndiff
active pdiffres,rpd,rdp,rpdiff
active mvndiffres,mvrnd,mvrdn,mvrndiff
active mvpdiffres,mvrpd,mvrdp,mvrpdiff
active rmp
# Diodes
active pdiode,pdi
active ndiode,ndi
active nndiode,nndi
active pdiodec,pdic
active ndiodec,ndic
active nndiodec,nndic
active mvpdiode,mvpdi
active mvndiode,mvndi
active mvpdiodec,mvpdic
active mvndiodec,mvndic
active pdiodelvt,pdilvt
active pdiodehvt,pdihvt
active ndiodelvt,ndilvt
active pdiodelvtc,pdilvtc
active pdiodehvtc,pdihvtc
active ndiodelvtc,ndilvtc
# Local Interconnect
locali locali,li1,li
-locali corelocali,coreli1,coreli
locali rlocali,rli1,rli
locali viali,vial,mcon,m1c,v0
-locali obsli1,obsli
-locali obsli1c,obsmcon
-locali lifill
# Metal 1
metal1 metal1,m1,met1
metal1 rmetal1,rm1,rmet1
metal1 via1,m2contact,m2cut,m2c,via,v,v1
-metal1 obsm1
metal1 padl
-metal1 m1fill
# Metal 2
metal2 metal2,m2,met2
metal2 rmetal2,rm2,rmet2
metal2 via2,m3contact,m3cut,m3c,v2
-metal2 obsm2
-metal2 m2fill
# Metal 3
metal3 metal3,m3,met3
metal3 rmetal3,rm3,rmet3
-metal3 obsm3
metal3 via3,v3
-metal3 m3fill
cap1 mimcap,mim,capm
cap1 mimcapcontact,mimcapc,mimcc,capmc
# Metal 4
metal4 metal4,m4,met4
metal4 rmetal4,rm4,rmet4
-metal4 obsm4
metal4 via4,v4
-metal4 m4fill
cap2 mimcap2,mim2,capm2
cap2 mimcap2contact,mimcap2c,mim2cc,capm2c
# Metal 5
metal5 metal5,m5,met5
metal5 rm5,rmetal5,rmet5
-metal5 obsm5
-metal5 m5fill
metal5 mrdlcontact,mrdlc,pi1
metali metalrdl,mrdl,metrdl,rdl
-metali obsmrdl
metali pi2
block ubm
# Miscellaneous
-block glass
-block fillblock,fillblock4
comment comment
-comment obscomment
# fixed resistor width identifiers
-comment res0p35
-comment res0p69
-comment res1p41
-comment res2p85
-comment res5p73
# fixed bipolar area identifiers
-comment pnp0p68
-comment pnp3p40
-comment npn1p00
-comment npn2p00
-comment npn11p0
end
#-----------------------------------------------------
# Magic contact types
#-----------------------------------------------------
contact
pc poly locali
ndc ndiff locali
pdc pdiff locali
nsc nsd locali
psc psd locali
ndic ndiode locali
ndilvtc ndiodelvt locali
nndic nndiode locali
pdic pdiode locali
pdilvtc pdiodelvt locali
pdihvtc pdiodehvt locali
xpc xpc locali
mvndc mvndiff locali
mvpdc mvpdiff locali
mvnsc mvnsd locali
mvpsc mvpsd locali
mvndic mvndiode locali
mvpdic mvpdiode locali
mcon locali metal1
obsmcon obsli metal1
via1 metal1 metal2
via2 metal2 metal3
via3 metal3 metal4
via4 metal4 metal5
stackable
# MiM cap contacts are not stackable!
mimcc mimcap metal4
mim2cc mimcap2 metal5
padl m1 m2 m3 m4 m5 glass
mrdlc metal5 mrdl
pi2 mrdl ubm
end
#-----------------------------------------------------
# Layer aliases
#-----------------------------------------------------
aliases
allwellplane nwell
allnwell nwell,obswell,pnp
allnfets nfet,npass,npd,scnfet,mvnfet,mvnfetesd,mvnnfet,nnfet,nfetlvt,nsonos
allpfets pfet,ppu,scpfet,scpfethvt,mvpfet,mvpfetesd,pfethvt,pfetlvt,pfetmvt
allfets allnfets,allpfets,varactor,mvvaractor,varhvt,corenvar,corepvar
allfetsstd nfet,mvnfet,mvnfetesd,mvnnfet,nnfet,nfetlvt,pfet,mvpfet,mvpfetesd,pfethvt,pfetlvt,pfetmvt
allfetsspecial scnfet,scpfet,scpfethvt
allfetscore npass,npd,nsonos,ppu,corenvar,corepvar
allfetsnolvt nfet,npass,npd,scnfet,mvnfet,mvnfetesd,mvnnfet,nnfet,nsonos,pfet,ppu,scpfet,scpfethvt,mvpfet,mvpfetesd,pfethvt,pfetmvt,varactor,mvvaractor,varhvt,corenvar
allnactivenonfet *ndiff,*nsd,*ndiode,*nndiode,*mvndiff,*mvnsd,*mvndiode,*ndiodelvt
allnactive allnactivenonfet,allnfets
allnactivenontap *ndiff,*ndiode,*nndiode,*mvndiff,*mvndiode,*ndiodelvt,allnfets
allnactivetap *nsd,*mvnsd,var,varhvt,mvvar,corenvar
allpactivenonfet *pdiff,*psd,*pdiode,*mvpdiff,*mvpsd,*mvpdiode,*pdiodelvt,*pdiodehvt
allpactive allpactivenonfet,allpfets
allpactivenontap *pdiff,*pdiode,*mvpdiff,*mvpdiode,*pdiodelvt,*pdiodehvt,allpfets
allpactivetap *psd,*mvpsd,corepvar
allactivenonfet allnactivenonfet,allpactivenonfet
allactive allactivenonfet,allfets
allactiveres ndiffres,pdiffres,mvndiffres,mvpdiffres
allndifflv *ndif,*nsd,*ndiode,ndiffres,nfet,npass,npd,scnfet,nfetlvt,nsonos
allpdifflv *pdif,*psd,*pdiode,pdiffres,pfet,ppu,scpfet,scpfethvt,pfetlvt,pfetmvt,pfethvt
alldifflv allndifflv,allpdifflv
allndifflvnonfet *ndif,*nsd,*ndiode,*nndiode,ndiffres,*ndiodelvt
allpdifflvnonfet *pdif,*psd,*pdiode,pdiffres,*pdiodelvt,*pdiodehvt
alldifflvnonfet allndifflvnonfet,allpdifflvnonfet
allndiffmv *mvndif,*mvnsd,*mvndiode,*nndiode,mvndiffres,mvnfet,mvnfetesd,mvnnfet,nnfet
allpdiffmv *mvpdif,*mvpsd,*mvpdiode,mvpdiffres,mvpfet,mvpfetesd
alldiffmv allndiffmv,allpdiffmv
allndiffmvnontap *mvndif,*mvndiode,*nndiode,mvndiffres,mvnfet,mvnfetesd,mvnnfet,nnfet
allpdiffmvnontap *mvpdif,*mvpdiode,mvpdiffres,mvpfet,mvpfetesd
alldiffmvnontap allndiffmvnontap,allpdiffmvnontap
allndiffmvnonfet *mvndif,*mvnsd,*mvndiode,*nndiode,mvndiffres
allpdiffmvnonfet *mvpdif,*mvpsd,*mvpdiode,mvpdiffres
alldiffmvnonfet allndiffmvnonfet,allpdiffmvnonfet
alldiffnonfet alldifflvnonfet,alldiffmvnonfet
alldiff alldifflv,alldiffmv,fomfill
allpolyres mrp1,xhrpoly,uhrpoly,rmp
allpolynonfet *poly,allpolyres,xpc
allpolynonres *poly,allfets,xpc
allpoly allpolynonfet,allfets
allpolynoncap *poly,xpc,allfets,allpolyres
allndiffcontlv ndc,nsc,ndic,nndic,ndilvtc
allpdiffcontlv pdc,psc,pdic,pdilvtc,pdihvtc
allndiffcontmv mvndc,mvnsc,mvndic
allpdiffcontmv mvpdc,mvpsc,mvpdic
allndiffcont allndiffcontlv,allndiffcontmv
allpdiffcont allpdiffcontlv,allpdiffcontmv
alldiffcontlv allndiffcontlv,allpdiffcontlv
alldiffcontmv allndiffcontmv,allpdiffcontmv
alldiffcont alldiffcontlv,alldiffcontmv
allcont alldiffcont,pc
allres allpolyres,allactiveres
allli *locali,coreli,rli
allm1 *m1,rm1
allm2 *m2,rm2
allm3 *m3,rm3
allm4 *m4,rm4
allm5 *m5,rm5
allpad padl
psub pwell
end
#-----------------------------------------------------
# Layer drawing styles
#-----------------------------------------------------
styles
styletype mos
dnwell cwell
isosub subcircuit
nwell nwell
pwell pwell
rpwell pwell ptransistor_stripes
ndiff ndiffusion
fomfill ndiffusion
pdiff pdiffusion
nsd ndiff_in_nwell
psd pdiff_in_pwell
nfet ntransistor ntransistor_stripes
scnfet ntransistor ntransistor_stripes
npass ntransistor ntransistor_stripes
npd ntransistor ntransistor_stripes
pfet ptransistor ptransistor_stripes
scpfet ptransistor ptransistor_stripes
scpfethvt ptransistor ptransistor_stripes implant2
ppu ptransistor ptransistor_stripes
var polysilicon ndiff_in_nwell
ndc ndiffusion metal1 contact_X'es
pdc pdiffusion metal1 contact_X'es
nsc ndiff_in_nwell metal1 contact_X'es
psc pdiff_in_pwell metal1 contact_X'es
corenvar polysilicon ndiff_in_nwell
corepvar polysilicon pdiff_in_pwell
pnp nwell ntransistor_stripes
npn pwell ptransistor_stripes
pfetlvt ptransistor ptransistor_stripes implant1
pfetmvt ptransistor ptransistor_stripes implant3
pfethvt ptransistor ptransistor_stripes implant2
nfetlvt ntransistor ntransistor_stripes implant1
nsonos ntransistor implant3
varhvt polysilicon ndiff_in_nwell implant2
nnfet ntransistor ndiff_in_nwell
mvndiff ndiffusion hvndiff_mask
mvpdiff pdiffusion hvpdiff_mask
mvnsd ndiff_in_nwell hvndiff_mask
mvpsd pdiff_in_pwell hvpdiff_mask
mvnfet ntransistor ntransistor_stripes hvndiff_mask
mvnfetesd ntransistor ntransistor_stripes hvndiff_mask
mvnnfet ntransistor ndiff_in_nwell hvndiff_mask
mvpfet ptransistor ptransistor_stripes
mvpfetesd ptransistor ptransistor_stripes
mvvar polysilicon ndiff_in_nwell hvndiff_mask
mvndc ndiffusion metal1 contact_X'es hvndiff_mask
mvpdc pdiffusion metal1 contact_X'es hvpdiff_mask
mvnsc ndiff_in_nwell metal1 contact_X'es hvndiff_mask
mvpsc pdiff_in_pwell metal1 contact_X'es hvpdiff_mask
poly polysilicon
polyfill polysilicon
pc polysilicon metal1 contact_X'es
npolyres polysilicon silicide_block nselect2
ppolyres polysilicon silicide_block pselect2
xpc polysilicon pselect2 metal1 contact_X'es
rmp polysilicon poly_resist_stripes
res0p35 implant1
res0p69 implant1
res1p41 implant1
res2p85 implant1
res5p73 implant1
pnp0p68 implant1
pnp3p40 implant1
npn1p00 implant1
npn2p00 implant1
npn11p0 implant1
pdiode pdiffusion pselect2
ndiode ndiffusion nselect2
pdiodec pdiffusion pselect2 metal1 contact_X'es
ndiodec ndiffusion nselect2 metal1 contact_X'es
nndiode ndiffusion nselect2 implant3
ndiodelvt ndiffusion nselect2 implant1
pdiodelvt pdiffusion pselect2 implant1
pdiodehvt pdiffusion pselect2 implant2
pdilvtc pdiffusion pselect2 implant1 metal1 contact_X'es
pdihvtc pdiffusion pselect2 implant2 metal1 contact_X'es
ndilvtc ndiffusion nselect2 implant1 metal1 contact_X'es
mvpdiode pdiffusion pselect2 hvpdiff_mask
mvndiode ndiffusion nselect2 hvndiff_mask
mvpdiodec pdiffusion pselect2 metal1 contact_X'es hvpdiff_mask
mvndiodec ndiffusion nselect2 metal1 contact_X'es hvndiff_mask
nndiodec ndiff_in_nwell nselect2 metal1 contact_X'es hvndiff_mask
locali metal1
lifill metal1
coreli metal1
rli metal1 poly_resist_stripes
mcon metal1 metal2 via1arrow
obsli metal1
obsmcon metal1 metal2 via1arrow
metal1 metal2
m1fill metal2
rm1 metal2 poly_resist_stripes
obsm1 metal2
m2c metal2 metal3 via2arrow
metal2 metal3
m2fill metal3
rm2 metal3 poly_resist_stripes
obsm2 metal3
m3c metal3 metal4 via3alt
metal3 metal4
m3fill metal4
rm3 metal4 poly_resist_stripes
obsm3 metal4
mimcap metal3 mems
mimcc metal3 contact_X'es mems
mimcap2 metal4 mems
mim2cc metal4 contact_X'es mems
via3 metal4 metal5 via4
metal4 metal5
m4fill metal5
rm4 metal5 poly_resist_stripes
obsm4 metal5
via4 metal5 metal6 via5
metal5 metal6
m5fill metal6
rm5 metal6 poly_resist_stripes
obsm5 metal6
mrdlc metal6 metal7 via6
metalrdl metal7
obsmrdl metal7
ubm metal8
pi2 metal7 metal8 via7
glass overglass
mrp1 poly_resist poly_resist_stripes
xhrpoly poly_resist silicide_block
uhrpoly poly_resist
ndiffres ndiffusion ndop_stripes
pdiffres pdiffusion pdop_stripes
mvndiffres ndiffusion hvndiff_mask ndop_stripes
mvpdiffres pdiffusion hvpdiff_mask pdop_stripes
comment comment
error_p error_waffle
error_s error_waffle
error_ps error_waffle
fillblock cwell
fillblock4 cwell
obswell cwell
obsactive implant4
padl metal6 via6 overglass
magnet substrate_field_implant
rotate via3alt
fence via5
end
#-----------------------------------------------------
# Special paint/erase rules
#-----------------------------------------------------
compose
compose nfet poly ndiff
compose pfet poly pdiff
compose var poly nsd
compose mvnfet poly mvndiff
compose mvpfet poly mvpdiff
compose mvvar poly mvnsd
paint obsmcon locali via1
paint obsmcon obsm1 obsli,obsm1
paint ndc nwell pdc
paint nfet nwell pfet
paint scnfet nwell scpfet
paint ndiff nwell pdiff
paint psd nwell nsd
paint psc nwell nsc
paint npd nwell ppu
paint pdc pwell ndc
paint pfet pwell nfet
paint scpfet pwell scnfet
paint pdiff pwell ndiff
paint nsd pwell psd
paint nsc pwell psc
paint ppu pwell npd
paint pdc coreli pdc
paint ndc coreli ndc
paint pc coreli pc
paint nsc coreli nsc
paint psc coreli psc
paint viali coreli viali
paint coreli pdc pdc
paint coreli ndc ndc
paint coreli pc pc
paint coreli nsc nsc
paint coreli psc psc
paint coreli viali viali
paint m4 obsm4 m4
paint m5 obsm5 m5
end
#-----------------------------------------------------
# Electrical connectivity
#-----------------------------------------------------
connect
*nwell,*nsd,*mvnsd,dnwell,pnp *nwell,*nsd,*mvnsd,dnwell,pnp
pwell,*psd,*mvpsd,npn pwell,*psd,*mvpsd,npn
*li,coreli,lifill *li,coreli,lifill
*m1,m1fill,obsmcon *m1,m1fill,obsmcon
*m2,m2fill *m2,m2fill
*m3,m3fill *m3,m3fill
*m4,m4fill *m4,m4fill
*m5,m5fill *m5,m5fill
*mimcap *mimcap
*mimcap2 *mimcap2
allnactivenonfet allnactivenonfet
allpactivenonfet allpactivenonfet
*poly,xpc,allfets,polyfill *poly,xpc,allfets,polyfill
# RDL connects to m5 (i.e., padl) through glass cut
*mrdl *mrdl
glass metrdl
end
#-----------------------------------------------------
# CIF/GDS output layer definitions
#-----------------------------------------------------
# NOTE: All values in this section MUST be multiples of 25
# or else magic will scale below the allowed layout grid size
cifoutput
#----------------------------------------------------------------
style gdsii
# NOTE: This section is used for actual GDS output
#----------------------------------------------------------------
scalefactor 10 nanometers
options calma-permissive-labels
gridlimit 5
#----------------------------------------------------------------
# Create a temp layer from the cell bounding box for use in
# generating ID layers. Note that "boundary", unlike "bbox",
# requires the FIXED_BBOX property (abutment box) in the cell.
#----------------------------------------------------------------
templayer CELLBOUND
boundary
#----------------------------------------------------------------
# BOUND
#----------------------------------------------------------------
layer BOUND CELLBOUND
calma 235 4
#----------------------------------------------------------------
# DNWELL
#----------------------------------------------------------------
layer DNWELL dnwell,pnp
calma 64 18
layer PWRES rpw
and dnwell
calma 64 13
#----------------------------------------------------------------
# NWELL
#----------------------------------------------------------------
layer NWELL allnwell
bloat-all rpw dnwell
and-not rpw,pwell
calma 64 20
layer WELLTXT
labels allnwell noport
calma 64 5
layer WELLPIN
labels allnwell port
calma 64 16
#----------------------------------------------------------------
# SUB (text/port only)
#----------------------------------------------------------------
layer SUBTXT
labels pwell noport
calma 64 59
layer SUBPIN
labels pwell port
calma 122 16
#----------------------------------------------------------------
# DIFF
#----------------------------------------------------------------
layer DIFF allnactivenontap,allpactivenontap,allactiveres
calma 65 20
layer DIFFTXT
labels allnactivenontap,allpactivenontap noport
calma 65 6
layer DIFFPIN
labels allnactivenontap,allpactivenontap port
calma 65 16
#----------------------------------------------------------------
# TAP
#----------------------------------------------------------------
layer TAP allnactivetap,allpactivetap
labels allnactivetap,allpactivetap port
calma 65 44
layer TAPTXT
labels allnactivetap,allpactivetap noport
calma 65 5
#----------------------------------------------------------------
# FOM
#----------------------------------------------------------------
layer FOMFILL fomfill
labels fomfill
calma 23 28
#----------------------------------------------------------------
# PSDM, NSDM (PPLUS, NPLUS implants)
#----------------------------------------------------------------
templayer basePSDM pdiffres,mvpdiffres
grow 15
or xhrpoly,uhrpoly,xpc
grow 110
bloat-or allpactivetap * 125 allnactivenontap 0
bloat-or allpactivenontap * 125 allnactivetap 0
templayer baseNSDM ndiffres,mvndiffres
grow 125
bloat-or allnactivetap * 125 allpactivenontap 0
bloat-or allnactivenontap * 125 allpactivetap 0
templayer extendPSDM basePSDM
bridge 380 380
and-not baseNSDM
layer PSDM basePSDM,extendPSDM
grow 185
shrink 185
close 265000
mask-hints PSDM
calma 94 20
templayer extendNSDM baseNSDM
bridge 380 380
and-not basePSDM
layer NSDM baseNSDM,extendNSDM
grow 185
shrink 185
close 265000
mask-hints NSDM
calma 93 44
#----------------------------------------------------------------
# LVID
#----------------------------------------------------------------
layer LVID nnfet
grow 100
calma 81 60
#----------------------------------------------------------------
# LVTN
#----------------------------------------------------------------
layer LVTN pfetlvt,nfetlvt,mvvar,mvnnfet,nnfet,nsonos,*pdiodelvt,*ndiodelvt,*nndiode
grow 180
bridge 380 380
grow 185
shrink 185
close 265000
mask-hints LVTN
calma 125 44
#----------------------------------------------------------------
# HVTR
#----------------------------------------------------------------
layer HVTR pfetmvt
grow 180
bridge 380 380
grow 185
shrink 185
close 265000
calma 18 20
#----------------------------------------------------------------
# HVTP
#----------------------------------------------------------------
layer HVTP scpfethvt,ppu,pfethvt,varhvt,*pdiodehvt
grow 180
bridge 380 380
grow 185
shrink 185
close 265000
mask-hints HVTP
calma 78 44
#----------------------------------------------------------------
# SONOS
#----------------------------------------------------------------
layer SONOS nsonos
grow 100
grow-min 410
bridge 500 410
grow 250
shrink 250
calma 80 20
#----------------------------------------------------------------
# SONOS requires COREID around area (areaid.ce). Also, the
# coreli layer indicates a cell needing COREID. Also, devices
# npd, npass, and ppu indicate a COREID cell.
#----------------------------------------------------------------
layer COREID
bloat-all nsonos,coreli,ppu,npd,npass,corepvar,corenvar CELLBOUND
mask-hints COREID
calma 81 2
#----------------------------------------------------------------
# STDCELL applies to all cells containing scnfet or scpfet.
#----------------------------------------------------------------
layer STDCELL scnfet
bloat-all scpfet,scpfethvt,scnfet CELLBOUND
mask-hints STDCELL
calma 81 4
#----------------------------------------------------------------
# ESDID is a marker layer for ESD devices in the padframe I/O.
#----------------------------------------------------------------
layer ESDID
bloat-all mvnfetesd *mvndiff,*poly
bloat-all mvpfetesd *mvpdiff,*poly
grow 100
mask-hints ESDID
calma 81 19
#----------------------------------------------------------------
# NPNID and PNPID apply to bipolar transistors
#----------------------------------------------------------------
layer NPNID
bloat-all npn dnwell
mask-hints NPNID
calma 82 20
templayer pnparea pnp
grow 400
layer PNPID
bloat-all pnparea *psd
or pnparea
mask-hints PNPID
calma 82 44
#----------------------------------------------------------------
# RPM
#----------------------------------------------------------------
layer RPM
bloat-all xhrpoly xpc
grow 200
grow-min 1270
grow 420
shrink 420
calma 86 20
#----------------------------------------------------------------
# URPM (2kOhms/sq. poly implant)
#----------------------------------------------------------------
layer URPM
bloat-all uhrpoly xpc
grow 200
grow-min 1270
grow 420
shrink 420
calma 79 20
#----------------------------------------------------------------
# LDNTM (Tip implant for SONOS FETs)
#----------------------------------------------------------------
layer LDNTM
bloat-all nsonos *ndiff
grow 185
grow 345
shrink 345
calma 11 44
#----------------------------------------------------------------
# HVNTM (Tip implant for MV ndiff devices)
#----------------------------------------------------------------
templayer hvntm_block *mvpsd
grow 185
layer HVNTM
bloat-all mvnfet,mvnfetesd,mvnnfet,nnfet,*mvndiode,mvrdn,*nndiode *mvndiff
bloat-all mvvaractor *mvnsd
and-not hvntm_block
grow 185
grow 345
shrink 345
and-not hvntm_block
calma 125 20
#----------------------------------------------------------------
# POLY
#----------------------------------------------------------------
layer POLY allpoly
calma 66 20
layer POLYTXT
labels allpoly noport
calma 66 5
layer POLYPIN
labels allpoly port
calma 66 16
layer POLYFILL polyfill
labels polyfill
calma 28 28
#----------------------------------------------------------------
# HVI (includes rules NWELL 8-11 and DIFFTAP 14-26)
#----------------------------------------------------------------
templayer thkox_area alldiffmv,mvvar
grow 185
bloat-all alldiffmv nwell
grow 345
shrink 345
templayer large_ptap_mv thkox_area
shrink 420
grow 420
templayer small_ptap_mv thkox_area
and-not large_ptap_mv
# (HVI min width rule is 0.6 but CNTM min width rule is 0.84um)