Hello Professor Lin, I would like to know whether the Verilog netlist must be used as input to enable the time-driven mode.
Because I found that my Verilog cannot be parsed correctly. I tried to adjust my Verilog to adapt to the parser, but it still reports an error: some pins or nets cannot be found in the timer. I hope you can answer my doubts.
Hello Professor Lin, I would like to know whether the Verilog netlist must be used as input to enable the time-driven mode.
Because I found that my Verilog cannot be parsed correctly. I tried to adjust my Verilog to adapt to the parser, but it still reports an error: some pins or nets cannot be found in the timer. I hope you can answer my doubts.